Electrical and optical interconnects for high-performance computing

Technology scaling has enabled drastic growth in the computational and storage capacity of integrated circuits (ICs). This constant growth drives an increasing demand for high-bandwidth communication between and within ICs. In this dissertation we focus on low-power solutions that address this demand. We divide communication links into three subcategories depending on the communication distance. Each category has a different set of challenges and requirements and is affected by CMOS technology scaling in a different manner. We start with short-range chip-to-chip links for board-level communication. Next we will discuss board-to-board links, which demand a longer communication range. Finally on-chip links with communication ranges of a few millimeters are discussed.

Electrical signaling is a natural choice for chip-to-chip communication due to efficient integration and low cost. IO data rates have increased to the point where electrical signaling is now limited by the channel bandwidth. In order to achieve multi-Gb/s data rates, complex designs that equalize the channel are necessary. In addition, a high level of parallelism is central to sustaining bandwidth growth. Decision feedback equalization (DFE) is one of the most commonly employed techniques to overcome the limited bandwidth problem of the electrical channels. A linear and low-power summer is the central block of a DFE. Conventional approaches employ current-mode techniques to implement the summer, which require high power consumption. In order to achieve low-power operation we propose performing the summation in the charge domain. This approach enables a low-power and compact realization of the DFE as well as crosstalk cancellation. A prototype receiver was fabricated in 45nm SOI CMOS to validate the functionality of the proposed technique and was tested over channels with different levels of loss and coupling. Measurement results show that the receiver can equalize channels with maximum 21dB loss while consuming about 7.5mW from a 1.2V supply. We also introduce a compact, low-power transmitter employing passive equalization. The efficacy of the proposed technique is demonstrated through implementation of a prototype in 65nm CMOS. The design achieves up to 20Gb/s data rate while consuming less than 10mW.

An alternative to electrical signaling is to employ optical signaling for chip-to-chip interconnections, which offers low channel loss and cross-talk while providing high communication bandwidth. In this work we demonstrate the possibility of building compact and low-power optical receivers. A novel RC front-end is proposed that combines dynamic offset modulation and double-sampling techniques to eliminate the need for a short time constant at the input of the receiver. Unlike conventional designs, this receiver does not require a high-gain stage that runs at the data rate, making it suitable for low-power implementations. In addition, it allows time-division multiplexing to support very high data rates. A prototype was implemented in 65nm CMOS and achieved up to 24Gb/s with less than 0.4pJ/b power efficiency per channel. As the proposed design mainly employs digital blocks, it benefits greatly from technology scaling in terms of power and area saving.

As the technology scales, the number of transistors on the chip grows. This necessitates a corresponding increase in the bandwidth of the on-chip wires. In this dissertation, we take a close look at wire scaling and investigate its effect on wire performance metrics. We explore a novel on-chip communication link based on a double-sampling architecture and dynamic offset modulation technique that enables low power consumption and high data rates while achieving high bandwidth density in 28nm CMOS technology. The functionality of the link is demonstrated using different length minimum-pitch on-chip wires. Measurement results show that the link achieves up to 20Gb/s of data rate (12.5Gb/s/$\mu$m) with better than 136fJ/b of power efficiency.

Holistic Design In High-Speed Optical Interconnects

Integrated circuit scaling has enabled a huge growth in processing capability, which necessitates a corresponding increase in inter-chip communication bandwidth. As bandwidth requirements for chip-to-chip interconnection scale, deficiencies of electrical channels become more apparent. Optical links present a viable alternative due to their low frequency-dependent loss and higher bandwidth density in the form of wavelength division multiplexing. As integrated photonics and bonding technologies are maturing, commercialization of hybrid-integrated optical links are becoming a reality. Increasing silicon integration leads to better performance in optical links but necessitates a corresponding co-design strategy in both electronics and photonics. In this light, holistic design of high-speed optical links with an in-depth understanding of photonics and state-of-the-art electronics brings their performance to unprecedented levels. This thesis presents developments in high-speed optical links by co-designing and co-integrating the primary elements of an optical link: receiver, transmitter, and clocking.

In the first part of this thesis a 3D-integrated CMOS/Silicon-photonic receiver will be presented. The electronic chip features a novel design that employs a low-bandwidth TIA front-end, double-sampling and equalization through dynamic offset modulation. Measured results show -14.9dBm of sensitivity and energy efficiency of 170fJ/b at 25Gb/s. The same receiver front-end is also used to implement source-synchronous 4-channel WDM-based parallel optical receiver. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range. An adaptive body-biasing circuit is designed to maintain the per-bit-energy consumption constant across wide data-rates. The prototype measurements indicate a record-low power consumption of 153fJ/b at 32Gb/s. The receiver sensitivity is measured to be -8.8dBm at 32Gb/s.

Next, on the optical transmitter side, three new techniques will be presented. First one is a differential ring modulator that breaks the optical bandwidth/quality factor trade-off known to limit the speed of high-Q ring modulators. This structure maintains a constant energy in the ring to avoid pattern-dependent power droop. As a first proof of concept, a prototype has been fabricated and measured up to 10Gb/s. The second technique is thermal stabilization of micro-ring resonator modulators through direct measurement of temperature using a monolithic PTAT temperature sensor. The measured temperature is used in a feedback loop to adjust the thermal tuner of the ring. A prototype is fabricated and a closed-loop feedback system is demonstrated to operate at 20Gb/s in the presence of temperature fluctuations. The third technique is a switched-capacitor based pre-emphasis technique designed to extend the inherently low bandwidth of carrier injection micro-ring modulators. A measured prototype of the optical transmitter achieves energy efficiency of 342fJ/bit at 10Gb/s and the wavelength stabilization circuit based on the monolithic PTAT sensor consumes 0.29mW.

Lastly, a first-order frequency synthesizer that is suitable for high-speed on-chip clock generation will be discussed. The proposed design features an architecture combining an LC quadrature VCO, two sample-and-holds, a PI, digital coarse-tuning, and rotational frequency detection for fine-tuning. In addition to an electrical reference clock, as an extra feature, the prototype chip is capable of receiving a low jitter optical reference clock generated by a high-repetition-rate mode-locked laser. The output clock at 8GHz has an integrated RMS jitter of 490fs, peak-to-peak periodic jitter of 2.06ps, and total RMS jitter of 680fs. The reference spurs are measured to be –64.3dB below the carrier frequency. At 8GHz the system consumes 2.49mW from a 1V supply.

Planar reflection of gaseous detonations

Pipes containing flammable gaseous mixtures may be subjected to internal detonation. When the detonation normally impinges on a closed end, a reflected shock wave is created to bring the flow back to rest. This study built on the work of Karnesky (2010) and examined deformation of thin-walled stainless steel tubes subjected to internal reflected gaseous detonations. A ripple pattern was observed in the tube wall for certain fill pressures, and a criterion was developed that predicted when the ripple pattern would form. A two-dimensional finite element analysis was performed using Johnson-Cook material properties; the pressure loading created by reflected gaseous detonations was accounted for with a previously developed pressure model. The residual plastic strain between experiments and computations was in good agreement.

During the examination of detonation-driven deformation, discrepancies were discovered in our understanding of reflected gaseous detonation behavior. Previous models did not accurately describe the nature of the reflected shock wave, which motivated further experiments in a detonation tube with optical access. Pressure sensors and schlieren images were used to examine reflected shock behavior, and it was determined that the discrepancies were related to the reaction zone thickness extant behind the detonation front. During these experiments reflected shock bifurcation did not appear to occur, but the unfocused visualization system made certainty impossible. This prompted construction of a focused schlieren system that investigated possible shock wave-boundary layer interaction, and heat-flux gauges analyzed the boundary layer behind the detonation front. Using these data with an analytical boundary layer solution, it was determined that the strong thermal boundary layer present behind the detonation front inhibits the development of reflected shock wave bifurcation.

Synthesis and potency of long end-associative polymers for mist control

Long linear polymers that are end-functionalized with associative groups were studied as additives to hydrocarbon fluids to mitigate the fire hazard associated with the presence of mist in a crash scenario. These polymers were molecularly designed to overcome both the shear-degradation of long polymer chains in turbulent flows, and the chain collapse induced by the random placement of associative groups along polymer backbones. Architectures of associative groups on the polymer chain ends that were tested included clusters of self-associative carboxyl groups and pairs of hetero-complementary associative units.

Linear polymers with clusters of discrete numbers of carboxyl groups on their chain ends were investigated first: an innovative synthetic strategy was devised to achieve unprecedented backbone lengths and precise control of the number of carboxyl groups on chain ends (N). We found that a very narrow range of N allows the co-existence of sufficient end-association strength and polymer solubility in apolar media. Subsequent steady-flow rheological study on solution behavior of such soluble polymers in apolar media revealed that the end-association of very long chains in apolar media leads to the formation of flower-like micelles interconnected by bridging chains, which trap significant fraction of polymer chains into looped structures with low contribution to mist-control. The efficacy of very long 1,4-polybutadiene chains end-functionalized with clusters of four carboxyl groups as mist-control additives for jet fuel was further tested. In addition to being shear-resistant, the polymer was found capable of providing fire-protection to jet fuel at concentrations as low as 0.3wt%. We also found that this polymer has excellent solubility in jet fuel over a wide range of temperature (-30 to +70°C) and negligible interference with dewatering of jet fuel. It does not cause an adverse increase in viscosity at concentrations where mist-control efficacy exists.

Four pairs of hetero-complementary associative end-groups of varying strengths were subsequently investigated, in the hopes of achieving supramolecular aggregates with both mist-control ability and better utilization of polymer building blocks. Rheological study of solutions of the corresponding complementary associative polymer pairs in apolar media revealed the strength of complementary end-association required to achieve supramolecular aggregates capable of modulating rheological properties of the solution.

Both self-associating and complementary associating polymers have therefore been found to resist shear degradation. The successful strategy of building soluble, end-associative polymers with either self-associative or complementary associative groups will guide the next generation of mist-control technology.