Fault Current Limiter Using YBCO Coated Conductor-The Limiting Factor and Its Recovery Time

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Test of a Modular Fault Current Limiter for 220 V Line Using YBCO Coated Conductor Tapes With Shunt Protection

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Fault current limiter using transformer and modular device of YBCO coated conductor

In this work, we report on the evaluation of a superconducting fault current limiter (SFCL). It is consisted of a modular superconducting device combined with a short-circuited transformer with a primary copper winding connected in series to the power line and the secondary side short-circuited by the superconducting device. The basic idea is adding a magnetic component to contribute to the current limitation by the impedance reflected to the line after transition of the superconducting device. The evaluation tests were performed with a prospective current up to 2 kA, with the short-circuited transformer of 2.5 kVA, 220 V/660 V connected to a test facility of 100 kVA power capacity. The resistive SFCL using a modular superconducting device was tested without degradation for a prospective fault current of 1.8 kA, achieving the limiting factor 2.78; the voltage achieved 282 V corresponding to an electric field of 11 V/m. The test performed with the combined SFCL (xsuperconducting device + transformer) using series and toroidal transformers showed current limiting factor of 3.1 and 2 times, respectively. The test results of the combined SFCL with short-circuited transformer showed undesirable influence of the transformer impedance, resulting in reduction of the fault current level. © 2002-2011 IEEE.

Prototype Fault Current Limiter Using Transformer and a Modular Device of YBCO Coated Conductor

A superconducting fault current limiter (SCFL) consisted of a transformer with low reactance connected to the power line and with the secondary winding short-circuited by a modular superconducting limiter device with 16 elements connected in series was constructed and tested. The designed coupling transformer has low dispersion reactance in order to limit the voltage drop in the power line within the range of 5 % to 10 %. The experimental results showed that an insertion of a 0.125 Omega resistance limited the peak current to a factor of 2.5 times of the unlimited current. The power dissipation reached 39 kW during 100 ms, with an energy density of 380 J/cm(3). Based on these results, the SCFL will be further tested in a 3 MVA (15 kV/380 V) generator for currents up to 10 kA.

Test results of fault current limiter using YBCO tapes with shunt protection

A Fault Current Limiter (FCL) based on high temperature superconducting elements with four tapes in parallel were designed and tested in 220 V line for a fault current peak between 1 kA to 4 kA. The elements employed second generation (2G) HTS tapes of YBCO coated conductor with stainless steel reinforcement. The tapes were electrically connected in parallel with effective length of 0.4 m per element (16 elements connected in series) constituting a single-phase unit. The FCL performance was evaluated through over-current tests and its recovery characteristics under load current were analyzed using optimized value of the shunt protection. The projected limiting ratio achieved a factor higher than 4 during fault of 5 cycles without degradation. Construction details and further test results will be shown in the paper. © 2010 IOP Publishing Ltd.

Location of single line-to-ground faults on distribution feeders using voltage measurements

This paper proposes a dedicated algorithm for lation of single line-to-ground faults in distribution systems. The proposed algorithm uses voltage and current phasors measured at the substation level, voltage magnitudes measured at some buses of the feeder, a database containing electrical, operational and topological parameters of the distribution networks, and fault simulation. Voltage measurements can be obtained using power quality devices already installed on the feeders or using voltage measurement devices dedicated for fault location. Using the proposed algorithm, likely faulted points that are located on feeder laterals geographically far from the actual faulted point are excluded from the results. Assessment of the algorithm efficiency was carried out using a 238 buses real-life distribution feeder. The results show that the proposed algorithm is robust for performing fast and efficient fault location for sustained single line-to-ground faults requiring less than 5% of the feeder buses to be covered by voltage measurement devices. © 2006 IEEE.

Electrical Power Distribution System modeling with VHDL-AMS for the construction of a Real-Time Digital Simulator using FPGAS devices

This paper presents a distribution feeder simulation using VHDL-AMS, considering the standard IEEE 13 node test feeder admitted as an example. In an electronic spreadsheet all calculations are performed in order to develop the modeling in VHDL-AMS. The simulation results are compared in relation to the results from the well knowing MatLab/Simulink environment, in order to verify the feasibility of the VHDL-AMS modeling for a standard electrical distribution feeder, using the software SystemVision™. This paper aims to present the first major developments for a future Real-Time Digital Simulator applied to Electrical Power Distribution Systems. © 2012 IEEE.

An efficient implementation of tabu search in feeder reconfiguration of distribution systems

This paper presents an efficient tabu search algorithm (TSA) to solve the problem of feeder reconfiguration of distribution systems. The main characteristics that make the proposed TSA particularly efficient are a) the way in which the neighborhood of the current solution was defined; b) the way in which the objective function value was estimated; and c) the reduction of the neighborhood using heuristic criteria. Four electrical systems, described in detail in the specialized literature, were used to test the proposed TSA. The result demonstrate that it is computationally very fast and finds the best solutions known in the specialized literature. © 2012 IEEE.

Fault current test of a bifilar Bi-2212 bulk coil

A bifilar Bi-2212 bulk coil with parallel shunt resistor was tested under fault current condition using a 3 MVA single-phase transformer in a 220 V-60 Hz line achieving fault current peak of 8 kA. The fault current tests are performed from steady state peak current of 200 A by applying controlled short circuits up to 8 kA varying the time period from one to six cycles. The test results show the function of the shunt resistor providing homogeneous quench behavior of the HTS coil besides its intrinsic stabilizing role. The limiting current ratio achieves a factor 4.2 during 5 cycles without any degradation.

The influence of area/volume ratio on microstructure and non-Ohmic properties of SnO2-based varistor ceramic blocks

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Comparative electrical behavior at low and high current of SnO(2)- and ZnO-based varistors

The complete I-V characteristics of SnO(2)-based varistors, particularly of the Pianaro system SCNCr consisting in 98.9%SnO(2)+1%CoO+0.05%Nb(2)O(5)+0.05%Cr(2)O(3), all in mol%, have been seldom reported in the literature. A comparative study at low and high currents of the nonohmic behavior of SCNCr- and ZnO-based varistors (modified Matsuoka system) is proposed in this work. The SCNCr system showed higher nonlinearity coefficients in the whole range of measured current. The electrical breakdown field (E(b)) was twice as high for the SCNCr system (5400 V/cm) than for the ZnO varistor (2600 V/cm) due to a smaller average grain size of the former (4.5 mu m) with respect to the latter (8.5 mu m). Nevertheless, we consider that another important factor responsible for the high E(b) in the SCNCr system is the great number of electrically active interfaces (85%) as determined with electrostatic force microscopy (EFM). It was also established that the SCNCr system might be produced in disks of smaller dimensions than that of commercial ZnO-based product, with a 5.0 cm(-1) minimal area-volume (A/V) ratio. The SCNCr reached the saturation current in a short time because of the high resistivity of the grains, which is five times higher than that of the grains in ZnO-based varistors.

Model for electrodes' filaments of hot cathode fluorescent lamps, during preheating with constant rms current

This paper presents a new model for the representation of electrodes' filaments of hot-cathode fluorescent lamps, during preheating processes based on the injection of currents with constant root mean square (rms) values. The main improvement obtained with this model is the prediction of the R-h/R-c ratio during the preheating process, as a function of the preheating time and of the rms current injected in the electrodes. Using the proposed model, it is possible to obtain an estimate of the time interval and the current that should be provided by the electronic ballast, in order to ensure a suitable preheating process. is estimate of time and current can be used as input data in the design of electronic ballasts with programmed lamp start, permitting the prediction of the R-h/R-c ratio during the initial steps of the design (theoretical analysis and digital simulation). Therefore, the use of the proposed model permits to reduce the necessity of several empirical adjustments in the prototype, in order to set the operation of electronic ballasts during the preheating process. This fact reduces time and costs associated to the global design procedure of electronic ballasts.

Test results of a superconducting fault current limiter using YBCO coated conductor

A single-phase superconducting fault current limiter (SFCL) using a 0.9 m length of YBCO coated conductor (CC) tape was tested in 220 V-60 Hz line for fault current up to 1 kA, operating in 77 K. In this work are presented the IN experimental curves measured under DC and AC currents for the electrical characterization of the CC tape in order to design a low voltage current limiter. The experimental setup is described and the test results are presented for a unit conducting a steady nominal AC current of 50 A and also during the fault time (I to 5 cycles.) the performance of the CC-based SFCL providing the limiting resistance developed in the whole tape length after few milliseconds of the beginning of the fault was analyzed.

A low-voltage programmable-gain current-mode amplifier

A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.

Measurement of the ratio B(t -> Wb)/B(t -> Wq) in pp collisions at root s=8 TeV

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)