A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency

A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.

An analog implementation of radial basis neural networks (RBNN) using BiCMOS technology

This paper describes a analog implementation of radial basis neural networks (RBNN) in BiCMOS technology. The RBNN uses a gaussian function obtained through the characteristic of the bipolar differential pair. The gaussian parameters (gain, center and width) is changed with programmable current source. Results obtained with PSPICE software is showed.

A linearly-tunable OTA-C sinusoidal oscillator for low-voltage applications

A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.

A low-voltage programmable-gain current-mode amplifier

A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.

An active leakage-injection scheme applied to low-voltage SRAMs

An active leakage-injection scheme (ALIS) for low-voltage (LV) high-density (HD) SRAMs is presented. By means of a feedback loop comprising a servo-amplifier and a common-drain MOSFET, a current matching the respective bit-line leakage is injected onto the line during precharge and sensing, preventing the respective capacitances from erroneous discharges. The technique is able to handle leakages up to hundreds of μA at high operating temperatures. Since no additional timing is required, read-out operations are performed at no speed penalty. A simplified 256×1bit array was designed in accordance with a 0.35 CMOS process and 1.2V-supply. A range of PSPICE simulation attests the efficacy of ALIS. With an extra power consumption of 242 μW, a 200 μA-leakage @125°C, corresponding to 13.6 times the cell current, is compensated.

On designing linearly tunable high-Q OTA-C filters with low sensitivity

This paper discusses a design approach for a high-Q low-sensitivity OTA-C biquad bandpass section. An optimal relationship is established between transconductances defining the differenceβ - γ in the Q-factor denominator, setting the Q-sensitivity to tuning voltages around unity. A 30-MHz filter was designed based on a 0.35μn CMOS process and VDD=3.3V. A range of circuit simulation supports the theoretical analysis. Q-factor spans from 20.5 to 60, while ensuring filter stability along the tuning range. Although a Mode-operating OTA is used, the procedure can be extended to other types of transconductor.

A low-voltage low-sensitivity sinusoidal VCO for DPLL realizations

A quasi-sinusoidal linearly tunable OTA-C VCO built with triode-region transconductors is presented. Oscillation upon power-on is ensured by RHP poles associated with gate-drain capacitances of OTA input devices. Since the OTA nonlinearity stabilizes the amplitude, the oscillation frequency f0 is first-order independent of VDD, making the VCO adequate to mixed-mode designs. A range of simulations attests the theoretical analysis. As part of a DPLL, the VCO was prototyped on a 0.8μm CMOS process, occupying an area of 0.15mm2. Nominal f0 is 1MHz, with K VCo=8.4KHz/mV. Measured sensitivity to VDD is below 2.17, while phase noise is -86dBc at 100-KHz offset. The feasibility of the VCO for higher frequencies is verified by a redesign based on a 0.35μm CMOS process and VDD=3.3V, with a linear frequency-span of l3.2MHz - 61.5MHz.

A Gm-C bump equalizer for low-voltage low-power applications

A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.

Common architecture for discrete wavelet transform analysis and synthesis with sequential and constant processing elements

This paper adresses the problem on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. Including series memory register banks, one integrated circuit Signal Analyzer, ultrasonic range, is presented.

Hardware implementation of type-2 programmable fuzzifier

The design of full programmable type-2 membership function circuit is presented in this paper. This circuit is used to implement the fuzzifier block of Type-2 Fuzzy Logic Controller chip. In this paper the type-2 fuzzy set was obtained by blurring the width of the type-1 fuzzy set. This circuit allows programming the height and the shape of the membership function. It operates in current mode, with supply voltage of 3.3V. The simulation results of interval type-2 membership function circuit have been done in CMOS 0.35μm technology using Mentor Graphics software. © 2011 IEEE.

Bandgap voltage reference with low susceptibility to electromagnetic interference (EMI)

In this paper, the susceptibility of a current-mode bandgap voltage reference to electromagnetic interference (EMI) superimposed to the power supply is investigated by simulation. Designed for AMS 0.35 CMOS process, the circuit provides a stable voltage reference in the temperature range of -40-150°C. When EMI disturbances are present, the circuit exhibits only 6.7 mV of offset for interfering signals in the frequency range of 150 kHz-1 GHz. © 2011 ACM.

Differential mixer with NMOS/PMOS stack at switching stage

This paper proposes a novel differential mixer topology. The traditional stage of switching is replaced by a stack of NMOS and PMOS transistors combined. A design is given of a 900 MHz down-conversion mixer using a 0.35 μm CMOS process. Comparison with conventional mixer shows that the topology leads to a better performance in terms of conversion gain and linearity. ©2012 IEEE.

Detection of cavitated approximal surfaces using cone beam CT and intraoral receptors

Objectives: The aim of this study was to compare cone beam CT (CBCT) in a small field of view (FOV) with a solid-state sensor and a photostimulable phosphor plate system for detection of cavitated approximal surfaces. Methods: 257 non-filled approximal surfaces from human permanent premolars and molars were recorded by two intraoral digital receptors, a storage phosphor plate (Digora Optime, Soredex) and a solid-state CMOS sensor (Digora Toto, Soredex), and scanned in a cone beam CT unit (3D Accuitomo FPD80, Morita) with a FOV of 4 cm and a voxel size of 0.08 mm. Image sections were carried out in the axial and mesiodistal tooth planes. Six observers recorded surface cavitation in all images. Validation of the true absence or presence of surface cavitation was performed by inspecting the surfaces under strong light with the naked eye. Differences in sensitivity, specificity and agreement were estimated by analysing the binary data in a generalized linear model using an identity link function. Results: A significantly higher sensitivity was obtained by all observers with CBCT (p,0.001), which was not compromised by a lower specificity. Therefore, a significantly higher overall agreement was obtained with CBCT (p,0.001). There were no significant differences between the Digora Optime phosphor plate system and the Digora Toto CMOS sensor for any parameter. Conclusions: CBCT was much more accurate in the detection of surface cavitation in approximal surfaces than intraoral receptors. The differences are interpreted as clinically significant. A CBCT examination performed for other reasons should also be assessed for approximal surface cavities in teeth without restorations. © 2013 The British Institute of Radiology.

Projeto de uma referência de tensão com baixa susceptibilidade a interferência eletromagnética (EMI)

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Digital Inline Holographic Microscopy (DIHM) of weakly-scattering subjects

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)