Performance analysis of double digit decimal multiplier on various FPGA logic families

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that performs 2 digit multiplications simultaneously in one clock cycle. This design offers low latency and high throughput. When multiplying two n-digit operands to produce a 2n-digit product, the design has a latency of (n / 2) 1 cycles. The paper presents area and delay comparisons for 7-digit, 16-digit, 34-digit double digit decimal multipliers on different families of Xilinx, Altera, Actel and Quick Logic FPGAs. The multipliers presented can be extended to support decimal floating-point multiplication for IEEE P754 standard

Glucoamylase immobilized on montmorillonite: influence of nature of binding on surface properties of clay-support and activity of enzyme

Glucoamylase was immobilized on acid activated montmorillonite clay via two different procedures namely adsorption and covalent binding. The immobilized enzymes were characterized by XRD, NMR and N2 adsorption measurements and the activity of immobilized glucoamylase for starch hydrolysis was determined in a batch reactor. XRD shows intercalation of enzyme into the clay matrix during both immobilization procedures. Intercalation occurs via the side chains of the amino acid residues, the entire polypeptide backbone being situated at the periphery of the clay matrix. 27Al NMR studies revealed the different nature of interaction of enzyme with the support for both immobilization techniques. N2 adsorption measurements indicated a sharp drop in surface area and pore volume for the covalently bound glucoamylase that suggested severe pore blockage. Activity studies were performed in a batch reactor. The adsorbed and covalently bound glucoamylase retained 49% and 66% activity of the free enzyme respectively. They showed enhanced pH and thermal stabilities. The immobilized enzymes also followed Michaelis–Menten kinetics. Km was greater than the free enzyme that was attributed to an effect of immobilization. The immobilized preparations demonstrated increased reusability as well as storage stability.

Acid activated montmorillonite: an efficient immobilization support for improving reusability, storage stability and operational stability of enzymes

Three enzymes, α-amylase, glucoamylase and invertase, were immobilized on acid activated montmorillonite K 10 via two independent techniques, adsorption and covalent binding. The immobilized enzymes were characterized by XRD, N2 adsorption measurements and 27Al MAS-NMR spectroscopy. The XRD patterns showed that all enzymes were intercalated into the clay inter-layer space. The entire protein backbone was situated at the periphery of the clay matrix. Intercalation occurred through the side chains of the amino acid residues. A decrease in surface area and pore volume upon immobilization supported this observation. The extent of intercalation was greater for the covalently bound systems. NMR data showed that tetrahedral Al species were involved during enzyme adsorption whereas octahedral Al was involved during covalent binding. The immobilized enzymes demonstrated enhanced storage stability. While the free enzymes lost all activity within a period of 10 days, the immobilized forms retained appreciable activity even after 30 days of storage. Reusability also improved upon immobilization. Here again, covalently bound enzymes exhibited better characteristics than their adsorbed counterparts. The immobilized enzymes could be successfully used continuously in the packed bed reactor for about 96 hours without much loss in activity. Immobilized glucoamylase demonstrated the best results.

Realization of Optical Logic Gates Using the Thermal Lens Effect

A sensitive method based on the principle of photothermal phenomena to realize optical logic gates is presented. A dual beam thermal lens method using low power cw lasers in a dye-doped polymer can be very effectively used as an alternate technique to perform the logical function such as NAND, AND and OR.

A new look at reversible logic implementation of decimal adder

Reversibility plays a fundamental role when logic gates such as AND, OR, and XOR are not reversible. computations with minimal energy dissipation are considered. Hence, these gates dissipate heat and may reduce the life of In recent years, reversible logic has emerged as one of the most the circuit. So, reversible logic is in demand in power aware important approaches for power optimization with its circuits. application in low power CMOS, quantum computing and A reversible conventional BCD adder was proposed in using conventional reversible gates.

High performance, low latency double digit decimal multiplier on ASIC and FPGA

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that offers low latency and high throughput. This design performs two digit multiplications simultaneously in one clock cycle. Double digit fixed point decimal multipliers for 7digit, 16 digit and 34 digit are simulated using Leonardo Spectrum from Mentor Graphics Corporation using ASIC Library. The paper also presents area and delay comparisons for these fixed point multipliers on Xilinx, Altera, Actel and Quick logic FPGAs. This multiplier design can be extended to support decimal floating point multiplication for IEEE 754- 2008 standard.

Quick Addition of Decimals Using Reversible Conservative Logic

In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, nanotechnology and quantum computing. This research proposes quick addition of decimals (QAD) suitable for multi-digit BCD addition, using reversible conservative logic. The design makes use of reversible fault tolerant Fredkin gates only. The implementation strategy is to reduce the number of levels of delay there by increasing the speed, which is the most important factor for high speed circuits.

Automated synthesis of delay-reduced Reed-Muller universal logic module networks

This paper presents a new approach to implement Reed-Muller Universal Logic Module (RM-ULM) networks with reduced delay and hardware for synthesizing logic functions given in Reed-Muller (RM) form. Replication of single control line RM-ULM is used as the only design unit for defining any logic function. An algorithm is proposed that does exhaustive branching to reduce the number of levels and modules required to implement any logic function in RM form. This approach attains a reduction in delay, and power over other implementations of functions having large number of variables.

Unconstrained Handwritten Malayalam Character Recognition using Wavelet Transform and Support vector Machine Classifier

This paper presents the application of wavelet processing in the domain of handwritten character recognition. To attain high recognition rate, robust feature extractors and powerful classifiers that are invariant to degree of variability of human writing are needed. The proposed scheme consists of two stages: a feature extraction stage, which is based on Haar wavelet transform and a classification stage that uses support vector machine classifier. Experimental results show that the proposed method is effective

Using Neural Network Classifier Support Vector Machine Regression for the prediction of Melting Point of Drug – like compounds

In our study we use a kernel based classification technique, Support Vector Machine Regression for predicting the Melting Point of Drug – like compounds in terms of Topological Descriptors, Topological Charge Indices, Connectivity Indices and 2D Auto Correlations. The Machine Learning model was designed, trained and tested using a dataset of 100 compounds and it was found that an SVMReg model with RBF Kernel could predict the Melting Point with a mean absolute error 15.5854 and Root Mean Squared Error 19.7576

Impact of process parameters on L-glutaminase production by marine Vibrio costicola in solid state fermentation using polystyrene as an inert support

Process parameters influencing e-glutaminase production by marine Vibrio costicola in solid state fermentation (SSF) using polystyrene as an inert support were optimised. Maximal enzyme yield (157 U/g dry substrate) was obtained at 2% (w/w) t:glutamine, 35°C and pH 7.0 after 24 h. Maltose and potassium dihydrogen phosphate at 1% (w/w) concentration enhanced enzyme yield by 23 and 18%, respectively, while nitrogen sources had an inhibitory effect. Leachate with high specific activity for glutaminase (4.2 U/mg protein) and low viscosity (0-966 Ns/m 2) was recovered from the polystyrene SSF system