Quick Addition of Decimals Using Reversible Conservative Logic


Autoria(s): Poulose Jacob,K; Rekha, James K; Shahana, T K; Sasi, S
Data(s)

11/06/2014

11/06/2014

18/12/2007

Resumo

In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, nanotechnology and quantum computing. This research proposes quick addition of decimals (QAD) suitable for multi-digit BCD addition, using reversible conservative logic. The design makes use of reversible fault tolerant Fredkin gates only. The implementation strategy is to reduce the number of levels of delay there by increasing the speed, which is the most important factor for high speed circuits.

Advanced Computing and Communications, 2007. ADCOM 2007. International Conference on

Cochin University of Science and Technology

Identificador

http://dyuthi.cusat.ac.in/purl/3876

Idioma(s)

en

Publicador

IEEE

Palavras-Chave #decimal arithmetic #delay reduction #fault detection #reversible logic
Tipo

Article