52 resultados para SILICON CMOS
Resumo:
This work reports a theoretical study aimed to identify the plasmonic resonance condition for a system formed by metallic nanoparticles embedded in an a-Si: H matrix. The study is based on a Tauc-Lorentz model for the electrical permittivity of a-Si: H and a Drude model for the metallic nanoparticles. It is calculated the The polarizability of an sphere and ellipsoidal shaped metal nanoparticles with radius of 20 nm. We also performed FDTD simulations of light propagation inside this structure reporting a comparison among the effects caused by a single nanoparticles of Aluminium, Silver and, as a comparison, an ideally perfectly conductor. The simulation results shows that is possible to obtain a plasmonic resonance in the red part of the spectrum (600-700 nm) when 20-30 nm radius Aluminium ellipsoids are embedded into a-Si: H.
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We present results, obtained by means of an analytic study and a numerical simulation, about the resonant condition necessary to produce a Localized Surface Plasmonic Resonance (LSPR) effect at the surface of metal nanospheres embedded in an amorphous silicon matrix. The study is based on a Lorentz dispersive model for a-Si:H permittivity and a Drude model for the metals. Considering the absorption spectra of a-Si:H, the best choice for the metal nanoparticles appears to be aluminium, indium or magnesium. No difference has been observed when considering a-SiC:H. Finite-difference time-domain (FDTD) simulation of an Al nanosphere embedded into an amorphous silicon matrix shows an increased scattering radius and the presence of LSPR induced by the metal/semiconductor interaction under green light (560 nm) illumination. Further results include the effect of the nanoparticles shape (nano-ellipsoids) in controlling the wavelength suitable to produce LSPR. It has been shown that is possible to produce LSPR in the red part of the visible spectrum (the most critical for a-Si:H solar cells applications in terms of light absorption enhancement) with aluminium nano-ellipsoids. As an additional results we may conclude that the double Lorentz-Lorenz model for the optical functions of a-Si:H is numerically stable in 3D simulations and can be used safely in the FDTD algorithm. A further simulation study is directed to determine an optimal spatial distribution of Al nanoparticles, with variable shapes, capable to enhance light absorption in the red part of the visible spectrum, exploiting light trapping and plasmonic effects. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Resumo:
This book discusses in detail the CMOS implementation of energy harvesting. The authors describe an integrated, indoor light energy harvesting system, based on a controller circuit that dynamically and automatically adjusts its operation to meet the actual light circumstances of the environment where the system is placed. The system is intended to power a sensor node, enabling an autonomous wireless sensor network (WSN). Although designed to cope with indoor light levels, the system is also able to work with higher levels, making it an all-round light energy harvesting system. The discussion includes experimental data obtained from an integrated manufactured prototype, which in conjunction with a photovoltaic (PV) cell, serves as a proof of concept of the desired energy harvesting system. © 2016 Springer International Publishing. All rights are reserved.
Resumo:
This article describes an experimental study on ash deposition during the co-firing of bituminous coal with pine sawdust and olive stones in a laboratory furnace. The main objective of this study was to relate the ash deposit rates with the type of biomass burned and its thermal percentage in the blend. The thermal percentage of biomass in the blend was varied between 10% and 50% for both sawdust and olive stones. For comparison purposes, tests have also been performed using only coal or only biomass. During the tests, deposits were collected with the aid of an air-cooled deposition probe placed far from the flame region, where the mean gas temperature was around 640 degrees C. A number of deposit samples were subsequently analyzed on a scanning electron microscope equipped with an energy dispersive X-ray detector. Results indicate that blending sawdust with coal decreases the deposition rate as compared with the firing of unblended coal due to both the sawdust low ash content and its low alkalis content. The co-firing of coal and sawdust yields deposits with high levels of silicon and aluminium which indicates the presence of ashes with high fusion temperature and, thus, with less capacity to adhere to the surfaces. In contrast, in the co-firing of coal with olive stones the deposition rate increases as compared with the firing of unblended coal and the deposits produced present high levels of potassium, which tend to increase their stickiness.
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In this paper we present an amorphous silicon device that can be used in two operation modes to measure the concentration of ions in solution. While crystalline devices present a higher sensitivity, their amorphous counterpart present a much lower fabrication cost, thus enabling the production of cheap disposable sensors for use, for example, in the food industry. The devices were fabricated on glass substrates by the PECVD technique in the top gate configuration, where the metallic gate is replaced by an electrolytic solution with an immersed Ag/AgCl reference electrode. Silicon nitride is used as gate dielectric enhancing the sensitivity and passivation layer used to avoid leakage and electrochemical reactions. In this article we report on the semiconductor unit, showing that the device can be operated in a light-assisted mode, where changes in the pH produce changes on the measured ac photocurrent. In alternative the device can be operated as a conventional ion selective field effect device where changes in the pH induce changes in the transistor's threshold voltage.
Resumo:
Implementing monolithic DC-DC converters for low power portable applications with a standard low voltage CMOS technology leads to lower production costs and higher reliability. Moreover, it allows miniaturization by the integration of two units in the same die: the power management unit that regulates the supply voltage for the second unit, a dedicated signal processor, that performs the functions required. This paper presents original techniques that limit spikes in the internal supply voltage on a monolithic DC-DC converter, extending the use of the same technology for both units. These spikes are mainly caused by fast current variations in the path connecting the external power supply to the internal pads of the converter power block. This path includes two parasitic inductances inbuilt in bond wires and in package pins. Although these parasitic inductances present relative low values when compared with the typical external inductances of DC-DC converters, their effects can not be neglected when switching high currents at high switching frequency. The associated overvoltage frequently causes destruction, reliability problems and/or control malfunction. Different spike reduction techniques are presented and compared. The proposed techniques were used in the design of the gate driver of a DC-DC converter included in a power management unit implemented in a standard 0.35 mu m CMOS technology.
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We report a field-effect phototransistor with a channel comprising a thin nanocrystalline silicon transport layer and a thicker hydrogenated amorphous silicon absorption layer. The semiconductor and dielectric layers were deposited by radio-frequency plasma enhanced chemical vapor deposition. The phototransistor with channel length of 24 microns and photosensitive area of 1.4 mm(2) shows an off-current of about 1 pA, and high photoconductive gain in the subthreshold region. Measurements of the quantum efficiency at different incident light intensities and biasing conditions, along with spectral-response characteristics, and threshold voltage stability characterization demonstrate the feasibility of the phototransistor for low light level detection.
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A evolução da tecnologia CMOS tem possibilitado uma maior densidade de integração de circuitos tornando possível o aumento da complexidade dos sistemas. No entanto, a integração de circuitos de gestão de potência continua ainda em estudo devido à dificuldade de integrar todos os componentes. Esta solução apresenta elevadas vantagens, especialmente em aplicações electrónicas portáteis alimentadas a baterias, onde a autonomia é das principais características. No âmbito dos conversores redutores existem várias topologias de circuitos que são estudadas na área de integração. Na categoria dos conversores lineares utiliza-se o LDO (Low Dropout Regulator), apresentando no entanto baixa eficiência para relações de conversão elevadas. Os conversores comutados são elaborados através do recurso a circuitos de comutação abrupta, em que a eficiência deste tipo de conversores não depende do rácio de transformação entre a tensão de entrada e a de saída. A diminuição física dos processos CMOS tem como consequência a redução da tensão máxima que os transístores suportam, impondo o estudo de soluções tolerantes a “altatensão”, com o intuito de manter compatibilidade com tensões superiores que existam na placa onde o circuito é incluído. Os sistemas de gestão de energia são os primeiros a acompanhar esta evolução, tendo de estar aptos a fornecer a tensão que os restantes circuitos requerem. Neste trabalho é abordada uma metodologia de projecto para conversores redutores CCCC comutados em tecnologia CMOS, tendo-se maximizado a frequência com vista à integração dos componentes de filtragem em circuito integrado. A metodologia incide sobre a optimização das perdas totais inerentes à comutação e condução, dos transístores de potência e respectivos circuitos auxiliares. É apresentada uma nova metodologia para o desenvolvimento de conversores tolerantes a “alta-tensão”.
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This article reports on a-Si:H-based low-leakage blue-enhanced photodiodes for dual-screen x-ray imaging detectors. Doped nanocrystalline silicon was incorporated in both the n- and p-type regions to reduce absorption losses for light incoming from the top and bottom screens. The photodiode exhibits a dark current density of 900 pA/cm(2) and an external quantum efficiency up to 90% at a reverse bias of 5 V. In the case of illumination through the tailored p-layer, the quantum efficiency of 60% at a 400 nm wavelength is almost double that for the conventional a-Si:H n-i-p photodiode.
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We report on structural, electronic, and optical properties of boron-doped, hydrogenated nanocrystalline silicon (nc-Si:H) thin films deposited by plasma-enhanced chemical vapor deposition (PECVD) at a substrate temperature of 150 degrees C. Film properties were studied as a function of trimethylboron-to-silane ratio and film thickness. The absorption loss of 25% at a wavelength of 400 nm was measured for the 20 nm thick films on glass and glass/ZnO:Al substrates. By employing the p(+) nc-Si:H as a window layer, complete p-i-n structures were fabricated and characterized. Low leakage current and enhanced sensitivity in the UV/blue range were achieved by incorporating an a-SiC:H buffer between the p- and i-layers.
Resumo:
A two terminal optically addressed image processing device based on two stacked sensing/switching p-i-n a-SiC:H diodes is presented. The charge packets are injected optically into the p-i-n sensing photodiode and confined at the illuminated regions changing locally the electrical field profile across the p-i-n switching diode. A red scanner is used for charge readout. The various design parameters and addressing architecture trade-offs are discussed. The influence on the transfer functions of an a-SiC:H sensing absorber optimized for red transmittance and blue collection or of a floating anode in between is analysed. Results show that the thin a-SiC:H sensing absorber confines the readout to the switching diode and filters the light allowing full colour detection at two appropriated voltages. When the floating anode is used the spectral response broadens, allowing B&W image recognition with improved light-to-dark sensitivity. A physical model supports the image and colour recognition process.
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A visible/near-infrared optical sensor based on an ITO/SiOx/n-Si structure with internal gain is presented. This surface-barrier structure was fabricated by a low-temperature processing technique. The interface properties and carder transport were investigated from dark current-voltage and capacitance-voltage characteristics. Examination of the multiplication properties was performed under different light excitation and reverse bias conditions. The spectral and pulse response characteristics are analysed. The current amplification mechanism is interpreted by the control of electron current by the space charge of photogenerated holes near the SiOx/Si interface. The optical sensor output characteristics and some possible device applications are presented.
Resumo:
In recent works large area hydrogenated amorphous silicon p-i-n structures with low conductivity doped layers were proposed as single element image sensors. The working principle of this type of sensor is based on the modulation, by the local illumination conditions, of the photocurrent generated by a light beam scanning the active area of the device. In order to evaluate the sensor capabilities is necessary to perform a response time characterization. This work focuses on the transient response of such sensor and on the influence of the carbon contents of the doped layers. In order to evaluate the response time a set of devices with different percentage of carbon incorporation in the doped layers is analyzed by measuring the scanner-induced photocurrent under different bias conditions.
Resumo:
Amorphous glass/ZnO-Al/p(a-Si:H)/i(a-Si:H)/n(a-Si1-xCx:H)/Al imagers with different n-layer resistivities were produced by plasma enhanced chemical vapour deposition technique (PE-CVD). An image is projected onto the sensing element and leads to spatially confined depletion regions that can be readout by scanning the photodiode with a low-power modulated laser beam. The essence of the scheme is the analog readout, and the absence of semiconductor arrays or electrode potential manipulations to transfer the information coming from the transducer. The influence of the intensity of the optical image projected onto the sensor surface is correlated with the sensor output characteristics (sensitivity, linearity blooming, resolution and signal-to-noise ratio) are analysed for different material compositions (0.5 < x < 1). The results show that the responsivity and the spatial resolution are limited by the conductivity of the doped layers. An enhancement of one order of magnitude in the image intensity signal and on the spatial resolution are achieved at 0.2 mW cm(-2) light flux by decreasing the n-layer conductivity by the same amount. A physical model supported by electrical simulation gives insight into the image-sensing technique used.
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Os reguladores de tensão LDO são utilizados intensivamente na actual indústria de electrónica, são uma parte essencial de um bloco de gestão de potência para um SoC. O aumento de produtos portáteis alimentados por baterias levou ao crescimento de soluções totalmente integradas, o que degrada o rendimento dos blocos analógicos que o constituem face às perturbações introduzidas na alimentação. Desta forma, surge a necessidade de procurar soluções cada vez mais optimizadas, impondo assim novas soluções, e/ou melhoramentos dos circuitos de gestão de potência, tendo como objectivo final o aumento do desempenho e da autonomia dos dispositivos electrónicos. Normalmente este tipo de reguladores tem a corrente de saída limitada, devido a problemas de estabilidade associados. Numa tentativa de evitar a instabilidade para as correntes de carga definidas e aumentar o PSRR do mesmo, é apresentado um método de implementação que tem como objectivo melhorar estas características, em que se pretende aumentar o rendimento e melhorar a resposta à variação da carga. No entanto, a técnica apresentada utiliza polarização adaptativa do estágio de potência, o que implica um aumento da corrente de consumo. O regulador LDO foi implementado na tecnologia CMOS UMC 0.18μm e ocupa uma área inferior a 0,2mm2. Os resultados da simulação mostram que o mesmo suporta uma transição de corrente 10μA para 100mA, com uma queda de tensão entre a tensão de alimentação e a tensão de saída inferior a 200mV. A estabilidade é assegurada para todas as correntes de carga. O tempo de estabelecimento é inferior a 6μs e as variações da tensão de saída relativamente a seu valor nominal são inferiores a 5mV. A corrente de consumo varia entre os 140μA até 200μA, o que permite atingir as especificações proposta para um PSRR de 40dB@10kHz.