Toward Self-Assembled Ferroelectric Random Access Memories: Hard-Wired Switching Capacitor Arrays with Almost Tb/in.2 Densities

We report on the successful fabrication of arrays of switchable nanocapacitors made by harnessing the self-assembly of materials. The structures are composed of arrays of 20-40 nm diameter Pt nanowires, spaced 50-100 nm apart, electrodeposited through nanoporous alumina onto a thin film lower electrode on a silicon wafer. A thin film ferroelectric (both barium titanate (BTO) and lead zirconium titanate (PZT)) has been deposited on top of the nanowire array, followed by the deposition of thin film upper electrodes. The PZT nanocapacitors exhibit hysteresis loops with substantial remnant polarizations, while although the switching performance was inferior, the low-field characteristics of the BTO nanocapacitors show dielectric behavior comparable to conventional thin film heterostructures. While registration is not sufficient for commercial RAM production, this is nevertheless an embryonic form of the highest density hard-wired FRAM capacitor array reported to date and compares favorably with atomic force microscopy read-write densities.

Conformal oxide coating of carbon nanotubes

The International Roadmap for Ferroelectric Memories requires three-dimensional integration of high-dielectric materials onto metal interconnects or bottom electrodes by 2010. Here, we demonstrate the possibility of conformally coating carbon nanotubes with high-dielectric oxide as a first step toward ultrahigh integration density of three-dimensional ferroelectric random access memories.

Liquid source misted chemical deposition process of three-dimensional nano-ferroelectrics with substrate heating

A modification of liquid source misted chemical deposition process (LSMCD) with heating mist and substrate has developed, and this enabled to control mist penetrability and fluidity on sidewalls of three-dimensional structures and ensure step coverage. A modified LSMCD process allowed a combinatorial approach of Pb(Zr,Ti)O-3 (PZT) thin films and carbon nanotubes (CNTs) toward ultrahigh integration density of ferroelectric random access memories (FeRAMs). The CNTs templates were survived during the crystallization process of deposited PZT film onto CNTs annealed at 650 degrees C in oxygen ambient due to a matter of minute process, so that the thermal budget is quite small. The modified LSMCD process opens up the possibility to realize the nanoscale capacitor structure of ferroelectric PZT film with CNTs electrodes toward ultrahigh integration density FeRAMs.

6-T SRAM cell design with nanoscale double-gate SOI MOSFETs: impact of source/drain engineering and circuit topology

The impact of source/drain engineering on the performance of a six-transistor (6-T) static random access memory (SRAM) cell, based on 22 nm double-gate (DG) SOI MOSFETs, has been analyzed using mixed-mode simulation, for three different circuit topologies for low voltage operation. The trade-offs associated with the various conflicting requirements relating to read/write/standby operations have been evaluated comprehensively in terms of eight performance metrics, namely retention noise margin, static noise margin, static voltage/current noise margin, write-ability current, write trip voltage/current and leakage current. Optimal design parameters with gate-underlap architecture have been identified to enhance the overall SRAM performance, and the influence of parasitic source/drain resistance and supply voltage scaling has been investigated. A gate-underlap device designed with a spacer-to-straggle (s/sigma) ratio in the range 2-3 yields improved SRAM performance metrics, regardless of circuit topology. An optimal two word-line double-gate SOI 6-T SRAM cell design exhibits a high SNM similar to 162 mV, I-wr similar to 35 mu A and low I-leak similar to 70 pA at V-DD = 0.6 V, while maintaining SNM similar to 30% V-DD over the supply voltage (V-DD) range of 0.4-0.9 V.

Ferroelectric hafnium oxide: A CMOS-compatible and highly scalable approach to future ferroelectric memories

With the ability to engineer ferroelectricity in HfO2 thin films, manufacturable and highly scaled MFM capacitors and MFIS-FETs can be implemented into a CMOS-environment. NVM properties of the resulting devices are discussed and contrasted to existing perovskite based FRAM.

Fast Mining of Interesting Phrases from Subsets of Text Corpora

We address the problem of mining interesting phrases from subsets of a text corpus where the subset is specified using a set of features such as keywords that form a query. Previous algorithms for the problem have proposed solutions that involve sifting through a phrase dictionary based index or a document-based index where the solution is linear in either the phrase dictionary size or the size of the document subset. We propose the usage of an independence assumption between query keywords given the top correlated phrases, wherein the pre-processing could be reduced to discovering phrases from among the top phrases per each feature in the query. We then outline an indexing mechanism where per-keyword phrase lists are stored either in disk or memory, so that popular aggregation algorithms such as No Random Access and Sort-merge Join may be adapted to do the scoring at real-time to identify the top interesting phrases. Though such an approach is expected to be approximate, we empirically illustrate that very high accuracies (of over 90%) are achieved against the results of exact algorithms. Due to the simplified list-aggregation, we are also able to provide response times that are orders of magnitude better than state-of-the-art algorithms. Interestingly, our disk-based approach outperforms the in-memory baselines by up to hundred times and sometimes more, confirming the superiority of the proposed method.

Gaining Access to Data Sources in Statutory Social Work Agencies: The Long and Winding Road

This paper details a researcher's experience of gaining access to three statutory social work agencies in order to conduct a study examining how social workers respond to family support cases and how parents and carers experience the intervention of social workers in these cases. The stages in gaining access are outlined, the gate-keepers involved at each stage are identified and some of the difficulties encountered are highlighted and discussed. The paper concludes that researchers need to give greater priority to access considerations and that social work agencies need to give greater priority to co-operation with researchers.