Transforming Researchers into Educators: Some Reflections on the University College Dublin School of Law Syllabus Design Workshop 2010

The priority given to the development of research skills during doctrinal legal education often neglects the importance of equipping PhD students with the pedagogical skills necessary to fulfill their important educational role as academics. Thus, in many instances there is a significant gap in the requisite skill base that PhD students acquire when they complete their doctrinal education. This paper outlines a first step that has been taken to address this deficiency in postgraduate legal education in Ireland. The PhD community of the University College Dublin (UCD) School of Law convened an internal Syllabus Design Workshop in April 2010 in order to provide doctrinal students with an opportunity to design a university module and to explore the issues which arise in undertaking such an exercise. The first part of this paper outlines how the workshop was conceived and convened, and provides an account of the considerations that each student had to take into account in the design of a syllabus. From here, we address the content of the workshop and reflect upon some of the important issues which were
raised. Finally, we offer a number of recommendations in relation to the development of doctrinal students as future educators. By highlighting the importance of uniting research and teaching, it is hoped that this paper will contribute to postgraduate legal education in Ireland,and also internationally.

Virtual Engineering Centre - Examples of Virtual Prototyping and Multidisciplinary Design Optimization

The requirement for the use of Virtual Engineering, encompassing the construction of Virtual Prototypes using Multidisciplinary Design Optimisation, for the development of future aerospace platforms and systems is discussed. Some of the activities at the Virtual Engineering Centre, a University of Liverpool initiative, are described and a number of case studies involving a range of applications of Virtual Engineering illustrated.

Rapid design of discrete orthonormal wavelet transforms

A methodology which allows a non-specialist to rapidly design silicon wavelet transform cores has been developed. This methodology is based on a generic architecture utilizing time-interleaved coefficients for the wavelet transform filters. The architecture is scaleable and it has been parameterized in terms of wavelet family, wavelet type, data word length and coefficient word length. The control circuit is designed in such a way that the cores can also be cascaded without any interface glue logic for any desired level of decomposition. This parameterization allows the use of any orthonormal wavelet family thereby extending the design space for improved transformation from algorithm to silicon. Case studies for stand alone and cascaded silicon cores for single and multi-stage analysis respectively are reported. The typical design time to produce silicon layout of a wavelet based system has been reduced by an order of magnitude. The cores are comparable in area and performance to hand-crafted designs. The designs have been captured in VHDL so they are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

QRD and SVD processor design based on an approximate rotations algorithm

A silicon implementation of the Approximate Rotations algorithm capable of carrying the computational load of algorithms such as QRD and SVD, within the real-time realisation of applications such as Adaptive Beamforming, is described. A modification to the original Approximate Rotations algorithm to simplify the method of optimal angle selection is proposed. Analysis shows that fewer iterations of the Approximate Rotations algorithm are required compared with the conventional CORDIC algorithm to achieve similar degrees of accuracy. The silicon design studies undertaken provide direct practical evidence of superior performance with the Approximate Rotations algorithm, requiring approximately 40% of the total computation time of the conventional CORDIC algorithm, for a similar silicon area cost. © 2004 IEEE.

Rapid VLSI design of biorthogonal wavelet transform cores

A rapid design methodology for biorthogonal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture for the wavelet filters. The architecture offers efficient hardware utilization by combining the linear phase property of biorthogonal filters with decimation in a MAC based implementation. The design has been captured in VHDL and parameterized in terms of wavelet type, data word length and coefficient word length. The control circuit is embedded within the cores and allows them to be cascaded without any interface glue logic for any desired level of decomposition. The design time to produce silicon layout of a biorthogonal wavelet based system is typically less than a day. The resulting silicon cores produced are comparable in area and performance to hand-crafted designs. The designs are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

EFFECT OF IMPELLER DESIGN ON PRODUCT HOMOGENIETY IN HIGH SHEAR WET GRANULATION

Design of small mixer impellers is not tailored for granulation as they are designed for a wide range of processes. The Kenwood KM070 was employed as a standard apparatus to undertake this investigation. Five different impeller designs were used, possessing different shapes and surface areas. The aim of this research was to evaluate the performances of these impellers to provide
guidance on the selection and design for the purposes of granulation. Lactose granules were produced using wet granulation with water as the binder.
The efficacy of respective granulates was measured by adding an optically
sensitive tracer.This was used to determine powder concentrations
within various regions of the granulator. It was found that impeller design influenced the homogeneity of the granules; and therefore can affect final product performance.