8 resultados para Chip Size Packaging

em QUB Research Portal - Research Directory and Institutional Repository for Queen's University Belfast


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Life-history theory predicts an optimal offspring size, irrespective of reproductive effort; however, in some species offspring size correlates positively with maternal size. We examine hypotheses for why this latter situation should occur in the whelk Buccinum undatum. The trade-offs between aspects of reproduction in whelks are complicated due to the provision of protective egg capsules. Many eggs are placed within each capsule but c. 99% of these eggs are consumed by the remaining developing young. Large maternal size results in more eggs, larger eggs, more eggs consumed per hatchling, more capsules, larger capsules, more eggs per capsule, a larger number of hatchlings per capsule and larger hatchlings. Increased intra-capsule and post-hatch sibling competition may decrease the marginal value for additional young and select for larger young, however, our data do not support this explanation. Instead, packaging constraints within each capsule limit the size of hatchlings but this constraint is relaxed for medium to large females because they produce large capsules. Small females appear to produce young below optimum size because of the space constraint thus explaining the correlation between maternal size and offspring size.

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A novel open-ended waveguide cavity resonator for the microwave curing of bumps, underfills and encapsulants is described. The open oven has the potential to provide fast alignment of devices during flip-chip assembly, direct chip attach, surface mount assembly or wafer-scale level packaging. The prototype microwave oven was designed to operate at X-band for ease of testing, although a higher frequency version is planned. The device described in the paper takes the form of a waveguide cavity resonator. It is approximately square in cross-section and is filled with a low-loss dielectric with a relative permittivity of 6. It is excited by end-fed probes in order to couple power preferentially into the TM3,3,k mode with the object of forming nine 'hot-spots' in the open end. Low power tests using heat sensitive film demonstrate clearly that selective heating in multiple locations in the open end of the oven is achievable.

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A microfluidic glass chip system incorporating a quartz crystal microbalance (QCM) to measure the square root of the viscosity-density product of room temperature ionic liquids (RTILs) is presented. The QCM covers a central recess on a glass chip, with a seal formed by tightly clamping from above outside the sensing region. The change in resonant frequency of the QCM allows for the determination of the square root viscosity-density product of RTILs to a limit of similar to 10 kg m(-2) s(-0.5). This method has reduced the sample size needed for characterization from 1.5 ml to only 30 mu l and allows the measurement to be made in an enclosed system.

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Per-core scratchpad memories (or local stores) allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architectures become more distributed. We have designed cache-integrated network interfaces, appropriate for scalable multicores, that combine the best of two worlds – the flexibility of caches and the efficiency of scratchpad memories: on-chip SRAM is configurably shared among caching, scratchpad, and virtualized network interface (NI) functions. This paper presents our architecture, which provides local and remote scratchpad access, to either individual words or multiword blocks through RDMA copy. Furthermore, we introduce event responses, as a technique that enables software configurable communication and synchronization primitives. We present three event response mechanisms that expose NI functionality to software, for multiword transfer initiation, completion notifications for software selected sets of arbitrary size transfers, and multi-party synchronization queues. We implemented these mechanisms in a four-core FPGA prototype, and measure the logic overhead over a cache-only design for basic NI functionality to be less than 20%. We also evaluate the on-chip communication performance on the prototype, as well as the performance of synchronization functions with simulation of CMPs with up to 128 cores. We demonstrate efficient synchronization, low-overhead communication, and amortized-overhead bulk transfers, which allow parallelization gains for fine-grain tasks, and efficient exploitation of the hardware bandwidth.

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A new, front-end image processing chip is presented for real-time small object detection. It has been implemented using a 0.6 µ, 3.3 V CMOS technology and operates on 10-bit input data at 54 megasamples per second. It occupies an area of 12.9 mm×13.6 mm (including pads), dissipates 1.5 W, has 92 I/O pins and is to be housed in a 160-pin ceramic quarter flat-pack. It performs both one- and two-dimensional FIR filtering and a multilayer perceptron (MLP) neural network function using a reconfigurable array of 21 multiplication-accumulation cells which corresponds to a window size of 7×3. The chip can cope with images of 2047 pixels per line and can be cascaded to cope with larger window sizes. The chip performs two billion fixed point multiplications and additions per second.

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Features of chip formation can inform the mechanism of a machining process. In this paper, a series of orthogonal cutting experiments were carried out on unidirectional carbon fiber reinforced polymer (UD-CFRP) under cutting speed of 0.5 m/min. The specially designed orthogonal cutting tools and high-speed camera were used in this paper. Two main factors are found to influence the chip morphology, namely the depth of cut (DOC) and the fiber orientation (angle ), and the latter of which plays a more dominant role. Based on the investigation of chip formation, a new approach is proposed for predicting fracture toughness of the newly machined surface and the total energy consumption during CFRP orthogonal cutting is introduced as a function of the surface energy of machined surface, the energy consumed to overcome friction, and the energy for chip fracture. The results show that the proportion of energy spent on tool-chip friction is the greatest, and the proportions of energy spent on creating new surface decrease with the increasing of fiber angle.