Controlling current and voltage type interfaces in power-hardware-in-the-loop simulations

The usual practice to study a large power system is through digital computer simulation. However, the impact of large scale use of small distributed generators on a power network cannot be evaluated strictly by simulation since many of these components cannot be accurately modelled. Moreover, the network complexity makes the task of practical testing on a physical network nearly impossible. This study discusses the paradigm of interfacing a real-time simulation of a power system to real-life hardware devices. This type of splitting a network into two parts and running a real-time simulation with a physical system in parallel is usually termed as power-hardware-in-the-loop (PHIL) simulation. The hardware part is driven by a voltage source converter that amplifies the signals of the simulator. In this paper, the effects of suitable control strategy on the performance of PHIL and the associated stability aspects are analysed in detail. The analyses are validated through several experimental tests using an real-time digital simulator.

Hardware design and implementation of a MAVLink interface for an FPGA-based autonomous UAV flight control system

This paper details the initial design and planning of a Field Programmable Gate Array (FPGA) implemented control system that will enable a path planner to interact with a MAVLink based flight computer. The design is aimed at small Unmanned Aircraft Vehicles (UAV) under autonomous operation which are typically subject to constraints arising from limited on-board processing capabilities, power and size. An FPGA implementation for the de- sign is chosen for its potential to address such limitations through low power and high speed in-hardware computation. The MAVLink protocol offers a low bandwidth interface for the FPGA implemented path planner to communicate with an on-board flight computer. A control system plan is presented that is capable of accepting a string of GPS waypoints generated on-board from a previously developed in- hardware Genetic Algorithm (GA) path planner and feeding them to the open source PX4 autopilot, while simultaneously respond- ing with flight status information.

Stability synthesis of power hardware-in-the-loop (PHIL) simulation

A virtual power system can be interfaced with a physical system to form a power hardware-in-the-loop (PHIL) simulation. In this scheme, the virtual system can be simulated in a fast parallel processor to provide near real-time outputs, which then can be interfaced to a physical hardware that is called the hardware under test (HuT). Stable operation of the entire system, while maintaining acceptable accuracy, is the main challenge of a PHIL simulation. In this paper, after an extended stability analysis for voltage and current type interfaces, some guidelines are provided to have a stable PHIL simulation. The presented analysis have been evaluated by performing several experimental tests using a Real Time Digital Simulator (RTDS™) and a voltage source converter (VSC). The practical test results are consistent with the proposed analysis.

Stability analysis and implementation of Power-Hardware-in-the-Loop for power system testing

This project develops the required guidelines to assure stable and accurate operation of Power-Hardware-in-the-Loop implementations. The proposals of this research have been theoretically analyzed and practically examined using a Real-Time Digital Simulator. In this research, the interaction between software simulated power network and the physical power system has been studied. The conditions for different operating regimes have been derived and the corresponding analyses have been presented.

ICEPOLE: High-speed, hardware-oriented authenticated encryption

This paper introduces our dedicated authenticated encryption scheme ICEPOLE. ICEPOLE is a high-speed hardware-oriented scheme, suitable for high-throughput network nodes or generally any environment where specialized hardware (such as FPGAs or ASICs) can be used to provide high data processing rates. ICEPOLE-128 (the primary ICEPOLE variant) is very fast. On the modern FPGA device Virtex 6, a basic iterative architecture of ICEPOLE reaches 41 Gbits/s, which is over 10 times faster than the equivalent implementation of AES-128-GCM. The throughput-to-area ratio is also substantially better when compared to AES-128-GCM. We have carefully examined the security of the algorithm through a range of cryptanalytic techniques and our findings indicate that ICEPOLE offers high security level.

The dual nature of information systems in enabling a new wave of hardware ventures: Towards a theory

Hardware ventures are emerging entrepreneurial firms that create new market offerings based on development of digital devices. These ventures are important elements in the global economy but have not yet received much attention in the literature. Our interest in examining hardware ventures is specifically in the role that information system (IS) resources play in enabling them. We ask how the role of IS resources for hardware ventures can be conceptualized and develop a framework for assessment. Our framework builds on the distinction of operand and operant resources and distinguishes between two key lifecycle stages of hardware ventures: start-up and growth. We show how this framework can be used to discuss the role, nature, and use of IS for hardware ventures and outline empirical research strategies that flow from it. Our work contributes to broadening and enriching the IS field by drawing attention to its role in significant and novel phenomena.

Power network in the loop : subsystem testing using a switching amplifier

“Hardware in the Loop” (HIL) testing is widely used in the automotive industry. The sophisticated electronic control units used for vehicle control are usually tested and evaluated using HIL-simulations. The HIL increases the degree of realistic testing of any system. Moreover, it helps in designing the structure and control of the system under test so that it works effectively in the situations that will be encountered in the system. Due to the size and the complexity of interaction within a power network, most research is based on pure simulation. To validate the performance of physical generator or protection system, most testing is constrained to very simple power network. This research, however, examines a method to test power system hardware within a complex virtual environment using the concept of the HIL. The HIL testing for electronic control units and power systems protection device can be easily performed at signal level. But performance of power systems equipments, such as distributed generation systems can not be evaluated at signal level using HIL testing. The HIL testing for power systems equipments is termed here as ‘Power Network in the Loop’ (PNIL). PNIL testing can only be performed at power level and requires a power amplifier that can amplify the simulation signal to the power level. A power network is divided in two parts. One part represents the Power Network Under Test (PNUT) and the other part represents the rest of the complex network. The complex network is simulated in real time simulator (RTS) while the PNUT is connected to the Voltage Source Converter (VSC) based power amplifier. Two way interaction between the simulator and amplifier is performed using analog to digital (A/D) and digital to analog (D/A) converters. The power amplifier amplifies the current or voltage signal of simulator to the power level and establishes the power level interaction between RTS and PNUT. In the first part of this thesis, design and control of a VSC based power amplifier that can amplify a broadband voltage signal is presented. A new Hybrid Discontinuous Control method is proposed for the amplifier. This amplifier can be used for several power systems applications. In the first part of the thesis, use of this amplifier in DSTATCOM and UPS applications are presented. In the later part of this thesis the solution of network in the loop testing with the help of this amplifier is reported. The experimental setup for PNIL testing is built in the laboratory of Queensland University of Technology and the feasibility of PNIL testing has been evaluated using the experimental studies. In the last section of this thesis a universal load with power regenerative capability is designed. This universal load is used to test the DG system using PNIL concepts. This thesis is composed of published/submitted papers that form the chapters in this dissertation. Each paper has been published or submitted during the period of candidature. Chapter 1 integrates all the papers to provide a coherent view of wide bandwidth switching amplifier and its used in different power systems applications specially for the solution of power systems testing using PNIL.

Virtual design process : design validation tool schematic approach in car carrier

An important aspect of designing any product is validation. Virtual design process (VDP) is an alternative to hardware prototyping in which analysis of designs can be done without manufacturing physical samples. In recent years, VDP have been generated either for animation or filming applications. This paper proposes a virtual reality design process model on one of the applications when used as a validation tool. This technique is used to generate a complete design guideline and validation tool of product design. To support the design process of a product, a virtual environment and VDP method were developed that supports validation and an initial design cycle performed by a designer. The product model car carrier is used as illustration for which virtual design was generated. The loading and unloading sequence of the model for the prototype was generated using automated reasoning techniques and was completed by interactively animating the product in the virtual environment before complete design was built. By using the VDP process critical issues like loading, unloading, Australian Design rules (ADR) and clearance analysis were done. The process would save time, money in physical sampling and to large extent in complete math generation. Since only schematic models are required, it saves time in math modelling and handling of bigger size assemblies due to complexity of the models. This extension of VDP process for design evaluation is unique and was developed, implemented successfully. In this paper a Toll logistics and J Smith and Sons car carrier which is developed under author’s responsibility has been used to illustrate our approach of generating design validation via VDP.

The knowledge advantage (K-Adv): unleashing creativity and innovation

The K-Adv has been developed around the concept that it comprises an ICT enabling infrastructure that encompasses ICT hardware and software infrastructure facilities together with an enabling ICT support system; a leadership infrastructure support system that provides the vision for its implementation and the realisation capacity for the vision to be realised; and the necessary people infrastructure that includes the people capabilities and capacities supported by organisational processes that facilitates this resource to be mobilised.

Privacy and security in open and trusted health information systems

The Open and Trusted Health Information Systems (OTHIS) Research Group has formed in response to the health sector’s privacy and security requirements for contemporary Health Information Systems (HIS). Due to recent research developments in trusted computing concepts, it is now both timely and desirable to move electronic HIS towards privacy-aware and security-aware applications. We introduce the OTHIS architecture in this paper. This scheme proposes a feasible and sustainable solution to meeting real-world application security demands using commercial off-the-shelf systems and commodity hardware and software products.

Towards an acoustic environmental observatory

The need for large scale environmental monitoring to manage environmental change is well established. Ecologists have long used acoustics as a means of monitoring the environment in their field work, and so the value of an acoustic environmental observatory is evident. However, the volume of data generated by such an observatory would quickly overwhelm even the most fervent scientist using traditional methods. In this paper we present our steps towards realising a complete acoustic environmental observatory - i.e. a cohesive set of hardware sensors, management utilities, and analytical tools required for large scale environmental monitoring. Concrete examples of these elements, which are in active use by ecological scientists, are also presented

Peripheral ocular monochromatic aberrations

Aberrations affect image quality of the eye away from the line of sight as well as along it. High amounts of lower order aberrations are found in the peripheral visual field and higher order aberrations change away from the centre of the visual field. Peripheral resolution is poorer than that in central vision, but peripheral vision is important for movement and detection tasks (for example driving) which are adversely affected by poor peripheral image quality. Any physiological process or intervention that affects axial image quality will affect peripheral image quality as well. The aim of this study was to investigate the effects of accommodation, myopia, age, and refractive interventions of orthokeratology, laser in situ keratomileusis and intraocular lens implantation on the peripheral aberrations of the eye. This is the first systematic investigation of peripheral aberrations in a variety of subject groups. Peripheral aberrations can be measured either by rotating a measuring instrument relative to the eye or rotating the eye relative to the instrument. I used the latter as it is much easier to do. To rule out effects of eye rotation on peripheral aberrations, I investigated the effects of eye rotation on axial and peripheral cycloplegic refraction using an open field autorefractor. For axial refraction, the subjects fixated at a target straight ahead, while their heads were rotated by ±30º with a compensatory eye rotation to view the target. For peripheral refraction, the subjects rotated their eyes to fixate on targets out to ±34° along the horizontal visual field, followed by measurements in which they rotated their heads such that the eyes stayed in the primary position relative to the head while fixating at the peripheral targets. Oblique viewing did not affect axial or peripheral refraction. Therefore it is not critical, within the range of viewing angles studied, if axial and peripheral refractions are measured with rotation of the eye relative to the instrument or rotation of the instrument relative to the eye. Peripheral aberrations were measured using a commercial Hartmann-Shack aberrometer. A number of hardware and software changes were made. The 1.4 mm range limiting aperture was replaced by a larger aperture (2.5 mm) to ensure all the light from peripheral parts of the pupil reached the instrument detector even when aberrations were high such as those occur in peripheral vision. The power of the super luminescent diode source was increased to improve detection of spots passing through the peripheral pupil. A beam splitter was placed between the subjects and the aberrometer, through which they viewed an array of targets on a wall or projected on a screen in a 6 row x 7 column matrix of points covering a visual field of 42 x 32. In peripheral vision, the pupil of the eye appears elliptical rather than circular; data were analysed off-line using custom software to determine peripheral aberrations. All analyses in the study were conducted for 5.0 mm pupils. Influence of accommodation on peripheral aberrations was investigated in young emmetropic subjects by presenting fixation targets at 25 cm and 3 m (4.0 D and 0.3 D accommodative demands, respectively). Increase in accommodation did not affect the patterns of any aberrations across the field, but there was overall negative shift in spherical aberration across the visual field of 0.10 ± 0.01m. Subsequent studies were conducted with the targets at a 1.2 m distance. Young emmetropes, young myopes and older emmetropes exhibited similar patterns of astigmatism and coma across the visual field. However, the rate of change of coma across the field was higher in young myopes than young emmetropes and was highest in older emmetropes amongst the three groups. Spherical aberration showed an overall decrease in myopes and increase in older emmetropes across the field, as compared to young emmetropes. Orthokeratology, spherical IOL implantation and LASIK altered peripheral higher order aberrations considerably, especially spherical aberration. Spherical IOL implantation resulted in an overall increase in spherical aberration across the field. Orthokeratology and LASIK reversed the direction of change in coma across the field. Orthokeratology corrected peripheral relative hypermetropia through correcting myopia in the central visual field. Theoretical ray tracing demonstrated that changes in aberrations due to orthokeratology and LASIK can be explained by the induced changes in radius of curvature and asphericity of the cornea. This investigation has shown that peripheral aberrations can be measured with reasonable accuracy with eye rotation relative to the instrument. Peripheral aberrations are affected by accommodation, myopia, age, orthokeratology, spherical intraocular lens implantation and laser in situ keratomileusis. These factors affect the magnitudes and patterns of most aberrations considerably (especially coma and spherical aberration) across the studied visual field. The changes in aberrations across the field may influence peripheral detection and motion perception. However, further research is required to investigate how the changes in aberrations influence peripheral detection and motion perception and consequently peripheral vision task performance.

Design and evaluation of an image analysis platform for low-power, low-bandwidth camera networks

We describe the design and evaluation of a platform for networks of cameras in low-bandwidth, low-power sensor networks. In our work to date we have investigated two different DSP hardware/software platforms for undertaking the tasks of compression and object detection and tracking. We compare the relative merits of each of the hardware and software platforms in terms of both performance and energy consumption. Finally we discuss what we believe are the ongoing research questions for image processing in WSNs.

Making the processes of designing explicit within an information technology environment

In this paper, technology is described as involving processes whereby resources are utilised to satisfy human needs or to take advantage of opportunities, to develop practical solutions to problems. This study, set within one type of technology context, information technology, investigated how, through a one semester undergraduate university course, elements of technological processes were made explicit to students. While it was acknowledged in the development and implementation of this course that students needed to learn technical skills, technological skills and knowledge, including design, were seen as vital also, to enable students to think about information technology from a perspective that was not confined and limited to `technology as hardware and software'. This paper describes how the course, set within a three year program of study, was aimed at helping students to develop their thinking and their knowledge about design processes in an explicit way. An interpretive research approach was used and data sources included a repertory grid `survey'; student interviews; video recordings of classroom interactions, audio recordings of lectures, observations of classroom interactions made by researchers; and artefacts which included students' journals and portfolios. The development of students' knowledge about design practices is discussed and reflections upon student knowledge development in conjunction with their learning experiences are made. Implications for ensuring explicitness of design practice within information technology contexts are presented, and the need to identify what constitutes design knowledge is argued.

Asymmetrical DC link voltage configuration for a diode-clamped inverter

There is a trade off between a number of output voltage levels and the reliability and efficiency of a multilevel converter. A new configuration of diode-clamped multilevel inverters with a different combination of DC link capacitors voltage has been proposed in this paper. Two different symmetrical and asymmetrical unequal arrangements for a four-level diode-clamped inverter have been compared, in order to find an optimum arrangement with lower switching losses and optimised output voltage quality. The simulation and hardware results for a four-level inverter show that the asymmetrical configuration can obtain more output voltage levels with the same number of components compared with a conventional four-level inverter and this will lead to the reduction of the harmonic content of the output voltage. A new family of multi-output DC-DC converters with a simple control strategy has been utilised as a front-end converter to supply the DC link capacitor voltages for the optimised configuration.