ICEPOLE: High-speed, hardware-oriented authenticated encryption
Data(s) |
2014
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Resumo |
This paper introduces our dedicated authenticated encryption scheme ICEPOLE. ICEPOLE is a high-speed hardware-oriented scheme, suitable for high-throughput network nodes or generally any environment where specialized hardware (such as FPGAs or ASICs) can be used to provide high data processing rates. ICEPOLE-128 (the primary ICEPOLE variant) is very fast. On the modern FPGA device Virtex 6, a basic iterative architecture of ICEPOLE reaches 41 Gbits/s, which is over 10 times faster than the equivalent implementation of AES-128-GCM. The throughput-to-area ratio is also substantially better when compared to AES-128-GCM. We have carefully examined the security of the algorithm through a range of cryptanalytic techniques and our findings indicate that ICEPOLE offers high security level. |
Formato |
application/pdf |
Identificador | |
Publicador |
Springer Berlin Heidelberg |
Relação |
http://eprints.qut.edu.au/82453/7/__staffhome.qut.edu.au_staffgroupm%24_meaton_Desktop_Draft%20paper_Pieprzyk.pdf DOI:10.1007/978-3-662-44709-3_22 Morawiecki, Pawel, Gaj, Kris, Homsirikamol, Ekawat, Matusiewicz, Krystian, Pieprzyk, Josef, Rogawski, Marcin, Srebrny, Marian, & Wójcik, Marcin (2014) ICEPOLE: High-speed, hardware-oriented authenticated encryption. Lecture Notes in Computer Science [Proceedings of the 16th International Workshop on Cryptographic Hardware and Embedded Systems - CHES 2014], 8731, pp. 392-413. |
Direitos |
Copyright 2014 International Association for Cryptologic Research The final publication is available at Springer via http://dx.doi.org/10.1007/978-3-662-44709-3_22 |
Fonte |
School of Electrical Engineering & Computer Science; Science & Engineering Faculty |
Palavras-Chave | #Authenticated encryption scheme #Authenticated cipher #ICEPOLE |
Tipo |
Journal Article |