A simple firing delay control circuit for bridge converters

A simple ramp control firing circuit, suitable for use with fully controlled, line-commutated thyristor bridge circuits, is discussed here. This circuit uses very few components and generates the synchronized firing pulses in a simple way. It operates from a single 15 V Supply and has an inherent pulse inhibit facility. This circuit provides the synchronized firing pulses for both thyristors of the same limb in a bridge. To ensure reliability, wide triggering pulses are used, which are modulated to pass through the pulse transformers1 and demodulated before being fed to the thyristor gates. The use of throe such circuits only for a three-phase bridge is discussed.

Microprocessor Based Sinusoidal PWM Inverter by DMA Transfer

The implementation of three-phase sinusoidal pulse-width-modulated inverter control strategy using microprocessor is discussed in this paper. To save CPU time, the DMA technique is used for transferring the switching pattern from memory to the pulse amplifier and isolation circuits of individual thyristors in the inverter bridge. The method of controlling both voltage and frequency is discussed here.

Nonideal negative resistors and capacitors using an operational amplifier

Negative impedance converters (NIC's) may be used to realize negative driving-point impedances. The effect of the nonideal characteristics of the operational amplifier such as finite frequencydependent gain and output impedance on the performance of the negative impedances is analyzed. Detailed equivalent circuits showing the additional positive or negative inductive impedances due to the nonideal characteristics are given for negative resistance and negative capacitance realizations, and their relative performances are compared. The experimental results confirm the validity of the equivalent circuits. The effect of the slew rate of the operational amplifier on the maximum signal-handling capability (SHC) of the negative impedances at high frequencies is studied. Practical design considerations for achieving wider bandwidth as well as improved SHC are discussed.

Ternary function and circuit design using ternary multiplexers

The recent trend towards minimizing the interconnections in large scale integration (LSI) circuits has led to intensive investigation in the development of ternary circuits and the improvement of their design. The ternary multiplexer is a convenient and useful logic module which can be used as a basic building block in the design of a ternary system. This paper discusses a systematic procedure for the simplification and realization of ternary functions using ternary multiplexers as building blocks. Both single level and multilevel multiplexing techniques are considered. The importance of the design procedure is highlighted by considering two specific applications, namely, the development of ternary adder/subtractor and TCD to ternary converter.

Time-Domain Measurement of Voltage Induction by Transient EM Fields

An efficient measurement technique for studying the effect of transient electromagnetic fields under controlled conditions has been described. Broad-band TEM fields with a rise-time of a few nanoseconds were generated using a stripline method. Theoretical results are obtained and experimental measurements which confirm these results are described. The work will form the basis for a study of the susceptibility of digital integrated circuits and their interconnections to transient electromagnetic fields.

Characteristics of nonideal operational amplifiers

The departures of the operational amplifiers (OA's) from the ideal performance and their effect on VCV's in the inverting and noninverting mode are discussed. It is found that for the same ideal gain, the bandwidths for the inverting and noninverting modes are different, the former being less. Complete equivalent circuits describing the frequency dependance of the input and output impedances for both modes are given. In particular, the output impedance is shown to be inductive for the frequencies of interest, and this is also confirmed by experimental results.

Effect of amplifier imperfections on active networks

The deviation in the performance of active networks due to practical operational amplifiers (OA) is mainly because of the finite gain bandwidth productBand nonzero output resistanceR_0. The effect ofBandR_0on two OA impedances and single and multi-OA filters are discussed. In filters, the effect ofR_0is to add zeros to the transfer function often making it nonminimum phase. A simple method of analysis has been suggested for 3-OA biquad and coupled biquad circuits. A general method of noise minimization of the generalized impedance converter (GIC), while operating OA's within the prescribed voltage and current limits, is also discussed. The 3-OA biquadratic sections analyzed also exhibit noise behavior and signal handling capacity similar to the GIC. The GIC based structures are found to be better than other configurations both in biquadratic sections and direct realizations of higher order transfer functions.

Hybrid algorithms for power system unit commitment

Four hybrid algorithms has been developed for the solution of the unit commitment problem. They use simulated annealing as one of the constituent techniques, and produce lower cost schedules; two of them have less overhead than other soft computing techniques. They are also more robust to the choice of parameters. A special technique avoids the generating of infeasible schedules, and thus reduces computation time.

Leveraging Partially Enhanced Scan for Improved Observability in Delay Fault Testing

Enhanced Scan design can significantly improve the fault coverage for two pattern delay tests at the cost of exorbitantly high area overhead. The redundant flip-flops introduced in the scan chains have traditionally only been used to launch the two-pattern delay test inputs, not to capture tests results. This paper presents a new, much lower cost partial Enhanced Scan methodology with both improved controllability and observability. Facilitating observation of some hard to observe internal nodes by capturing their response in the already available and underutilized redundant flip-flops improves delay fault coverage with minimal or almost negligible cost. Experimental results on ISCAS'89 benchmark circuits show significant improvement in TDF fault coverage for this new partial enhance scan methodology.

Quadrature generation techniques for frequency multiplication based oscillators

Frequency multiplication (FM) can be used to design low power frequency synthesizers. This is achieved by running the VCO at a much reduced frequency, while employing a power efficient frequency multiplier, and also thereby eliminating the first few dividers. Quadrature signals can be generated by frequency- multiplying low frequency I/Q signals, however this also multiplies the quadrature error of these signals. Another way is generating additional edges from the low-frequency oscillator (LFO) and develop a quadrature FM. This makes the I-Q precision heavily dependent on process mismatches in the ring oscillator. In this paper we examine the use of fewer edges from LFO and a single stage polyphase filter to generate approximate quadrature signals, which is then followed by an injection-locked quadrature VCO to generate high- precision I/Q signals. Simulation comparisons with the existing approach shows that the proposed method offers very good phase accuracy of 0.5deg with only a modest increase in power dissipation for 2.4 GHz IEEE 802.15.4 standard using UMC 0.13 mum RFCMOS technology.

Slim P‐E hysteresis loop and anomalous dielectric response in sol-gel derived antiferroelectric PbZrO3 thin films

Sol-gel derived PbZrO3 (PZ) thin films have been deposited on Pt(111)/Ti/SiO2/Si substrate and according to the pseudotetragonal symmetry of PZ, the relatively preferred (110)t oriented phase formation has been noticed. The room temperature P‐E hysteresis loops have been observed to be slim by nature. The slim hysteresis loops are attributed to the [110]t directional antiparallel lattice motion of Pb ions and by the directionality of the applied electric field. Pure PZ formation has been characterized by the dielectric phase transition at 235 °C and antiferroelectric P‐E hysteresis loops at room temperature. Dielectric response has been characterized within a frequency domain of 100 Hz–1 MHz at various temperatures ranging from 40 to 350 °C. Though frequency dispersion of dielectric behaves like a Maxwell–Wagner type of relaxation, ω2 dependency of ac conductivity indicates that there must be G‐C equivalent circuit dominance at high frequency. The presence of trap charges in PZ has been determined by Arrhenius plots of ac conductivity. The temperature dependent n (calculated from the universal power law of ac conductivity) values indicate an anomalous behavior of the trapped charges. This anomaly has been explained by strongly and weakly correlated potential wells of trapped charges and their behavior on thermal activation. The dominance of circuit∕circuits resembling Maxwell–Wagner type has been investigated by logarithmic Nyquist plots at various temperatures and it has been justified that the dielectric dispersion is not from the actual Maxwell–Wagner-type response.

Optimal configurations of active fiber composites based on asymptotic torsional analysis - art. no. 641413

Active Fiber Composites (AFC) possess desirable characteristics over a wide range of smart structure applications, such as vibration, shape and flow control as well as structural health monitoring. This type of material, capable of collocated actuation and sensing, call be used in smart structures with self-sensing circuits. This paper proposes four novel applications of AFC structures undergoing torsion: sensors and actuators shaped as strips and tubes; and concludes with a preliminary failure analysis. To enable this, a powerful mathematical technique, the Variational Asymptotic Method (VAM) was used to perform cross-sectional analyses of thin generally anisotropic AFC beams. The resulting closed form expressions have been utilized in the applications presented herein.

Linear transconductor with flipped voltage follower in 130 nm CMOS

This paper presents a modified design method for linear transconductor circuit in 130 nm CMOS technology to improve linearity, robustness against process induced threshold voltage variability and reduce harmonic distortion. Source follower in the adaptively biased differential pair (ABDP) linear transconductor circuit is replaced with flipped voltage follower to improve the efficiency of the tail current source, which is connected to a conventional differential pair. The simulation results show the performance of the modified circuit also has better speed, noise performance and common mode rejection ratio compared to the ABDP circuit.

Reliability analysis of torsional varactor

A torsional MEMS varactor with wide dynamic range, lower actuation voltage and isolation between actuation voltage and signal voltage has been proposed in C. Venkatesh et al. (2005). In this paper we address the effects of pull-in, residual stress and continuous cycling on the performance of torsional MEMS varactor.