Correlations, quantum entanglement and interference in nanoscopic systems

Several of the most interesting quantum effects can or could be observed in nanoscopic systems. For example, the effect of strong correlations between electrons and of quantum interference can be measured in transport experiments through quantum dots, wires, individual molecules and rings formed by large molecules or arrays of quantum dots. In addition, quantum coherence and entanglement can be clearly observed in quantum corrals. In this paper we present calculations of transport properties through Aharonov-Bohm strongly correlated rings where the characteristic phenomenon of charge-spin separation is clearly observed. Additionally quantum interference effects show up in transport through pi-conjugated annulene molecules producing important effects on the conductance for different source-drain configurations, leading to the possibility of an interesting switching effect. Finally, elliptic quantum corrals offer an ideal system to study quantum entanglement due to their focalizing properties. Because of an enhanced interaction between impurities localized at the foci, these systems also show interesting quantum dynamical behaviour and offer a challenging scenario for quantum information experiments.

Large-Signal Model for Independent DG MOSFET

In this paper, we show the limitations of the traditional charge linearization techniques for modeling terminal charges of the independent double-gate metal-oxide-semiconductor field-effect transistors. Based on our recent computationally efficient Poisson solution for independent double gate transistors, we propose a new charge linearization technique to model the terminal charges and transcapacitances. We report two different types of quasistatic large-signal models for the long-channel device. In the first type, the terminal charges are expressed as closed-form functions of the source- and drain-end inversion charge densities and found to be accurate when the potential distribution at source end of the channel is hyperbolic in nature. The second type, which is found to be accurate in all regimes of operations, is based on the quadratic spline collocation technique and requires the input voltage equation to be solved two more times, apart from the source and drain ends.

High On-Off Ratio Bilayer Graphene Complementary Field Effect Transistors

In this paper, we propose a novel S/D engineering for dual-gated Bilayer Graphene (BLG) Field Effect Transistor (FET) using doped semiconductors (with a bandgap) as source and drain to obtain unipolar complementary transistors. To simulate the device, a self-consistent Non-Equilibrium Green's Function (NEGF) solver has been developed and validated against published experimental data. Using the simulator, we predict an on-off ratio in excess of 10(4) and a subthreshold slope of similar to 110mV/decade with excellent scalability and current saturation, for a 20nm gate length unipolar BLG FET. However, the performance of the proposed device is found to be strongly dependent on the S/D series resistance effect. The obtained results show significant improvements over existing reports, marking an important step towards bilayer graphene logic devices.

Life-history of Neurospora intermedia in a sugar cane field

The life-history of Neurospora in nature has remained largely unknown. The present study attempts to remedy this. The following conclusions are based on observation of Neurospora on fire-scorched sugar cane in agricultural fields, and reconstruction experiments using a colour mutant to inoculate sugar cane burned in the laboratory. The fungus persists in soil as heat-resistant dormant ascospores. These are activated by a chemical(s) released into soil from the burnt substrate. The chief diffusible activator of ascospores is furfural and the germinating ascospores infect the scorched substrate. An invasive mycelium grows progressively upwards inside the juicy sugar cane and produces copious macroconidia externally through fire-induced openings formed in the plant tissue, or by the mechanical rupturing of the plant epidermal tissue by the mass of mycelium. The loose conidia are dispersed by wind and/or foraged by microfauna. It is suggested that the constant production of macroconidia, and their ready dispersal, serve a physiological role: to drain the substrate of minerals and soluble sugars, thereby creating nutritional conditions which stimulate sexual reproduction by the fungus. Sexual reproduction in the sugar-depleted cellulosic substrate occurs after macroconidiation has ceased totally and is favoured by the humid conditions prevailing during the monsoon rains. Profuse microconidiophores and protoperithecia are produced simultaneously in the pockets below the loosened epidermal tissue. Presumably protoperithecia are fertilized by microconidia which are possibly transmitted by nematodes active in the dead plant tissue. Mature perithecia release ascospores in situ which are passively liberated in the soil by the disintegration of the plant material and are, apparently, distributed by rain or irrigation water.

Field emission properties of carbon nanotube arrays with defects and impurities

Field emission from carbon nanotubes (CNTs) in the form of arrays or thin films give rise to several strongly correlated process of electromechanical interaction and degradation. Such processes are mainly due to (1) electron-phonon interaction (2) electromechanical force field leading to stretching of CNTs (3) ballistic transport induced thermal spikes, coupled with high dynamic stress, leading to degradation of emission performance at the device scale. Fairly detailed physics based models of CNTs considering the aspects (1) and (2) above have already been developed by these authors, and numerical results indicate good agreement with experimental results. What is missing in such a system level modeling approach is the incorporation of structural defects and vacancies or charge impurities. This is a practical and important problem due to the fact that degradation of field emission performance is indeed observed in experimental I-V curves. What is not clear from these experiments is whether such degradation in the I-V response is due to dynamic reorientation of the CNTs or due to the defects or due to both of these effects combined. Non-equilibrium Green’s function based simulations using a tight-binding Hamiltonian for single CNT segment show up the localization of carrier density at various locations of the CNTs. About 11% decrease in the drive current with steady difference in the drain current in the range of 0.2-0.4V of the gate voltage was reported in literature when negative charge impurity was introduced at various locations of the CNT over a length of ~20nm. In the context of field emission from CNT tips, a simplistic estimate of defects have been introduced by a correction factor in the Fowler-Nordheim formulae. However, a more detailed physics based treatment is required, while at the same time the device-scale simulation is necessary. The novelty of our present approach is the following. We employ a concept of effective stiffness degradation for segments of CNTs, which is due to structural defects, and subsequently, we incorporate the vacancy defects and charge impurity effects in the Green’s function based approach. Field emission induced current-voltage characteristics of a vertically aligned CNT array on a Cu-Cr substrate is then simulated using a detailed nonlinear mechanistic model of CNTs coupled with quantum hydrodynamics. An array of 10 vertically aligned and each 12 m long CNTs is considered for the device scale analysis. Defect regions are introduced randomly over the CNT length. The result shows the decrease in the longitudinal strain due to defects. Contrary to the expected influence of purely mechanical degradation, this result indicates that the charge impurity and hence weaker transport can lead to a different electromechanical force field, which ultimately can reduce the strain. However, there could be significant fluctuation in such strain field due to electron-phonon coupling. The effect of such fluctuations (with defects) is clearly evident in the field emission current history. The average current also decreases significantly due to such defects.

Underlap Optimization in HFinFET in Presence of Interface Traps

In this work, using 3-D device simulation, we perform an extensive gate to source/drain underlap optimization for the recently proposed hybrid transistor, HFinFET, to show that the underlap lengths can be suitably tuned to improve the ON-OFF ratio as well as the subthreshold characteristics in an ultrashort channel n-type device without significantON performance degradation. We also show that the underlap knob can be tuned to mitigate the device quality degradation in presence of interface traps. The obtained results are shown to be promising when compared against ITRS 2009 performance projections, as well as published state of the art planar and nonplanar Silicon MOSFET data of comparable gate lengths using standard benchmarking techniques.

Influence of Gate Corrugations on the Performance of Thin-Film Transistors

This letter investigates the influence of a corrugated gate on the transfer characteristics of thin-film transistors. Corrugations that run parallel to the length of the channel from source to drain are patterned on the gate. The author finds that these corrugations result in higher currents as compared to conventional planar-gate transistors.

Effect of scaling on the non-quasi-static behaviour of the MOSFET for RF ICs

The effect of scaling (1 μm to 0.09 μm) on the non-quasi-static (NQS) behaviour of the MOSFET has been studied using process and device simulation. It is shown that under fixed gate (Vgs) and drain (Vds) bias voltages, the NQS transition frequency (fNQS) scales as 1/Leff rather than 1/L2eff due to the velocity saturation effect. However, under the practical scaling guidelines, considering the scaling of supply voltage as well, fNQS shows a turn around effect at the sub 100 nm regime. The relation between unity gain frequency (ft) and fNQS is also evaluated and it is shown that ft and fNQS have similar trends with scaling.

A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry

Surface-potential-based compact charge models for symmetric double-gate metal-oxide-semiconductor field-effect transistors (SDG-MOSFETs) are based on the fundamental assumption of having equal oxide thicknesses for both gates. However, for practical devices, there will always be some amount of asymmetry between the gate oxide thicknesses due to process variations and uncertainties, which can affect device performance significantly. In this paper, we propose a simple surface-potential-based charge model, which is applicable for tied double-gate MOSFETs having same gate work function but could have any difference in gate oxide thickness. The proposed model utilizes the unique so-far-unexplored quasi-linear relationship between the surface potentials along the channel. In this model, the terminal charges could be computed by basic arithmetic operations from the surface potentials and applied biases, and thus, it could be implemented in any circuit simulator very easily and extendable to short-channel devices. We also propose a simple physics-based perturbation technique by which the surface potentials of an asymmetric device could be obtained just by solving the input voltage equation of SDG devices for small asymmetry cases. The proposed model, which shows excellent agreement with numerical and TCAD simulations, is implemented in a professional circuit simulator through the Verilog-A interface and demonstrated for a 101-stage ring oscillator simulation. It is also shown that the proposed model preserves the source/drain symmetry, which is essential for RF circuit design.

Piecewise Linearization Technique for Compact Charge Modeling of Independent DG MOSFET

Charge linearization techniques have been used over the years in advanced compact models for bulk and double-gate MOSFETs in order to approximate the position along the channel as a quadratic function of the surface potential (or inversion charge densities) so that the terminal charges can be expressed as a compact closed-form function of source and drain end surface potentials (or inversion charge densities). In this paper, in case of the independent double-gate MOSFETs, we show that the same technique could be used to model the terminal charges quite accurately only when the 1-D Poisson solution along the channel is fully hyperbolic in nature or the effective gate voltages are same. However, for other bias conditions, it leads to significant error in terminal charge computation. We further demonstrate that the amount of nonlinearity that prevails between the surface potentials along the channel actually dictates if the conventional charge linearization technique could be applied for a particular bias condition or not. Taking into account this nonlinearity, we propose a compact charge model, which is based on a novel piecewise linearization technique and shows excellent agreement with numerical and Technology Computer-Aided Design (TCAD) simulations for all bias conditions and also preserves the source/drain symmetry which is essential for Radio Frequency (RF) circuit design. The model is implemented in a professional circuit simulator through Verilog-A, and simulation examples for different circuits verify good model convergence.

Colossal nonsaturating linear magnetoresistance in two-dimensional electron systems at a GaAs/(Al,Ga)As heterointerface

Engineering devices with a large electrical response to magnetic field is of fundamental importance for a range of applications such as magnetic field sensing and magnetic read heads. We show that a colossal nonsaturating linear magnetoresistance (NLMR) arises in two-dimensional electron systems hosted in a GaAs/AlGaAs heterostructure in the strongly insulating regime. When operated at high source-drain bias, the magnetoresistance of our devices increases almost linearly with magnetic field, reaching nearly 10 000% at 8 T, thus surpassing many known nonmagnetic materials that exhibit giant NLMR. The temperature dependence and mobility analysis indicate that the NLMR has a purely classical origin, driven by nanoscale inhomogeneities. A large NLMR combined with small device dimensions makes these systems an attractive candidate for on-chip magnetic field sensing.

High field carrier transport in graphene: Insights from fast current transient

In this work, we observe gate tunable negative differential conductance (NDC) and current saturation in single layer and bilayer graphene transistor at high source-drain field, which arise due to the interplay among (1) self-heating, (2) hot carrier injection, and (3) drain induced minority carrier injection. The magnitude of the NDC is found to be reduced for a bilayer, in agreement with its weaker carrier-optical phonon coupling and less efficient hot carrier injection. The contributions of different mechanisms to the observed results are decoupled through fast transient measurements with nanosecond resolution. The findings provide insights into high field transport in graphene. (C) 2012 American Institute of Physics. http://dx.doi.org/10.1063/1.4754103]

Graphene transistors for CMOS applications: opportunities and challenges

In the last decade, there has been a tremendous interest in Graphene transistors. The greatest advantage for CMOS nanoelectronics applications is the fact that Graphene is compatible with planar CMOS technology and potentially offers excellent short channel properties. Because of the zero bandgap, it will not be possible to turn off the MOSFET efficiently and hence the typical on current to off current ratio (Ion/Ioff) has been less than 10. Several techniques have been proposed to open the bandgap in Graphene. It has been demonstrated, both theoretically and experimentally, that Graphene Nanoribbons (GNR) show a bandgap which is inversely proportional to their width. GNRs with about 20 nm width have bandgaps in the range of 100meV. But it is very difficult to obtain GNRs with well defined edges. An alternate technique to open the band gap is to use bilayer Graphene (BLG), with an asymmetric bias applied in the direction perpendicular to their plane. Another important CMOS metric, the subthreshold slope is also limited by the inability to turn off the transistor. However, these devices could be attractive for RF CMOS applications. But even for analog and RF applications the non-saturating behavior of the drain current can be an issue. Although some studies have reported current saturation, the mechanisms are still not very clear. In this talk we present some of our recent findings, based on simulations and experiments, and propose possible solutions to obtain high on current to off current ratio. A detailed study on high field transport in grapheme transistors, relevant for analog and RF applications will also be presented.

Performance limits of transition metal dichalcogenide (MX2) nanotube surround gate ballistic field effect transistors

We theoretically analyze the performance of transition metal dichalcogenide (MX2) single wall nanotube (SWNT) surround gate MOSFET, in the 10 nm technology node. We consider semiconducting armchair (n, n) SWNT of MoS2, MoSe2, WS2, and WSe2 for our study. The material properties of the nanotubes are evaluated from the density functional theory, and the ballistic device characteristics are obtained by self-consistently solving the Poisson-Schrodinger equation under the non-equilibrium Green's function formalism. Simulated ON currents are in the range of 61-76 mu A for 4.5 nm diameter MX2 tubes, with peak transconductance similar to 175-218 mu S and ON/OFF ratio similar to 0.6 x 10(5)-0.8 x 10(5). The subthreshold slope is similar to 62.22 mV/decade and a nominal drain induced barrier lowering of similar to 12-15 mV/V is observed for the devices. The tungsten dichalcogenide nanotubes offer superior device output characteristics compared to the molybdenum dichalcogenide nanotubes, with WSe2 showing the best performance. Studying SWNT diameters of 2.5-5 nm, it is found that increase in diameter provides smaller carrier effective mass and 4%-6% higher ON currents. Using mean free path calculation to project the quasi-ballistic currents, 62%-75% reduction from ballistic values in drain current in long channel lengths of 100, 200 nm is observed.

Observation of trap-assisted space charge limited conductivity in short channel MoS2 transistor

We present temperature dependent I-V measurements of short channel MoS2 field effect devices at high source-drain bias. We find that, although the I-V characteristics are ohmic at low bias, the conduction becomes space charge limited at high V-DS, and existence of an exponential distribution of trap states was observed. The temperature independent critical drain-source voltage (V-c) was also determined. The density of trap states was quantitatively calculated from V-c. The possible origin of exponential trap distribution in these devices is also discussed. (C) 2013 AIP Publishing LLC.