电机转速自适应测量方法及其在DSP上的实现

本文在分析几种常用的基于编码器测速方法的基础上,提出了一种高性能的自适应速度测量方法。该方法选择一个可变的时间周期和编码器脉冲数来测量单位时间内的编码器脉冲数,再通过简单的计算得到转速的测量值。数字信号处理器(DSP)芯片集成有正交脉冲编码电路,并且数据处理速度快,实时性强。本文中提出的方法在电机控制专用DSP芯片TMS320 LF2407A上进行了实现。实验研究表明,可以在提高低速时的测速准确度的同时,提高系统的响应时间。该方法已经在自主研发的全数字伺服驱动系统中得到了成功应用。

基于MAX5307和DSP的多回路测控系统设计

提出了一种多回路测控系统的设计方案。该方案仅使用一个DSP(数字信号处理器)及一个多通道集成的D/A转换器件MAX5307,不仅同时保证了多个测控回路的实时性及控制精度,而且实现简单,成本低廉。文中结合实际系统,给出了其具体的硬件和软件实现。该方法具有广泛的适用性,对类似系统的设计具有参考价值。

基于DSP旋翼飞行机器人增稳操纵杆设计

本文首先介绍了旋翼飞行机器人控制系统的功能与应用,着重介绍了其中基于tmx320f28335数字信号处理器的无线增稳操控系统工作原理、硬件构架以及软件流程,并对AD转换过程中的关键FIR滤波算法进行说明,详尽比较了不同滤波参数对滤波效果的影响,最后得到该方法可以应用于旋翼飞行机器人增稳控制系统的结论,并将应用该方法滤波后的控制信号应用于实际增稳飞行,以实际数飞行据验证上述结论。

基于MSP430 单片机和DS18B20 的多分支多通道温度测量系统远程监控软件

This paper present that the system can acquire the remote temperature measurement data of 40 monitoring points,through the RS-232 serial port and the Intranet.System s hardware is consist of TI s MSP430F149 mixed-signal processor and UA7000A network module.Using digital temperature sensor DS18B20,the structure is simple and easy to expand,the sensors directly send out the temperature data.MSP430F149 has the advantage of ultra-low-power and high degree of integration.Using msp430F149,the multi-branch multi-p...中文文摘：文章论述了通过RS-232串口和Intranet网络,来实现对远端的40个温度测量点的监控。系统硬件由TI公司的MSP430F149混合信号处理器和UA7000A网络模块构成。传感器采用数字式温度传感器DS18B20,它将直接得到温度的数字量,结构简单,易于扩展。MSP430F149处理器具有超低功耗和高度集成等优点,利用它构建的多分支多通道温度测量系统功能强大,结构简单,可靠性高,抗干扰能力强。系统客户端软件采用Microsoft Visual C++6.0设计。本监控系统能够很好地完成对4个分支共40个温度测量点的远程实时监控。

Transient photoconductivity and its light-induced change of lightly boron-doped a-Si : H films

Transient photoconductivity and its light-induced change were investigated by using a Model 4400 boxcar averager and signal processor for lightly boron-doped a-Si : H films. The transient photoconductivities of the sample were measured at an annealed state and light-soaked states. The transient decay process of the photoconductivity can be fitted fairly well by a second-order exponential decay function, which indicates that the decay process is related with two different traps. It is noteworthy that the photoconductivity of the film increases after light-soaking. This may be due to the deactivity of the boron acceptor B-4(-), and thus some of the boron atoms can no longer act as acceptors and drives E-F to shifts upward. Consequently, the number of effective recombination centers may be reduced and so the photoconductivity increases.

A multi-standard active-RC filter with accurate tuning system

A low-power, highly linear, multi-standard, active-RC filter with an accurate and novel tuning architec-ture is presented. It exhibits 1EEE 802. 11a/b/g (9.5 MHz) and DVB-H (3 MHz, 4 MHz) application. The filter exploits digitally-controlled polysilicon resistor banks and a phase lock loop type automatic tuning system. The novel and complex automatic frequency calibration scheme provides better than 4 comer frequency accuracy, and it can be powered down after calibration to save power and avoid digital signal interference. The filter achieves OIP3 of 26 dBm and the measured group delay variation of the receiver filter is 50 ns (WLAN mode). Its dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from a 2.85 V supply. The dissipation of calibration consumes 2 mA. The circuit has been fabricated in a 0.35μm 47 GHz SiGe BiCMOS technology; the receiver and transmitter filter occupy 0.21 mm~2 and 0.11 mm~2 (calibration circuit excluded), respectively.

用VHDL实现的23位快速浮点数加减法器

With the development of LSI, FPGA/CPLD has been used more and more in the fields of digital signal processing and au-tocontrol and so on. And with the development of the techniques of digital processing, for fitting the system’s function, it should be a higher requirement to speed and used-resource to compute the floating point numbers. The author introduces a high speed adder-subtracter of the 23 bit’s floating point numbers, which is carried out with the parallel arithmetic and the computational speed cou...中文文摘：随着大规模集成电路的不断发展,FPGA/CPLD在数字信号处理、自动控制等方面得到了越来越多的应用。并且伴随着数字化处理技术的不断发展,为满足系统功能的要求,对浮点数运算的速度以及相应占用的资源也就提出了更高的要求。笔者即介绍了以VHDL语言为基础,采用并行算法且计算速度达到33MHz的,对23位标准浮点数实现的高速浮点加减法运算器,并以Cyclone II芯片EP2C20F484为硬件环境,最终进行时序模拟仿真,从而验证该浮点加减法器的正确性和快速特性。

微型ROV控制装置及控制方法

介绍了一种基于嵌入式ARM9技术的微型ROV的控制装置及控制方法。该装置可以同时进行两通道串行通讯,实现微型ROV的视频信号、潜水深度、艏向角度、纵倾角度、横摇角度、电子舱温度等数据的采集和与上位机的通讯传输;该装置可以采集16路模拟量信号和12路数字量信号,输出4路模拟量信号和12路TTL电平信号,实现推进器、水下灯、水下摄像机、云台等ROV功能器件的驱动。该装置具有通讯能力强、集成度高、功耗低等特点,可以满足微型ROV所有的常用功能要求。

嵌入式智能图像处理在火灾预警系统的应用

传统的火灾检测方法一般采用感烟、感温、感光探测器等进行探测。本文提出了一种嵌入式基于图像视觉特征的火灾检测方法,以TI公司的数字多媒体处理器TMS320DM642为核心,设计实现智能前端火灾探测与自动报警系统。通过DM642对视频图像进行采集并结合相应的智能图像处理与模式识别算法,对森林火险进行实时监控。实验结果表明,该系统比传统系统更进一步减少了误报率且具有响应快、监控范围广等优点。

Compact parallel optical modified-signed-digit arithmetic-logic array processor with electron-trapping device

A compact two-step modified-signed-digit arithmetic-logic array processor is proposed. When the reference digits are programmed, both addition and subtraction can be performed by the same binary logic operations regardless of the sign of the input digits. The optical implementation and experimental demonstration with an electron-trapping device are shown. Each digit is encoded by a single pixel, and no polarization is included. Any combinational logic can be easily performed without optoelectronic and electro-optic conversions of the intermediate results. The system is compact, general purpose, simple to align, and has a high signal-to-noise ratio. (C) 1999 Optical Society of America.

Crosstalk analysis of a fiber laser sensor array system based on digital phase-generated carrier scheme

A detailed study on analyzing the crosstalk in a wavelength division multiplexed fiber laser sensor array system based on a digital phase generated carrier interferometric interrogation scheme is reported. The crosstalk effects induced by the limited optical channel isolation of a dense wavelength division demultiplexer (DWDM) are presented, and the necessary channel isolation to keep the crosstalk negligible to the output signal was calculated via Bessel function expansion and demonstrated by a two serial fiber laser sensors system. Finally, a three-element fiber laser sensor array system with a 50-dB channel-isolation DWDM was built up. Experimental results demonstrated that there was no measurable crosstalk between the output channels.

A fast-settling frequency-presetting PLL frequency synthesizer with process variation compensation and spur reduction

This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixed-signal VCO and a digital processor are developed to accurately preset the frequency of VCO and greatly reduce the settling time. An auxiliary tuning loop is introduced in order to reduce reference spur caused by leakage current. The digital processor can automatically compensate presetting frequency variation with process and temperature, and control the operation of the auxiliary tuning loop. A 1.2 GHz integer-N synthesizer with 1 MHz reference input Was implemented in a 0.18μm process. The measured results demonstrate that the typical settling time of the synthesizer is less than 3μs,and the phase noise is -108 dBc/Hz@1MHz.The reference spur is -52 dBc.

Improved digital processing method used for image motion measurement based on hybrid opto-digital joint transform correlator

Hybrid opto-digital joint transform correlator (HODJTC) is effective for image motion measurement, but it is different from the traditional joint transform correlator because it only has one optical transform and the joint power spectrum is directly input into a digital processing unit to compute the image shift. The local cross-correlation image can be directly obtained by adopting a local Fourier transform operator. After the pixel-level location of cross-correlation peak is initially obtained, the up-sampling technique is introduced to relocate the peak in even higher accuracy. With signal-to-noise ratio >= 20 dB, up-sampling factor k >= 10 and the maximum image shift <= 60 pixels, the root-mean-square error of motion measurement accuracy can be controlled below 0.05 pixels.