A transmission electron microscopy study of microstructural defects in proton implanted silicon

The microstructure of silicon on defect layer, a new type of silicon-on-insulator material using proton implantation and two-step annealing to obtain a high resistivity buried layer beneath the silicon surface, has been investigated by transmission electron microscopy. Implantation induced a heavily damaged region containing two types of extended defects involving hydrogen: {001} platelets and {111} platelets. During the first step annealing, gas bubbles and {111} precipitates formed. After the second step annealing, {111} precipitates disappeared, while the bubble microstructure still remained and a buried layer consisting of bubbles and dislocations between the bubbles was left. This study shows that the dislocations pinning the bubbles plays an important role in stabilizing the bubbles and in the formation of the defect insulating layer. (C) 1996 American Institute of Physics.

COMPARISON OF PROPERTIES OF SOLID-PHASE EPITAXIAL SILICON-ON-SAPPHIRE FILMS RECRYSTALLIZED BY RAPID THERMAL ANNEALING AND FURNACE ANNEALING

Chemically vapour deposited silicon on sapphire (SOS) films 0.25 mu m thick were implanted with Si-28(+) and recrystallized in solid phase by furnace annealing (FA) and IR rapid thermal annealing (RTA) in our laboratory. An improvement in crystalline quality can be obtained using both annealing procedures. After FA, it is hard to retain the intrinsic high resistivity value(10(4)-10(5) Ohm cm) observed in as-grown SOS films, so the improvement process cannot be put to practical use effectively. However, it is demonstrated that by properly adjusting the implantation and RTA conditions, significant improvements in both film quality and film autodoping can be accomplished. This work describes a modified double solid phase epitaxy process in which the intrinsic high resistivities of the as grown SOS films are retained. The mechanism of suppression of Al autodoping is discussed.

Fabrication of Silicon Crystal-Facet-Dependent Nanostructures by Electron-Beam Lithography

Silicon crystal-facet-dependent nanostructures have been successfully fabricated on a (100)-oriented silicon-on-insulator wafer using electron-beam lithography and the silicon anisotropic wet etching technique. This technique takes ad-vantage of the large difference in etching properties for different crystallographic planes in alkaline solution. The mini-mum size of the trapezoidal top for those Si nanostructures can be reduced to less than 10nm. Scanning electron microscopy(SEM) and atomic force microscopy (AFM) observations indicate that the etched nanostructures have controllable shapes and smooth surfaces.

A High-Performance Silicon Electro-Optic Phase Modulator with a Triple MOS Capacitor

We propose and analyze a novel Si-based electro-optic modulator with an improved metal-oxide-semiconductor (MOS) capacitor configuration integrated into silicon-on-insulator (SOI).Three gate-oxide layers embedded in the silicon waveguide constitute a triple MOS capacitor structure,which boosts the modulation efficiency compared with a single MOS capacitor.The simulation results demonstrate that the VπLπ product is 2.4V·cm.The rise time and fall time of the proposed device are calculated to be 80 and 40ps from the transient response curve,respectively,indicating a bandwidth of 8GHz.The phase shift efficiency and bandwidth can be enhanced by rib width scaling.

Fabrication of silicon-on-reflector for Si-based resonant-cavity-enhanced photodetectors

A novel silicon-on-reflector substrate for Si-based resonant-cavity-enhanced photodetectors has been fabricated by using Si-based sol-gel and smart-cut techniques. The Si/SiO2 Bragg reflector is controlled in situ by electron beam evaporation and the thickness can be adjusted to get high reflectivity. The reflectance spectra of the silicon-on-reflector substrate with five pairs of Si/SiO2 reflector have been measured and simulated by transfer matrix model. The reflectivity at operating wavelength is close to 100%. Based on the silicon-on-reflector substrate, SiGe/Si multiple quantum wells resonant-cavity-enhanced photodetectors for 1.3 mu m wavelength have been designed and simulated. Ten-fold enhancement of the quantum efficiency of resonant-cavity-enhanced photodetectors compared with conventional photodetectors is predicted.

Improvement of thin silicon on sapphire (SOS) film materials and device performances by solid phase epitaxy

The increased emphasis on sub-micron CMOS/SOS devices has placed a demand for high quality thin silicon on sapphire (SOS) films with thickness of the order 100-200 nm. It is demonstrated that the crystalline quality of as-grown thin SOS films by the CVD method can be greatly improved by solid phase epitaxy (SPE) process: implantation of self-silicon ions and subsequent thermal annealing. Subsequent regrowth of this amorphous layer leads to a greater improvement in silicon layer crystallinity and channel carrier mobility, evidenced, respectively, by double crystal X-ray diffraction and electrical measurements. We concluded that the thin SPE SOS films are suitable for application to high-performance CMOS circuitry. (C) 2000 Elsevier Science S.A. All rights reserved.

Experimental study on heavy ion single event effects in SOI SRAMs

Silicon-on-insulator (SOI) technologies have been developed for radiation-hardened military and space applications. The use of SOI has been motivated by the full dielectric isolation of individual transistors, which prevents latch-up. The sensitive region for charge collection in SOI technologies is much smaller than for bulk-silicon devices potentially making SOI devices much harder to single event upset (SEU). In this study, 64 kB SOI SRAMs were exposed to different heavy ions, such as Cu, Br, I, Kr. Experimental results show that the heavy ion SEU threshold linear energy transfer (LET) in the 64 kB SOI SRAMs is about 71.8 MeV cm(2)/mg. Accorded to the experimental results, the single event upset rate (SEUR) in space orbits were calculated and they are at the order of 10(-13) upset/(day bit).

High efficiency and broad bandwidth grating coupler between nanophotonic waveguide and fibre

A high efficiency and broad bandwidth grating coupler between a silicon-on-insulator (SOI) nanophotonic waveguide and fibre is designed and fabricated. Coupling efficiencies of 46% and 25% at a wavelength of 1.55 mu m are achieved by simulation and experiment, respectively. An optical 3 dB bandwidth of 45 nm from 1530 nm to 1575 nm is also obtained in experiment. Numerical calculation shows that a tolerance to fabrication error of 10 nm in etch depth is achievable. The measurement results indicate that the alignment error of +/-2 mu m results in less than 1 dB additional coupling loss.

Fabrication of a Low-Loss SSC Using High-Dose Electron Beam Lithography Exposure With Negative PMMA Resist

A silicon-on-insulator optical fiber-to-waveguide spot-size converter (SSC) using Poly-MethylMethAcrylate (PMMA) is presented for integrated optical circuits. Unlike the conventional use of PMMA as a positive resist, it has been successfully used as a negative resist with high-dose electron exposure for the fabrication of ultrafine silicon wire waveguides. Additionally, this process is able to reduce the side-wall roughness, and substantially depresses the unwanted propagation loss. Exploiting this technology, the authors demonstrated that the SSC can improve coupling efficiency by as much as over 2.5 dB per coupling facet, compared with that of SSC fabricated with PMMA as a positive resist with the same dimension.

Simulation demonstration and experimental fabrication of a multiple-slot waveguide

A multiple-slot waveguide is presented and demonstrated through theoretical simulation. Taking a double-slot waveguide as an example, the results show a nearly 30% enhancement of optical intensity compared with the traditional single-slot waveguide with the same slot gap width. Therefore, the E-field intensity of the slot can be increased by adding another smaller slot. A double-slot waveguide with oxide and air as low index slot materials is realized experimentally and the formation processes of the slots are analyzed.

Design and fabrication of polarization-independent micro-ring resonators

Origin of polarization sensitivity of photonic wire waveguides (PWWs) is analysed and the effective refractive indices of two different polarization states are calculated by the three-dimensional full-vector beam propagation method. We find that PWWs are polarization insensitive if the distribution of its refractive index is uniform and the cross section is square. An MRR based on such a polarization-insensitive PWW is fabricated on an 8-inch silicon-on-insulator wafer using 248-nm deep ultraviolet lithography and reactive ion etching. The quasi-TE mode is resonant at 1542.25 nm and 1558.90 nm, and the quasi-TM mode is resonant at 1542.12 nm and 1558.94 nm. The corresponding polarization shift is 0.13 nm at the shorter wavelength and 0.04 nm at the longer wavelength. Thus the fabricated device is polarization independent. The extinction ratio is larger than 10 dB. The 3 dB bandwidth is about 2.5 nm and the Qvalue is about 620 at 1558.90 nm.

Fabrication and optical optimization of spot-size converters with strong cladding layers

A silicon-on-insulator (SOI) optical fiber-to-waveguide spot-size converter (SSC) overlaid with specially treated silica is investigated for integrated optical circuits. Unlike the conventional process of simply depositing the hot silica on silicon waveguides, two successive layers of silicon dioxide were grown on etched SSC structures by PECVD (plasma-enhanced chemical vapor deposition). The two layers have 0.8% index contrast and supply stronger cladding for an incident light beam. Additionally, this process is able to reduce the effective refractive index of the input mode to less than 1.47 (extremely close to that of the fiber), substantially weakening the unwanted back reflection. Exploiting this technology, it was demonstrated that the SSC showed a theoretical low mode mismatch loss of 1.23 dB for a TE-like mode and has an experimental coupling efficiency of 66%.

Multi-channel micro neural probe fabricated with SOI

Silicon-on-insulator (SOI) substrate is widely used in micro-electro-mechanical systems (MEMS). With the buried oxide layer of SOI acting as an etching stop, silicon based micro neural probe can be fabricated with improved uniformity and manufacturability. A seven-record-site neural probe was formed by inductive-coupled plasma (ICP) dry etching of an SOI substrate. The thickness of the probe is 15 mu m. The shaft of the probe has dimensions of 3 mmx100 mu mx15 mu m with typical area of the record site of 78.5 mu m(2). The impedance of the record site was measured in-vitro. The typical impedance characteristics of the record sites are around 2 M Omega at 1 kHz. The performance of the neural probe in-vivo was tested on anesthetic rat. The recorded neural spike was typically around 140 mu V. Spike from individual site could exceed 700 mu V. The average signal noise ratio was 7 or more.

An investigation of the mode characteristics of SOI submicron rib waveguides using the film mode matching method

The mode characteristics of SOI (silicon-on-insulator) submicron rib waveguides are very different from those of micrometer-sized ones. Using the full-vector film mode matching method, we propose a simple criterion to determine whether a waveguide mode is guided or not. The single-mode condition for deep-etched waveguides is obtained using this criterion. We also obtain the inherent TM mode leakage and sharp cancelation effects due to TE-TM mode coupling in shallow-etched rib waveguides from numerical simulations, which agree well with the analytical results based on total internal reflection and interference theories.

1.55 mu m Ge islands resonant-cavity-enhanced detector with high-reflectivity bottom mirror

A 1.55 mum Ge islands resonant-cavity-enhanced (RCE) detector with high-reflectivity bottom mirror was fabricated by a simple method. The bottom mirror was deposited in the hole formed by anisotropically etching in a basic solution from the back side of the sample with the buried SiO2 layer in silicon-on-insulator substrate as the etch-stop layer. Reflectivity spectrum indicates that the mirror deposited in the hole has a reflectivity as high as 99% in the range of 1.2-1.65 mum. The peak responsivity of the RCE detector at 1543.8 nm is 0.028 mA/W and a full width at half maximum of 5 nm is obtained. Compared with the conventional p-i-n photodetector, the responsivity of RCE detector has a nearly threefold enhancement. (C) 2004 American Institute of Physics.