148 resultados para tensile test


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A thermal model for concentrator solar cells based on energy conservation principles was designed. Under 400X concentration with no cooling aid, the cell temperature would get up to about 1200℃.Metal plates were used as heat sinks for cooling the system, which remarkably reduce the cell temperature. For a fixed concentration ratio, the cell temperature reduced as the heat sink area increased. In order to keep the cell at a constant temperature, the heat sink area needs to increase linearly as a function of the concentration ratio. GaInP/GaAs/Ge triple-junction solar cells were fabricated to verify the model. A cell temperature of 37℃ was measured when using a heat sink at 400X concentratration.

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With the principles of microwave circuits and semiconductor device physics, two microwave power device test circuits combined with a test fixture are designed and simulated, whose properties are evaluated by a parameter network analyzer within the frequency range from 3 to 8GHz. The simulation and experimental results verify that the test circuit with a radial stub is better than that without. As an example, a C-band AlGaN/GaN HEMT microwave power device is tested with the designed circuit and fixture. With a 5.4GHz microwave input signal, the maximum gain is 8.75dB, and the maximum output power is 33.2dBm.

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A kind of novel broad-band superluminescent diodes (SLDs) using graded tensile-strained bulk InGaAs is developed. The graded tensile-strained bulk InGaAs is obtained by changing only group-III trimethyl-gallium source flow during low-pressure metal organic vapor-phase epitaxy. At the injection current of 200 mA, the fabricated SLDs with such structure demonstrate full-width at half-maximum spectral width of 106 nm and the output light power of 13.6 mW, respectively.

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A semiconductor optical amplifier gate based on tensile-strained quasi-bulk InGaAs is developed. At injection current of 80mA,a 3dB optical bandwidth of more than 85nm is achieved due to dominant band-filling effect.Moreover, the most important is that very low polarization dependence of gain (<0. 7dB),fiber-to-fiber lossless operation current (70~90mA) and a high extinction ratio (>50dB) are simultaneously obtained over this wide 3dB optical bandwidth (1520~1609nm) which nearly covers the spectral region of the whole C band (1525~1565nm)and the whole L band (1570~ 1610nm). The gating time is also improved by decreasing carrier lifetime. The wideband polarization-insensitive SOA-gate is promising for use in future dense wavelength division multiplexing (DWDM) communication systems.

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The theoretical optimization of tensile strained InGaAsP/InGaAsP MQW for 1.5μm window polarization-independent semiconductor optical amplifier is reported. The valence-band structure of the MQw is calculated by using K·P method, in which 6×6 Luttinger effective-mass Hamiltonian is taken into account. LThe polarization dependent optical gain is calculated with various well width, strain, and carrier density.

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The open-short-load (OSL) method is very simple and widely used, for one-port test fixture calibration. In this paper, this method. is extended to the two-port calibration of test fixtures for the first time. The problem of phase uncertainty arising in this application has been solved. The comparison between our results and those obtained with the short-open-load-thru (SOLT) method shows that the method established is accurate enough for practical applications.

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The problem of frequency limitation arising in calibration of the test fixtures is investigated in this paper. It is found that at some frequencies periodically, the accuracy of the methods becomes very low, and. the denominators of the expressions of the required S-parameters approach zero. This conclusion can be drawn whether-the test fixtures, are symmetric or not. A good agreement between theory and experiment is obtained.

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Scan test can be inserted around hard IP cores that have not been designed with DFT approaches. An 18x18 bits Booth Coding-Wallace Tree multiplier has been designed with full custom approach with 0.61 m CMOS technology. When we reuse the multiplier in another chip, scan chain has been inserted around it to increase the fault coverage. After scan insertion, the multiplier needs 4.7% more areas and 24.4% more delay time, while the fault coverage reaches to 95%.

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The improved mechanical properties of surface nano-crystallized graded materials produced by surface severe plastic deformation ((SPD)-P-2) are generally owing to the effects of the refined structure, work-hardened region and compressive residual stress. However, during the (SPD)-P-2 process, residual stress is produced simultaneously with work-hardened region, the individual contribution of these two factors to the improved mechanical properties remains unclear. Numerical simulations are carried out in order to answer this question. It is found that work hardening predominates in improving the yield strength and the ultimate tensile strength of the surface nano-crystallized graded materials, while the influence of the residual stress mainly emerges at the initial stage of deformation and decreases the apparent elastic modulus of the surface nano-crystallized graded materials, which agrees well with the experimental results. (C) 2010 Elsevier B.V. All rights reserved.

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