Smart universal multiple-valued logic gates by transferring single electrons

This paper proposes smart universal multiple-valued (MV) logic gates by transferring single electrons (SEs). The logic gates are based on MOSFET based SE turnstiles that can accurately transfer SEs with high speed at high temperature. The number of electrons transferred per cycle by the SE turnstile is a quantized function of its gate voltage, and this characteristic is fully exploited to compactly finish MV logic operations. First, we build arbitrary MV literal gates by using pairs of SE turnstiles. Then, we propose universal MV logic-to-value conversion gates and MV analog-digital conversion circuits. We propose a SPICE model to describe the behavior of the MOSFET based SE turnstile. We simulate the performances of the proposed gates. The MV logic gates have small number of transistors and low power dissipations.

Compact voltage-mode multi-valued literal gate using nanoscale ballistic MOSFETs

A CMOS voltage-mode multi-valued literal gate is presented. The ballistic electron transport characteristic of nanoscale MOSFETs is smartly used to compactly achieve universal radix-4 literal operations. The proposed literal gates have small numbers of transistors and low power dissipations, which makes them promising for future nanoscale multi-valued circuits. The gates are simulated by HSPICE.

A novel butt-joint scheme for the preparation of electro-absorptive lasers

A 1.55 mu m InGaAsP/InGaAsP multiple-quantum-well electro-absorption modulator (EAM) monolithically integrated with a distributed feedback laser (DFB) diode has been realized based on a novel butt-joint scheme by ultra-low metal-organic vapour phase epitaxy for the first time. The threshold current of 25 mA and an extinction ratio of more than 30 dB are obtained by using the novel structure. The beam divergence angles at the horizontal and vertical directions are as small as 19.3 degrees x 13 degrees, respectively, without a spot-size converter by undercutting the InGaAsP active region. The capacitance of the ridge waveguide device with a deep mesa buried by polyimide was reduced down to 0.30 pF.

A Fully Integrated 900-MHz Passive RFID Transponder Front End With Novel Zero-Threshold RF-DC Rectifier

This paper presents a fully integrated CMOS analog front end for a passive 900-MHz radio-frequency identification (RFID) transponder. The power supply in this front end is generated from the received RF electromagnetic energy by using an RF-dc voltage rectifier. In order to improve the compatibility with standard CMOS technology, Schottky diodes in conventional RF-dc rectifiers are replaced by diode-connected MOS transistors with zero threshold. Meanwhile, theoretical analyses for the proposed rectifier are provided and verified by both simulation and measurement results. The design considerations of the pulsewidth-modulation (PWM) demodulator and the backscatter modulator in the front end are also discussed for low-power applications. The proposed front end is implemented in a 0.35-mu m 2P4M CMOS technology. The whole chip occupies a die area of 490 x 780 mu m(2) and consumes only 2.1 mu W in reading mode under a self-generated 1.5-V supply voltage. The measurement results show that the proposed rectifier can properly operate with a - 14.7-dBm input RF power at a power conversion efficiency of 13.0%. In the proposed RFID applications, this sensitivity corresponds to 10.88-m communication distance at 4-W equivalent isotropically radiated power from a reader base station.

Novel folding large-scale optical switch matrix with total internal reflection mirrors on silicon-on-insulator by anisotropy chemical etching

A compact optical switch matrix was designed, in which light circuits were folded by total internal reflective (TIR) mirrors. Two key elements, 2 x 2 switch and TIR mirror, have been fabricated on silicon-on-insulator wafer by anisotropy chemical etching. The 2 x 2 switch showed very low power consumption of 140 mW and a very high speed of 8 +/- 1 mus. An improved design for the TIR mirror was developed, and the fabricated mirror with smooth and vertical reflective facet showed low excess loss of 0.7 +/- 0.3 dB at 1.55 mum.

Mode analysis and Q-factor enhancement due to mode coupling in rectangular resonators

Modes in rectangular resonators are analyzed and classified according to symmetry properties, and quality factor (Q-factor) enhancement due to mode coupling is observed. In the analysis, mode numbers p and q are used to denote the number of wave nodes in the direction of two orthogonal sides. The even and odd mode numbers correspond to symmetric and antisymmetric field distribution relative to the midlines of sides, respectively. Thus, the modes in a rectangle resonator can be divided into four classes according to the parity of p and q. Mode coupling between modes of different classes is forbidden; however, anti-crossing mode coupling between the modes in the same class exists and results in new modes due to the combination of the coupled modes. One of the combined modes has very low power loss and high Q-factor based on far-field emission of the analytical field distribution, which agrees well with the numerical results of the finite-difference time-domain (FDTD) simulation. Both the analytical and FDTD results show that the Q-factors of the high Q-factor combined modes are over one order larger than those of the original modes. Furthermore, the general condition required to achieve high-Q modes in the rectangular resonator is given based on the analytical solution.

Novel hybrid voltage controlled ring oscillators using single electron and MOS transistors

This paper proposes two kinds of novel hybrid voltage controlled ring oscillators (VCO) using a single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor. The novel SET/MOS hybrid VCO circuits possess the merits of both the SET circuit and the MOS circuit. The novel VCO circuits have several advantages: wide frequency tuning range, low power dissipation, and large load capability. We use the SPICE compact macro model to describe the SET and simulate the performances of the SET/MOS hybrid VCO circuits by HSPICE simulator. Simulation results demonstrate that the hybrid circuits can operate well as a VCO at room temperature. The oscillation frequency of the VCO circuits could be as high as 1 GHz, with a -71 dBc/Hz phase noise at 1 MHz offset frequency. The power dissipations are lower than 2 uW. We studied the effect of fabrication tolerance, background charge, and operating temperature on the performances of the circuits.

Submicrosecond rearrangeable nonblocking silicon-on-insulator thermo-optic 4 X 4 switch matrix

A rearrangeable nonblocking silicon-on-insulator-based thermo-optic 4 X 4 switch matrix is designed and fabricated. A spot-size converter is integrated to reduce the insertion loss, and a new driving circuit is designed to improve the response speed. The insertion loss is less than 10 dB, and the response time is 950 us. (c) 2007 Optical Society of America

Novel folding 8x8 silicon-based optical matrix switch with tapered waveguides and self-aligned corner mirrors

Novel folding 8 x 8 matrix switches based on silicon on insulator were demonstrated. In the design, single-mode rib waveguides and multimode interferences are connected by optimized tapered waveguides to reduce the mode coupling loss between the two types of waveguides. The self-aligned method was applied to the key integrated turning mirrors for perfect positions and low loss of them. A mixed etching process including inductively coupled plasma and chemical etching was employed to etch waveguides and mirrors, respectively. The compact size of the device is only 20 x 3.2 mm(2). The switch element with high switching speed and low power consumption is presented in the matrix. The average insertion loss of the matrix is about -21 dB, and the excess loss of one mirror is measured of -1.4 dB. The worst crosstalk is larger than 21 dB. Experimental results illuminate that some of the main characteristics of optical matrix switches are. developed in the modified design, which is in accord with theoretic analyses.

Anti-Stokes photoluminescence in ZnO microcrystal

Low temperature (10 K) strong anti-Stokes photoluminescence (ASPL) of ZnO microcrystal excited by low power cw 532 nm laser is reported here. Energy upconversion of 1.1 eV is obtained in our experiment with no conventional nonlinear effect. Through the study of the normal photoluminescence and temperature dependence of ASPL we conclude that the green band luminescence in ZnO is related to deep donor to valance band transition. Using the two-step two-photon absorption model, we provide a plausible mechanism leading to the ASPL phenomenon in our experiment. (c) 2006 American Institute of Physics.

MQW electroabsorption modulator-integrated DFB laser modules for high-speed transmission

Details of the design, fabrication and testing of a strained InGaAsP/InGaAsP multiple quantum well (MQW) electroabsorption modulator (EAM) monolithically integrated with a DFB laser by ultra-low-pressure selective area growth (SAG) are presented. The method greatly simplifies the integration process. A study of the controllability of band-gap energy by SAG has been performed. After being completely packaged in a seven-pin butterfly compact module, the device successfully performs 10 Gb s(-1) nonreturn to zero (NRZ) operation on uncompensated transmission span >53 km in a standard fibre with a 8.7 dB dynamic extinction ratio. A receiver sensitivity of -18.9 dBm at a bit error rate (BER) of 10(-10) is confirmed. 10 GHz short pulse trains with 15.3 ps pulsewidth have also been generated.

Monolithic integration of electroabsorption modulator and DFB laser for 10-Gb/s transmission

A strained InGaAsP-InP multiple-quantum-well DFB laser monolithically integrated with electroabsorption modulator by ultra-low-pressure (22 mbar) selective-area-growth is presented. The integrated chip exhibits superior characteristics, such as low threshold current of 19 mA, single-mode operation around 1550 nm range with side-mode suppression ratio over 40 dB, and larger than 16 dB extinction ratio when coupled into a single-mode fiber. More than 10 GHz modulation bandwidth is also achieved. After packaged in a compact module, the device successfully performs 10-Gb/s NRZ transmission experiments through 53.3 km of standard fiber with 8.7 dB dynamic extinction ratio. A receiver sensitivity of -18.9 dBm at bit-error-rate of 10(-1)0 is confirmed. (c) 2005 Elsevier B.V. All rights reserved.

Design and performance of monolithic integrated electro-absorption modulated distributed feedback laser - art. no. 67820Y

High performance InGaAsP/InGaAsP strained compensated multiple-quantum-well (MQW) electroabsorption modulators (EAM) monolithically integrated with a DFB laser diode have been designed and realized by ultra low metal-organic vapor phase epitaxy (MOVPE) based on a novel butt joint scheme. The optimization thickness of upper SCH layer for DFB and EAM was obtained of the proposed MQW structure of the EAM through numerical simulation and experiment. The device containing 250(mu m) DFB and 170(mu m) EAM shows good material quality and exhibits a threshold current of 17mA, an extinction ratio of higher than 30 dB and a very high modulation efficiency (12dB/V) from 0V to 1V. By adopting a high-mesa ridge waveguide and buried polyimide, the capacitance of the modulator is reduced to about 0.30 pF corresponding to a 3dB bandwidth more than 20GHz.

An 8-b 1-GSmaples/s CMOS cascaded folding and interpolating ADC

This paper presents an 8-bit low power cascaded folding and interpolating analog-to-digital converter (ADC). A reduction in the number of comparators, equal to the number of times the signal is folded, is obtained. The interleaved architecture is used to improve the sampling rate of the ADC. The circuit including a bandgap is implemented in a 0.18-mu m CMOS technology, and measures 1.47 mm X 1.47 mm (including pads). The simulation results illustrate a conversion rate of 1-GSamples/s and a power dissipation of less than 290mW.

A novel DC-DC charge pump circuit for passive RFID transponder

This paper presents a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies. The proposed charge pump has been used as a part of the power supply section of fully integrated passive radio frequency identification(RFID) transponder IC, which has been implemented in a 0.35-um CMOS technology with embedded EEPROM offered by Chartered Semiconductor. The proposed DC/DC charge pump can generate stable output for RFID applications with low power dissipation and high pumping efficiency. The analytical model of the voltage multiplier, the comparison with other charge pumps, the simulation results, and the chip testing results are presented.