Photon-storage in optical memory cells based on a semiconductor quantum dot-quantum well hybrid structure

We report a new type of photonic memory cell based on a semiconductor quantum dot (QD)-quantum well (QW) hybrid structure, in which photo-generated excitons can be decomposed into separated electrons and holes, and stored in QW and QDs respectively. Storage and retrieval of photonic signals are verified by time-resolved photoluminescence experiments. A storage time in excess of 100ms has been obtained at a temperature of 10 K while the switching speed reaches the order of ten megahertz.

In-situ Boron-doped Low-stress LPCVD Polysilicon for Micromechanical Disk Resonator

Polycrystalline silicon (polysilicon) has been used as an important structural material for microelectro-mechnical systems (MEMS) because of its compatibility with standard integrated circuit (IC) processes. As the structural layer of micromechanical high resonance frequency (high-f) and high quality factor (high-Q) disk resonators, the low residual stress and low resistivity are desired for the polysilicon thin films. In the present work, we investigate the effect of deposition and annealing conditions on the residual stress and resistivity for in-situ deposited low pressure chemical vapor deposition (LPCVD) polysilicon films. Low residual stress (-100 MPa) was achieved in in-situ boron-doped polysilicon films deposited at 570 degrees C and annealed at 1000 degrees C for 4 hr. The as-deposited amorphous polysilicon films were crystallized by the rapid thermal annealing and have the (111)-preferred orientation, the low tensile residual stress is expected for this annealed film, the detailed description on this work will be reported soon. The controllable residual stress and resistivity make these films suitable for high-Q and bigh-f micro-mechanical disk resonators.

In-Situ Boron and Aluminum Doping and Their Memory Effects in 4H-SiC Homoepitaxial Layers Grown by Hot-Wall LPCVD

The in-situ p-type doping of 4H-SiC grown on off-oriented (0001) 4H-SiC substrates was performed with trimethylaluminum (TMA) and/or diborane (B2H6) as the dopants. The incorporations of Al and B atoms and their memory effects and the electrical properties of p-type 4H-SiC epilayers were characterized by secondary ion mass spectroscopy (SIMS) and Hall effect measurements, respectively. Both Al- and B-doped 4H-SiC epilayers were p-type conduction. It was shown that the profiles of the incorporated boron and aluminum concentration were in agreement with the designed TMA and B2H6 flow rate diagrams. The maximum hole concentration for the Al doped 4H-SiC was 3.52x10(20) cm(-3) with Hall mobility of about 1 cm(2)/Vs and resistivity of 1.6 similar to 2.2x10(-2) Omega cm. The heavily boron-doped 4H-SiC samples were also obtained with B2H6 gas flow rate of 5 sccm, yielding values of 0.328 Omega cm for resistivity, 5.3x10(18) cm(-3) for hole carrier concentration, and 7 cm(2)/VS for hole mobility. The doping efficiency of Al in SiC is larger than that of B. The memory effects of Al and B were investigated in undoped 4H-SiC by using SIMS measurement after a few run of doped 4H-SiC growth. It was clearly shown that the memory effect of Al is stronger than that of B. It is suggested that p-type 4H-SiC growth should be carried out in a separate reactor, especially for Al doping, in order to avoid the join contamination on the subsequent n-type growth. 4H-SiC PiN diodes were fabricated by using heavily B doped epilayers. Preliminary results of PiN diodes with blocking voltage of 300 V and forward voltage drop of 3.0 V were obtained.

An Embedded Ultra Low Power Nonvolatile Memory in a Standard CMOS Logic Process

This paper proposes an embedded ultra low power nonvolatile memory in a standard CMOS logic process. The memory adopts a bit cell based on the differential floating gate PMOS structure and a novel operating scheme. It can greatly improve the endurance and retention characteristic and make the area/bit smaller. A new high efficiency all-PMOS charge pump is designed to reduce the power consumption and to increase the power efficiency. It eliminates the body effect and can generate higher output voltage than conventional structures for a same stage number. A 32-bit prototype chip is fabricated in a 0.18 mu m 1P4M standard CMOS logic process and the core area is 0.06 mm(2). The measured results indicate that the typical write/erase time is 10ms. With a 700 kHz clock frequency, power consumption of the whole memory is 2.3 mu A for program and 1.2 mu A for read at a 1.6V power supply.

Unattended ground sensor system based on fiber optic disk accelerometer

The basic principle and critical characteristics of unattended ground sensors (UGS) based on fiber optic disk accelerometers are introduced. Mechanical principles of fiber optic disk accelerometers (FODA) and calculation methods are presented. An FODA with a high sensitivity of 120rad/g and a resonance frequency of 300Hz is designed and used for detection in military affair.

Electronic states of InAs verfically-assembled quantum disks in magnetic fields and two-electron quantum-disk qubit

We have studied the single-electron and two-electron vertically-assembled quantum disks in an axial magnetic field using the effective mass approximation. The electron interaction is treated accurately by the direct diagonalization of the Hamiltonian matrix. We calculate the six criergy levels of single-electron quantum disks and the two lowest energy levels of two-electron quantum disks in an axial magnetic field. The change of the magnetic field as an effective potential strongly modifies the electronic structures. leading to splittings and crossings between levels The results demonstrate the switching between the around states with the total spins S = 0 and S = 1. The switching results in a qubit allowed to fabricate by current growth techniques.

An Ultra Low Power Non-volatile Memory in Standard CMOS Process for Passive RFID Tags

An ultra low power non-volatile memory is designed in a standard CMOS process for passive RFID tags. The memory can operate in a new low power operating scheme under a wide supply voltage and clock frequency range. In the charge pump circuit the threshold voltage effect of the switch transistor is almost eliminated and the pumping efficiency of the circuit is improved. An ultra low power 192-bit memory with a register array is implemented in a 0.18 mu M standard CMOS process. The measured results indicate that, for the supply voltage of 1.2 volts and the clock frequency of 780KHz, the current consumption of the memory is 1.8 mu A (3.6 mu A) at the read (write) rate of 1.3Mb/s (0.8Kb/s).

Fully lithography independent fabrication of nanogap electrodes for lateral phase-change random access memory application

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Effects of multistage coupling and disk flexibility on mistuned bladed disk dynamics

The effects ofdisk flexibility and multistage coupling on the dynamics of bladed disks with and without blade mistuning are investigated. Both free and forced responses are examined using finite element representations of example single and two-stage rotor models. The reported work demonstrates the importance of proper treatment of interstage (stage-to-stage) boundaries in order to yield adequate capture of disk-blade modal interaction in eigenfrequency veering regions. The modified disk-blade modal interactions resulting from interstage-coupling-induced changes in disk flexibility are found to have a significant impact on (a) tuned responses due to excitations passing through eigenfrequency veering regions, and (b) a design's sensitivity to blade mistuning. Hence, the findings in this paper suggest that multistage analyses may be required when excitations are expected to fall in or near eigenfrequency veering regions or when the sensitivity to blade mistuning is to be accounted for Conversely, the observed sensitivity to disk flexibility also indicates that the severity of unfavorable structural interblade coupling may be reduced significantly by redesigning the disk(s) and stage-to-stage connectivity. The relatively drastic effects of such modifications illustrated in this work indicate that the design modifications required to alleviate veering-related response problems may be less comprehensive than what might have been expected.

Dual-wavelength photochromic fulgides for parallel recording memory

Two photochromic fulgides, 2-{2-[4-(N,N-dimethylnilino)-5-methyl-4-oxazoly]}ethylidene-4-(1-methylethylidene) tetrahydrofuran-2,5-dione (A) and 3-(1,2-dimethyl-5-phenyl-3-pyrolloethylidene)-4-(1-methylethylidene)tetrahydrofuran-2,5-dione (B), doped in PMMA as candidates of dual-wavelength optical memory for parallel recording has been investigated. With 488 nm-laser and 650 nm-laser, both "cross" and "star" images are recorded on the fulgides-PMMA film and read out clearly, respectively. Crosstalk between two fulgides in PMMA matrix and nondestructive readout has also been explored. The results show that no significant cross-talk is detected between them, and nondestructive readout is up to 201 times. (C) 2005 Elsevier B.V. All rights reserved.

Analysis of orthogonal memory patterns

It is well known that the storage capacity may be large if all memory patterns are orthogonal to each other. In this paper, a clear description is given about the relation between the dimension N and the maximal number of orthogonal vectors with components +/-1, and also the conception of attractive index is proposed to estimate the basin of attraction. Theoretic analysis and computer simulation show that each memory pattern's basin of attraction contains at least one Hamming ball when the storage capacity is less than 0.33N which is better than usual 0.15 N.