A bistable, self-latching inverter by the monolithic integration of resonant tunnelling diode and high electron mobility transistor

This paper reports that the structures of AlGaAs/InGaAs high electron mobility transistor (HEMT) and AlAs/GaAs resonant tunnelling diode (RTD) are epitaxially grown by molecular beam epitaxy ( MBE) in turn on a GaAs substrate. An Al0.24Ga0.76As chair barrier layer, which is grown adjacent to the top AlAs barrier, helps to reduce the valley current of RTD. The peak-to-valley current ratio of fabricated RTD is 4.8 and the transconductance for the 1-mu m gate HEMT is 125mS/mm. A static inverter which consists of two RTDs and a HEMT is designed and fabricated. Unlike a conventional CMOS inverter, the novel inverter exhibits self-latching property.

Growth and annealing study of Mg-doped AlGaN and GaN/AlGaN superlattices

Mg-doped AlGaN and GaN/AlGaN superlattice are grown by metalorganic chemical vapour deposition (MOCVD). Rapid thermal annealing (RTA) treatments are carried out on the samples. Hall and high resolution x-ray diffraction measurements are used to characterize the electrical and structural prosperities of the as-grown and annealed samples, respectively. The results of hall measurements show that after annealing, the Mg-doped AlGaN sample can not obtain the distinct hole concentration and can acquire a resistivity of 1.4 x 10(3) Omega cm. However, with the same annealing treatment, the GaN/AlGaN superlattice sample has a hole concentration of 1.7 x 10(17) cm(-3) and of Mg acceptors, which leads to higher hole concentration and lower p-type resistivity.

A small signal equivalent circuit model for resonant tunnelling diode

We report a resonant tunneling diode (RTD) small signal equivalent circuit model consisting of quantum capacitance and quantum inductance. The model is verified through the actual InAs/In0.53Ga0.47As/AlAs RTD fabricated on an InP substrate. Model parameters are extracted by fitting the equivalent circuit model with ac measurement data in three different regions of RTD current-voltage (I-V) characteristics. The electron lifetime, representing the average time that the carriers remain in the quasibound states during the tunneling process, is also calculated to be 2.09 ps.

Nanoelectronic devices-resonant tunnelling diodes grown on InP substrates by molecular beam epitaxy with peak to valley current ratio of 17 at room temperature

This paper reports that lnAs/In0.53Ga0.47As/AlAs resonant tunnelling diodes have been grown on InP substrates by molecular beam epitaxy. Peak to valley current ratio of these devices is 17 at 300K. A peak current density of 3kA/cm(2) has been obtained for diodes with AlAs barriers of ten monolayers, and an In0.53Ga0.47As well of eight monolayers with four monolayers of InAs insert layer. The effects of growth interruption for smoothing potential barrier interfaces have been investigated by high resolution transmission electron microscope.

Study on surface morphology of GaN growth by MOCVD on GaN/Si(111) template

The surface morphology of GaN grown by MOCVD on GaN/Si template was studied. Rough morphology and deep pinhole defects on some surface areas of the samples were observed and studied. The formation of rough morphology is possibly related to Ga-Si alloy produced due to poor thermal stability of template at high temperature. The deep pinhole defects generated are deep down to the surface of MBE-grown GaN/Si template. The stress originated from the large thermal expansion coefficient difference between GaN and Si may be related to the formation of the pinhole defects. The surface morphology of the GaN can be improved by optimizing the GaN/Si template and decreasing the growth temperature.

Resonant tunnelling diodes and high electron mobility transistors integrated on GaAs substrates

A1GaAs/1nGaAs high electron mobility transistors (HEMTs) and AlAs/GaAs resonant tunnelling diodes (RTDs) are integrated on GaAs substrates. Molecular beam epitaxy is used to grow the RTD on the HEMT structure. The current-voltage characteristics of the RTD and HEMT are obtained on a two-inch wafer. At room temperature, the peak-valley, current ratio and the peak voltage are about 4.8 and 0.44 V, respectivcly The HEMT is characterized by a, gate length of 1 mu m, a, maximum transconductance of 125 mS/mm, and a threshold voltage of -1.0 V. The current-voltage, characteristics of the series-connected RTDs are presented. Tire current-voltage curves of the parallel connection of one RTD and one HEMT are also presented.

Modeling and optimization of semiconductor manufacturing process with neural networks

A neural network-based process model is proposed to optimize the semiconductor manufacturing process. Being different from some works in several research groups which developed neural network-based models to predict process quality with a set of process variables of only single manufacturing step, we applied this model to wafer fabrication parameters control and wafer lot yield optimization. The original data are collected from a wafer fabrication line, including technological parameters and wafer test results. The wafer lot yield is taken as the optimization target. Learning from historical technological records and wafer test results, the model can predict the wafer yield. To eliminate the "bad" or noisy samples from the sample set, an experimental method was used to determine the number of hidden units so that both good learning ability and prediction capability can be obtained.

Optimized design on high-power GaN-based Micro-LEDs - art. no. 684108

The structure of micro-LEDs was optimized designed. Optical, electrical and thermal characteristics of micro-LEDs were improved. The optimized design make micro-LEDs suitable for high-power device. The light extraction efficiency of micro-LEDs was analyzed by the means of ray tracing. The results shows that increasing the inclination angle of sidewall and height of mesa, and reducing the absorption of p and n electrode can enhance the light extraction efficiency of micro-LEDs. Furthermore, the total light output power can be boosted by increasing the density of micro-structures on the device. The high-power flip-chip micro-LEDs were fabricated, which has higher quantum efficiency than conventional BALED's. When the number of microstructure in micro-LEDs was increased by 57%, the light output power was enhanced 24%. Light output power is 82.88mW at the current of 350mA and saturation current is up to 800mA, all of these are better than BALED which was fabricated in the same epitaxial wafer. The IN characteristics of micro-LEDs are almost identical to BALED.

Color filter-less technology of LED back light for LCD-TV - art. no. 68410G

Back Light Unit (BLU) and Color Filter are the two key components for the perfect color display of Liquid Crystal Display (LCD) device. LCD can not light actively itself, so a form of illumination, Back Light Unit is needed for its display. The color filter which consists of RGB primary colors, is used to generate three basic colors for LCD display. Traditional CCFL back light source has several disadvantages, while LED back light technology makes LCD obtain quite higher display quality than the CCFL back light. LCD device based on LED back light owns promoted efficiency of display. Moreover it can generate color gamut above 100% of the NTSC specification. Especially, we put forward an idea of Color Filter-Less technology that we design a film which is patterned of red and green emitting phosphors, then make it be excited by a blue light LED panel we fabricate, for its special emitting mechanism, this film can emit RGB basic color, therefore replace the color filter of LCD device. This frame typically benefits for lighting uniformity and provide pretty high light utilization ratio. Also simplifies back light structure thus cut down the expenses.

The effects of sapphire substrates processes to the LED efficiency - art. no. 68410M

We investigate the relation between the thickness of sapphire substrates and the extraction efficiency of LED. The increasing about 5% was observed in the simulations and experiments when the sapphire thickness changed from 100um to 200um. But the output power increasing is inconspicuous when the thickness is more than 200um. The structure on bottom face of sapphire substrates can enhance the extraction efficiency of GaN-based LED, too. The difference of output power between the flip-chip LED with smooth bottom surface and the LED with roughness bottom surface is about 50%, where only a common sapphire grinding process is used. But for those LEDs grown on patterned sapphire substrate the difference is only about 10%. Another kind of periodic pattern on the bottom of sapphire is fabricated by the dry etch method, and the output of the back-etched LEDs is improved about 50% than a common. case.

Plasma induced damage in GaN-based light emitting diodes - art. no. 68410X

The effects of plasma induced damage in different conditions of ICP and PECVD processes on LEDs were presented. For ICP mesa etch, in an effort to confirm the effects of dry etch damage on the optical properties of p-type GaN, a photoluminescence (PL) measurement was investigated with different rf chuck power. It was founded the PL intensity of the peak decreased with increasing DC bias and the intensity of sample etched at a higher DC bias of -400V is less by two orders of magnitude than that of the as-grown sample. Meanwhile, In the IN curve for the etched samples with different DC biases, the reverse leakage current of higher DC bias sample was obviously degraded than the lower one. In addition, plasma induced damage was also inevitable during the deposition of etch masks and surface passivation films by PECVD. The PL intensity of samples deposited with different powers sharply decreased when the power was excessive. The PL spectra of samples deposited under the fixed condition with the different processing time were measured, indicating the intensity of sample deposited with a lower power did not obviously vary after a long time deposition. A two-layer film was made in order to improve the compactness of sparse dielectric film deposited with a lower power.

Research on color matching of LED backlight for large-color-gamut LCD application - art. no. 68410Y

Comparing with the conventional CCFL (Cold Cathode Fluorescent Lamp) backlight, three-basic-color LEDs backlight has some advantages such as good color reproduction, long life and lead free etc. Theoretically, the color gamut is determined by x, y coordinates of the three basic colors in CIE chromaticity diagram, and the x, y coordinates of each basic color can derived from the relative spectrum distribution (RSD) of the LED. In this paper, the red, green and blue LEDs' RSD models are established to calculate and analyze the color gamut of a backlight. By simulating those models, the relationships that the color gamut of a LED backlight varies with each color are analyzed, and the optimum combination of three colors is obtained within the given wavelengths ranges. Moreover, the combinations of three colors for the gamut of 115% NTSC and 110% NTSC are plotted in pictures, respectively.

Combined transparent electrodes for high power GaN-based LEDs with long life time

In this paper fabrication of high power light emitting diodes (LEDs) with combined transparent electrodes on both P-GaN and N-GaN have been demonstrated. Simulation and experimental results show that comparing with traditional metal N electrodes the efficacy of LEDs with transparent N electrode is increased by more than 10% and it is easier in process than the other techniques. Further more, combining the transparent electrodes with dielectric anti-reflection film, the extraction efficiency can be improved by 5%. At the same time, the transparent electrodes were protected by the dielectric film and the reliability of LEDs can be improved.

Study on surface morphology of GaN growth by MOCVD on GaN/Si(111) template

The surface morphology of GaN grown by MOCVD on GaN/Si template was studied. Rough morphology and deep pinhole defects on some surface areas of the samples were observed and studied. The formation of rough morphology is possibly related to Ga-Si alloy produced due to poor thermal stability of template at high temperature. The deep pinhole defects generated are deep down to the surface of MBE-grown GaN/Si template. The stress originated from the large thermal expansion coefficient difference between GaN and Si may be related to the formation of the pinhole defects. The surface morphology of the GaN can be improved by optimizing the GaN/Si template and decreasing the growth temperature.

High performance resonant tunneling diode on a new material structure

A new material structure with Al0.22Ga0.78As/In0.15Ga0.85As/GaAs emitter spacer layer and GaAs/In0.15Ga0.85As/GaAs well for resonant tunneling diodes is designed and the corresponding device is fabricated. RTDs DC characteristics are measured at room temperature. Peak-to-valley current ratio (PVCR) is 7.44 for RTD Analysis on these results suggests that the material structure will be helpful to improve the quality, of RTD.