320 resultados para fast preparation


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This paper proposes compact adders that are based on non-binary redundant number systems and single-electron (SE) devices. The adders use the number of single electrons to represent discrete multiple-valued logic state and manipulate single electrons to perform arithmetic operations. These adders have fast speed and are referred as fast adders. We develop a family of SE transfer circuits based on MOSFET-based SE turnstile. The fast adder circuit can be easily designed by directly mapping the graphical counter tree diagram (CTD) representation of the addition algorithm to SE devices and circuits. We propose two design approaches to implement fast adders using SE transfer circuits the threshold approach and the periodic approach. The periodic approach uses the voltage-controlled single-electron transfer characteristics to efficiently achieve periodic arithmetic functions. We use HSPICE simulator to verify fast adders operations. The speeds of the proposed adders are fast. The numbers of transistors of the adders are much smaller than conventional approaches. The power dissipations are much lower than CMOS and multiple-valued current-mode fast adders. (C) 2009 Elsevier Ltd. All rights reserved.

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Silicon sheets from powder (SSP) ribbons have been prepared by modified SSP technique using electronic-grade (9N purity) silicon powder. The surface morphology, crystallographic quality, composition and electric properties of the SSP ribbons were investigated by surface profiler, X-ray diffraction (XRD), scanning electron microscopy (SEM), metallurgical microscope, Auger electron spectroscopy (AES) and four-point probe apparatus, respectively. The results show that the SSP ribbon made from electronic-grade silicon powder is a suitable candidate for the substrates of crystalline silicon thin film (CSiTF) solar cells, which could meet the primary requirements of CSiTF solar cell process on the substrates, including surface smoothness, crystallographic quality, purity and electric conductivity, etc. (C) 2004 Elsevier B.V. All rights reserved.

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A thermo-optic variable optical attenuator module composed of a silicon-on-insulator attenuator chip and driving circuit was designed and fabricated. The module exhibited a maximum attenuation of 21.8 dB and a response time of 10 mu s. (c) 2005 Society of Photo-Optical Instrumentation Engineers.

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A rearrangeable nonblocking 4 x 4 thermooptic silicon-on-insulator waveguide switch matrix at 1.55-mu m integrated spot size converters is designed and fabricated for the first time. The insertion losses and polarization-dependent losses of the four channels are less than 10 and 0.8 dB, respectively. The extinction ratios are larger than 20 dB. The response times are 4.6 mu s for rising edge and 1.9 mu s for failing edge.

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A silicon-on-insulator-based thermo-optic waveguide switch integrated with spot size converters is designed and fabricated by inductively coupled plasma reactive ion etching. The device shows good characteristics, including low, insertion loss of 8 +/- 1 dB for wavelength 1530-1580 nm and fast response times of 4.6 As for rising edge and 1.9 mu s for failing edge. The extinction ratios of the two channels are 19.1 and 18 dB, respectively.

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A low power consumption 2 x 2 thermo-optic switch with fast response was fabricated on silicon-on-insulator by anisotropy chemical etching. Blocking trenches were etched on both sides of the phase-shifting arms to shorten device length and reduce power consumption. Thin top cladding layer was grown to reduce power consumption and switching time. The device showed good characteristics, including a low switching power of 145 mW and a fast switching speed of 8 +/- 1 mus, respectively. Two-dimensional finite element method was applied to simulate temperature field in the phase-shifting arm instead of conventional one-dimensional method. According to the simulated result, a new two-dimensional index distribution of phase-shifting arm was determined. Consequently finite-difference beam propagation method was employed to simulate the light propagation in the switch, and calculate the power consumption as well as the switching speed. The experimental results were in good agreement with the theoretical estimations. (C) 2004 Elsevier B.V. All rights reserved.

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Based on thermo-optical effect of silicon, a 2 x 2 switch is fabricated in silicon-on-insulator by chemical etching. The switch presents an extinction ratio of 26 dB and a power consumption of 169 mW. The response time F similar to 10.5 mus.

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We present a linear-cavity stretched-pulse fibre laser with mode locking by a nonlinear polarization rotation and by semiconductor saturable-absorber mirrors. A Q-switched mode-locking cw train and a mode-locking pulse train are obtained in the experiment. We investigate the effects of the equivalent fast saturable absorber and the slow saturable absorbers in experiment. It is found that neither the nonlinear polarization evolution effect nor a semiconductor saturable absorber mirror is enough to produce the stable cw mode-locking pulses in this experiment. A nonlinear polarization evolution effect controls the cavity loss to literally carve the pulses; semiconductor saturable absorber mirrors provide the self-restarting and maintain the stability of the mode-locking operation.

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Self-ordered porous alumina films on a semi-insulated GaAs substrate were prepared in oxalic acid aqueous solutions by three-step anodization. The I-t curve of anodization process was recorded to observe time effects of anodization. Atomic force microscopy was used to investigate structure and morphology of alumina films. It was revealed that the case of oxalic acid resulted in a self-ordered porous structure, with the pore diameters of 60-70 nm, the pore density of the order of about 10(10) pore cm(-2), and interpore distances of 95-100nm. At the same time the pore size and shape change with the pore widening time. Field-enhanced dissolution model and theory of deformation relaxation combined were brought forward to be the cause of self-ordered pore structure according to I-t curve of anodization and structure characteristics of porous alumina films. (c) 2006 Elsevier Ltd. All rights reserved.

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This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

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Radio frequency magnetron sputtering/post-carbonized-reaction technique was adopted to prepare good-quality GaN films on Al2O3(0 0 0 1) substrates. The sputtered Ga2O3 film doped with carbon was used as the precursor for GaN growth. X-ray diffraction (XRD) pattern reveals that the film consists of hexagonal wurtzite GaN. X-ray photoelectron spectroscopy (XPS) shows that no oxygen can be detected. Electrical and room-temperature photoluminescence measurements show that good-quality polycrystalline GaN films were successfully grown on Al2O3(0 0 0 1) substrates. (c) 2005 Elsevier B.V. All rights reserved.

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High-quality nc-Si/a-Si:H diphasic films with improved stability were prepared by using the plasma-enhanced chemical vapor deposition technology. In comparison with typical amorphous silicon, the diphasic silicon films possess higher photoconductivity (two orders larger than that of the amorphous silicon film) and fairly good photosensitivity(the ratio of the photo-to dark-conductivity is about 10) and higher stability (the degradation of the photoconductivity is less than 10% after 24h long light soaking with 50 mW/cm(2) intensity at room temperature). In addition, the diphasic silicon film has a better light spectra response in the longer wavelength range. The improvement in photoelectronic properties may be attributed to: the existence of the disorder within the amorphous matrix, which breaks the momentum selection rule in the optical transition and, consequently, results in the large light absorption coefficient and high photosensitivity; the improved medium range order and low gap states density. Excess carriers generated in the amorphous matrix tend to recombine in the embedded crystallites, which suppresses nonradiative recombination within the amorphous matrix and reduces the subsequent defect creation.

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Samples have been prepared at different temperatures by loading It molecules into the cages of zeolite 5A, and the measurements of the absorption spectra have been carried out for the prepared samples. It is shown that 12 molecular clusters are formed in the cages of zeolite 5A, and it is also found that molecular clusters which are bonded with intermolecular forces have an important feature, namely, the intermolecular distance in molecular clusters can be changed on different preparing conditions and the blue shift of absorption edges can not be as the criterion of forming molecular clusters.

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This paper proposes novel fast addition and multiplication circuits that are based on non-binary redundant number systems and single electron (SE) devices. The circuits consist of MOSFET-based single-electron (SE) turnstiles. We use the number of electrons to represent discrete multiple-valued logic states and we finish arithmetic operations by controlling the number of electrons transferred. We construct a compact PD2,3 adder and a 12x12bit multiplier using the PD2,3 adder. The speed of the adder can be as high as 600MHz with 400nW power dissipation. The speed of the adder is regardless of its operand length. The proposed circuits have much smaller transistors than conventional circuits.