Thickness measurement of GaN epilayer using high resolution X-ray diffraction technique

In this paper we propose a new method for measuring the thickness of the GaN epilayer, by using the ratio of the integrated intensity of the GaN epilayer X-ray diffraction peaks to that of the sapphire substrate ones. This ratio shows a linear dependence on the GaN epilayer thickness up to 2 mum. The new method is more accurate and convenient than those of using the relationship between the integrated intensity of GaN epilayer diffraction peaks and the GaN thickness. Besides, it can eliminate the absorption effect of the GaN epilayer.

Nano-layer structure of silicon-on-insulator materials

Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits. In the present paper, three novel SOI nano-layer structures have been demonstrated. ULTRA-THIN SOI has been fabricated by separation by implantation of oxygen (SIMOX) technique at low oxygen ion energy of 45 keV and implantation dosage of 1.81017/cm2. The formed SOI layer is uniform with thickness of only 60 nm. This layer is of crystalline quality. and the interface between this layer and the buried oxide layer is very sharp, PATTERNED SOI nanostructure is illustrated by source and drain on insulator (DSOI) MOSFETs. The DSOI structure has been formed by selective oxygen ion implantation in SIMOX process. With the patterned SOI technology, the floating-body effect and self-heating effect, which occur in the conventional SOI devices, are significantly suppressed. In order to improve the total-dose irradiation hardness of SOI devices, SILICON ON INSULATING MULTILAYERS (SOIM) nano-structure is proposed. The buried insulating multilayers, which are composed of SiOx and SiNy layers, have been realized by implantation of nitride and oxygen ions into silicon in turn at different ion energies, followed by two steps of high temperature annealing process, respectively, Electric property investigation shows that the hardness to the total-dose irradiation of SOIM is remarkably superior to those of the conventional SIMOX SOI and the Bond-and-Etch-Back SOI.

Photoluminescence of AlGaAs/InGaAs/GaAs pseudomorphic HEMTs with different thickness of spacer layer

The photoluminescence spectra of the single delta -doped AlGaAs/InGaAs/GaAs pseudomorphic HEMTs with different thickness of spacer layer were studied. There are two peaks in the PL spectra of the structure corresponding to two sub-energy levels of the InGaAs quantum well. It was found that the photoluminescence intensity ratio of the two peaks changes with the spacer thickness of the pseudomorphic HEMTs. The reasons were discussed. The possible use of this phenomenon in optimization of pseudomorphic HEMTs was also proposed. (C) 2001 Elsevier Science B.V. All rights reserved.

Effects of annealing time and Si cap layer thickness on the Si/SiGe/Si heterostructures thermal stability

The effects of annealing time and Si cap layer thickness: on the thermal stability of the Si/SiGe/Si heterostructures deposited by disilane and solid-Ge molecule beam epitaxy were investigated. It is found that in the same strain state of the SiGe layers the annealing time decreases with increasing Si cap layer thickness. This effect is analyzed by a force-balance theory and an equation has been obtained to characterize the relation between the annealing time and the Si cap layer thickness. (C) 2001 Elsevier Science B.V. All rights reserved.

Back-incident SiGe-Si multiple quantum-well resonant-cavity-enhanced photodetectors for 1.3-mu m operation

A back-incident Si-0.65 Ge-0.35/Si multiple quantum-well resonant-cavity-enhanced photodetector operating near 1.3 mum is demonstrated on a separation-by-implantation-oxygen substrate. The resonant cavity is composed of an electron-beam evaporated SiO2-Si distributed Bragg reflector as a top mirror and the interface between the buried SiO2 and the Si substrate as a bottom mirror. We have obtained the responsivity as high as 31 mA/WI at 1.305 mum and the full width at half maximum of 14 nm.

The influence of thickness on properties of GaN buffer layer and heavily Si-doped GaN grown by metalorganic vapor-phase epitaxy

The physical properties of low-temperature-deposited GaN buffer layers with different thicknesses grown by metal-organic vapor-phase epitaxy have been studied. A tentative model for the optimum thickness of buffer layer has been proposed. Heavily Si-doped GaN layers have been grown using silane as the dopant. The electron concentration of Si-doped GaN reached 1.7 x 10(20) cm(-3) with mobility 30 cm(2)/V s at room temperature. (C) 1998 Published by Elsevier Science B.V. All rights reserved.

Color filter-less technology of LED back light for LCD-TV - art. no. 68410G

Back Light Unit (BLU) and Color Filter are the two key components for the perfect color display of Liquid Crystal Display (LCD) device. LCD can not light actively itself, so a form of illumination, Back Light Unit is needed for its display. The color filter which consists of RGB primary colors, is used to generate three basic colors for LCD display. Traditional CCFL back light source has several disadvantages, while LED back light technology makes LCD obtain quite higher display quality than the CCFL back light. LCD device based on LED back light owns promoted efficiency of display. Moreover it can generate color gamut above 100% of the NTSC specification. Especially, we put forward an idea of Color Filter-Less technology that we design a film which is patterned of red and green emitting phosphors, then make it be excited by a blue light LED panel we fabricate, for its special emitting mechanism, this film can emit RGB basic color, therefore replace the color filter of LCD device. This frame typically benefits for lighting uniformity and provide pretty high light utilization ratio. Also simplifies back light structure thus cut down the expenses.

The effects of sapphire substrates processes to the LED efficiency - art. no. 68410M

We investigate the relation between the thickness of sapphire substrates and the extraction efficiency of LED. The increasing about 5% was observed in the simulations and experiments when the sapphire thickness changed from 100um to 200um. But the output power increasing is inconspicuous when the thickness is more than 200um. The structure on bottom face of sapphire substrates can enhance the extraction efficiency of GaN-based LED, too. The difference of output power between the flip-chip LED with smooth bottom surface and the LED with roughness bottom surface is about 50%, where only a common sapphire grinding process is used. But for those LEDs grown on patterned sapphire substrate the difference is only about 10%. Another kind of periodic pattern on the bottom of sapphire is fabricated by the dry etch method, and the output of the back-etched LEDs is improved about 50% than a common. case.

Tunable optical properties of nano-Au on vanadium dioxide

The optical properties of Au nanoparticles deposited on thermochromic thin films of VO2 are investigated using spectroscopy. A localized modification on the transmittance spectrum of VO2 film is formed due to the presence of Au nanoparticles which exhibit localized surface plasmon resonance (LSPR) in the visible-near IR region. The position of the modification wavelength region shows a strong dependence on the Au mass thickness and shifts toward the red as it increases. On the other hand, it was found that the LSPR of Au nanoparticles can be thermally tunable because of the thermochromism of the supporting material of VO2. The LSPR wavelength, lambda(SPR), shifts to the blue with increasing temperature, and shifts back to the red as temperature decreases. A fine tuning is achieved when the temperature is increased in a stepwise manner.

Nano-Ag on vanadium dioxide. II. Thermal tuning of surface plasmon resonance

Thermal tuning of the localized surface plasmon resonance (LSPR) of Ag nanoparticles on a thermochromic thin film of VO2 was studied experimentally. The tuning is strongly temperature dependent and thermally reversible. The LSPR wavelength lambda(SPR) shifts to the blue with increasing temperature from 30 to 80 degrees C, and shifts back to the red as temperature decreases. A smart tuning is achievable on condition that the temperature is controlled in a stepwise manner. The tunable wavelength range depends on the particle size or the mass thickness of the metal nanoparticle film. Further, the tunability was found to be enhanced significantly when a layer of TiO2 was introduced to overcoat the Ag nanoparticles, yielding a marked sensitivity factor Delta lambda(SPR)/Delta n, of as large as 480 nm per refractive index unit (n) at the semiconductor phase of VO2.

Two-dimensional numerical simulations of shock waves in micro convergent-divergent nozzles

The steady two-dimensional Navier-Stokes equations with the slip wall boundary conditions were used to simulate the supersonic flow in micro convergent-divergent nozzles. It is observed that shock waves can take place inside or outside of the micronozzles under the earth environment. For the over-expanded flows, there is a boundary layer separation point, downstream of which a wave interface separates the viscous boundary layer with back air flow and the inviscid core flow. The oblique shock wave is followed by the bow shock and shock diamond. The viscous boundary layer thickness relative to the whole nozzle width on the exit plane is increased but attains the maximum value around of 0.5 and oscillates against this value with the continuous increasing of the nozzle upstream pressures. The viscous effect either changes the normal shock waves outside of the nozzle for the inviscid flow to the oblique shock waves inside the nozzle, or transfers the expansion jet flow without shock waves for the inviscid flow to the oblique shock waves outside of the nozzle. 

Fabrication of Silicon-Based Template-Assisted Nanoelectrode Arrays and Ohmic Contact Properties Investigation

A convenient fabrication technology for large-area, highly-ordered nanoelectrode arrays on silicon substrate has been described here, using porous anodic alumina (PAA) as a template. The ultrathin PAA membranes were anodic oxidized utilizing a two-step anodization method, from Al film evaporated on substrate. The purposes for the use of two-step anodization were, first, improving the regularity of the porous structures, and second reducing the thickness of the membranes to 100 similar to 200 nm we desired. Then the nanoelectrode arrays were obtained by electroless depositing Ni-W alloy into the through pores of PAA membranes, making the alloy isolated by the insulating pore walls and contacting with the silicon substrates at the bottoms of pores. The Ni-W alloy was also electroless deposited at the back surface of silicon to form back electrode. Then ohmic contact properties between silicon and Ni-W alloy were investigated after rapid thermal annealing. Scanning electron microscopy (SEM) observations showed the structure characteristics, and the influence factors of fabrication effect were discussed. The current voltage (I-V) curves revealed the contact properties. After annealing in N-2 at 700 degrees C, good linear property was shown with contact resistance of 33 Omega, which confirmed ohmic contacts between silicon and electrodes. These results presented significant application potential of this technology in nanosize current-injection devices in optoelectronics, microelectronics and bio-medical fields.

THE DEPENDENCE OF THE INVERSION LAYER THICKNESS ON THE FILM THICKNESS IN THIN-FILM SOI STRUCTURES

The dependence of the inversion-layer thickness on the film thickness in thin-film SOI structure is analyzed theoretically by using computer simulation. A new concept and parameter, the critical thickness of thin film all-bulk inversion, is introduced for the design of thin-film MOS/SOI devices. It is necessary to select the film thickness T(s1) close to the all-bulk strong inversion critical thickness in order to get high-speed and high-power operation of ultra-thin film MOS/SOI devices.