234 resultados para Réalisation de soi


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The effects, caused by the process of the implantation of nitrogen in the buried oxide layer of SIMOX wafer, on the characteristics of partially depleted silicon-on-insulator nMOSFET have been studied. The experimental results show that the channel electron mobilities of the devices fabricated on the SIMON (separation by implanted oxygen and nitrogen) wafers are lower than those of the devices made on the SIMOX (separation by implanted oxygen) wafers. The devices corresponding to the lowest implantation dose have the lowest mobility within the range of the implantation dose given in this paper. The value of the channel electron mobility rises slightly and tends to a limit when the implantation dose becomes greater. This is explained in terms of the rough Si/SiO2 interface due to the process of implantation of nitrogen. The increasing negative shifts of the threshold voltages for the devices fabricated on the SIMON wafers are also observed with the increase of implanting dose of nitrogen. However, for the devices fabricated on the SIMON wafers with the lowest dose of implanted nitrogen in this paper, their threshold voltages are slightly larger on the average than those prepared on the SIMOX wafers. The shifts are considered to be due to the increment of the fixed oxide charge in SiO2 layer and the change of the density of the interface-trapped charge with the value and distribution included. In particular, the devices fabricated on the SIMON wafers show a weakened kink effect, compared to the ones made on the SIMOX wafers.

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Straight single-line defect optical waveguides in photonic crystal slabs are designed by the plane wave expansion method and fabricated into silicon-on-insulator (SOI) wafer by 248-nm deep UV lithography. We present an efficient way to measure the light transmission spectrum of the photonic crystal waveguide (PhC WG) at given polarization states. By employing the Mueller/Stokes method, we measure and analyse the light propagation properties of the PhC WG at different polarized states. It is shown that experimental results are in agreement with the simulation results of the three-dimensional finite-difference-time-domain method.

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A 16 x 16 thermo-optic wavelenght switch matrix has been designed and febricated on silicon-on-insulator wafer. For reducing device lenght, blocking switch matrix configuration is chosen. The building block of a matix is a 2 x 2 cell with Mach-Zehnder interferometer configuration, where a multi-mode interferometer serves as splitters/combiners. Spot size converters and isolating grooves are integrated on the same chip to reduce loss and power consumption. Average power consumption of the switch cell is 220 mW. The switching time of a switch cell is less than 3 mu s.

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A compact eight-channel flat spectral response arrayed waveguide grating (AWG) multiplexer based on siliconon-insulator (SOI) materials has been fabricated on the planar lightwave circuit (PLC). The 1-dB bandwidth of 48 GHz and 3-dB bandwidth of 69 GHz are obtained for the 100 GHz channel spacing. Not only non-adjacent crosstalk but also adjacent crosstalk are less than -25 dB. The on-chip propagation loss range is from 3.5 to 3.9 dB, and the 2 total device size is 1.5 x 1.0 cm(2). (c) 2005 Elsevier B.V. All rights reserved.

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In this paper, we report the fabrication of Si-based double hetero-epitaxial SOI materials Si/gamma-Al2O3/Si. First, single crystalline gamma-Al2O3 (100) insulator films were grown epitaxially on Si(100) by LPCVD, and then, Si(100) epitaxial films were grown on gamma-Al2O3 (100)/Si(100) epi-substrates using a CVD method similar to silicon on sapphire (SOS) epitaxial growth. The Si/gamma-Al2O3 (100)/Si(100) SOI materials are characterized in detail by RHEED, XRD and AES techniques. The results demonstrate that the device-quality novel SOI materials Si/gamma-Al2O3 (100)/Si(100) has been fabricated successfully and can be used for application of MOS device.

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A simple method based on the effective index method was used to estimate the minimum bend radii of curved SOI waveguides. An analytical formula was obtained to estimate the minimum radius of curvature at which the mode becomes cut off due to the side radiative loss.

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Submicrometer channel and rib waveguides based on SOI (Silicon-On-Insulator) have been designed and fabricated with electron-beam lithography and inductively coupled plasma dry etching. Propagation loss of 8.39dB/mm was measured using the cut-back method. Based on these so-called nanowire waveguides, we have also demonstrated some functional components with small dimensions, including sharp 90 degrees bends with radius of a few micrometers, T-branches, directional couplers and multimode interferometer couplers.

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We present detailed design, fabrication, and characterization issues of submicron rib waveguides based on silicon-on-insulator. The waveguides fabricated by EBL and ICP processes have propagation loss of 1.8dB/mm and bend loss of 0.14dB/90 degrees for bends with radius of 5 mu m.

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Characteristics of microring/racetrack resonators, in submicron SOI rib waveguides, have been investigated. The effects of waveguide dimensions, coupler design, roughness, and oxide cladding are considered. Moreover, guided mode, loss and dispersion of such waveguides are analyzed.

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Extracellular neural recording requires neural probes having more recording sites as well as limited volumes. With its mechanical characteristic and abundant process method, Silicon is a kind of material fit for producing neural probe. Silicon on insulator (SOI) is adopted in this paper to fabricate neural probes. The uniformity and manufacturability are improved. The fabricating process and testing results of a series of Multi channel micro neural probes were reported. The thickness of the probe is 15 mu m-30 mu m. The typical impedance characteristics of the record sites are around 2M Omega at 1k Hz. The performance of the neural probe in-vivo was tested on anesthetic rat. The recorded neural spike was typically around 140 mu V. Spike recorded from individual site could exceed 700 mu V. The average signal noise ratio was 7 or more.

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SOI (Silicon on Insulator) based photonic devices has attracted more and more attention in the recent years. Integration of SOI optical switch matrix with isolating grooves, total internal reflection (TIR) mirrors and spot size converter (SSC) was studied. A folding re-arrangeable non-blocking 4x4 optical switch matrix and a blocking 16x16 matrix with TIR mirrors and SSC were fabricated on SOI wafer. The performaces, including extinction ratio and the crosstalk, are better than before. The insertion loss and the polarization dependent loss (PDL) at 1.55 mu m increase slightly with longer device length, more bend and intersecting waveguides. The insertion losses decrease 2 similar to 3 dB when anti-reflection films are added in the ends of the devices. The rise and fall times of the devices are 2.1 mu s and 2.3 mu s, respectively.

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A SOI-based thermo-optic waveguide switch matrix worked at 1.55 mu m, integrated with spot size converters is designed and fabricated for the first time. The insertion loss and polarization dependent loss are less than 13dB and 2dB, respectively. The extinction ratio is larger than 19dB. The response time is less than 5 mu s and the power consumption of the switch cell is about 200mW.

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SOI (Silicon on Insulator) based photonic devices, including stimulated emission from Si diode, RCE (Resonant Cavity Enhanced) photodiode with quantum structure, MOS (Metal Oxide Semiconductor) optical modulator with high frequency, SOI optical matrix switch and wavelength tunable filter are reviewed in the paper. The emphasis will be played on our recent results of SOI-based thermo-optic waveguide matrix switch with low insertion loss and fast response. A folding re-arrangeable non-blocking 4x4 matrix switch with total internal reflection (TIR) mirrors and a first blocking 16 x 16 matrix were fabricated on SOI wafer. The extinction ratio and the crosstalk are better. The insertion loss and the polarization dependent loss (PDL) at 1.55 mu m increase slightly with longer device length and more bend and intersecting waveguides. The insertion losses are expected to decrease 2-3 dB when anti-reflection films are added in the ends of the devices. The rise and fall times of the devices are 2.1 mu s and 2.3 mu s, respectively.

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Novel compact design for 4-channel SOI-based reconfigurable optical add/drop multiplexer using microring resonators is presented and analyzed. Microring resonators have two important attributes as a key new technology for future optical communications, namely functionality and compactness. Functionality refers to the fact that a wide range of desirable filter characteristics can be synthesized by coupling multiple rings. Compactness refers the fact that ring resonators with radii about 30 mu m can lead to large scale integration of devices with densities on the order of 10(4) similar to 10(5) devices per square centimeter. A 4-channel reconfigurable optical add/drop multiplexer comprises a grid-like array of ridge waveguides which perpendicularly cross through each other. SOI-based resonators consisted of multiple rings at each of the cross-grid nodes serve as the wavelength selective switch, and they can switch an optical signal between two ports by means of tuning refractive index of one of the rings. The thermo-optic coefficient of silicon is 1.86x 10(-4) /K. Thus a temperature rise of 27K will increase the refractive index by 5 x 10(-3), which is enough to cause the switching of our designed microring resonators. The thermo-optic effect is used to suppress the resonator power transfer, rather than to promote loss. Thus, the input signal only suffers small attenuation and simultaneously low crosstalk can be achieved by using multiple rings.