Formation of total-dose-radiation hardened materials by sequential oxygen and nitrogen implantation and multi-step annealing

Separation by implantation of oxygen and nitrogen (SIMON) silicon-on-insulator (SOI) materials were fabricated by sequential oxygen and nitrogen implantation with annealing after each implantation. Analyses of SIMS, XTEM and HRTEM were performed. The results show that superior buried insulating multi-layers were well formed and the possible mechanism is discussed. The remarkable total-dose irradiation tolerance of SIMON materials was confirmed by few shifts of drain leakage current-gate source voltage (I-V) curves of PMOS transistors fabricated on SIMON materials before and after irradiation.

Influence of nitrogen annealing on electrical properties of lead zirconate titanate thin film deposited on titanium metal foil

We report on improved electrical properties of lead zirconate titanate (PZT) film deposited on titanium metal foil using nitrogen annealing. After nitrogen annealing of the PZT capacitors, symmetric capacitance-voltage (C-V) characteristics, higher dielectric constant and breakdown field, less change of dielectric constant with frequency, lower dielectric loss and leakage current are obtained. (C) 2003 Elsevier B.V. All rights reserved.

Radiation hardness improvement of separation-by-implantation-of-oxygen/silicon-on-insulator material by nitrogen ion implantation

In our work, nitrogen ions were implanted into separation-by-implantation-of-oxygen (SIMOX) wafers to improve the radiation hardness of the SIMOX material. The experiments of secondary ion mass spectroscopy (SIMS) analysis showed that some nitrogen ions were distributed in the buried oxide layers and some others were collected at the Si/SiO2 interface after annealing. The results of electron paramagnetic resonance (EPR) suggested the density of the defects in the nitrided samples changed with different nitrogen ion implantation energies. Semiconductor-insulator-semiconductor (SIS) capacitors were made on the materials, and capacitance-voltage (C-V) measurements were carried out to confirm the results. The super total dose radiation tolerance of the materials was verified by the small increase of the drain leakage current of the metal-oxide-semiconductor field effect transistor with n-channel (NMOSFETs) fabricated on the materials before and after total dose irradiation. The optimum implantation energy was also determined.

Fabrication of novel double-hetero-epitaxial SOT structure Si/gamma-Al2O3/Si

In this paper, we report the fabrication of Si-based double-hetero-epitaxial silicon on insulator (SOI) structure Si/gamma-Al2O3/Si. Firstly, single crystalline gamma-Al2O3(100) insulator films were grown epitaxially on Si(100) using the sources of TMA (Al(CH3)(3)) and O-2 by very low-pressure chemical vapor deposition. Afterwards, Si(100) epitaxial films were grown on gamma-Al2O3 (100)/Si(100) epi-substrates using a chemical vapor deposition method similar to the silicon on sapphire epitaxial growth. The Si/gamma-Al2O3/Si SOL materials are characterized in detail by reflect high-energy electron diffraction, X-ray diffraction and Auger energy spectrum (AES) techniques. The insulator layer of gamma-Al2O3 has an excellent dielectric property. The leakage current is less than 1 x 10(-10) A/cm(2) when the electric field is below 1.3 MV/ cm. The Si film grown on gamma-Al2O3/Si epi-substrates was single crystalline. Meanwhile, the AES depth profile of the SOL structure shows that the composition of gamma-Al2O3 film is uniform, and the carbon contamination is not observed. Additionally, the gamma-Al2O3/Si epi-substrates are suitable candidates as a platform for a variety of active layers such as GaN, SiC and GeSi. It shows a bright future for microelectronic and optical electronics applications. (C) 2002 Elsevier Science B.V. All rights reserved.

Heteroepitaxial growth and annealing of gamma-Al2O3 thin films on silicon

The gamma-Al2O3 films were grown on Si (100) substrates using the sources of TMA (Al (CH3)(3)) and O-2 by very low-pressure chemical vapor deposition (VLP-CVD). It has been found that the gamma-Al2O3 film has a mirror-like surface and the RMS was about 2.5nm. And the orientation relationship was gamma-Al2O3(100)/Si(100). The thickness uniformity of gamma-Al2O3 films for 2-inch epi-wafer was less than 5%. The X-ray diffraction (XRD) and reflection high-energy electron diffraction (RHEED) results show that the crystalline quality of the film was improved after the film was annealed at 1000degreesC in O-2 atmosphere. The high-frequency C-V and leakage current of Al/gamma-Al2O3/Si capacitor were also measured to verify the annealing effect of the film. The results show that the dielectric constant increased from 4 to 7 and the breakdown voltage for 65-nm-thick gamma-Al2O3 film on silicon increases from 17V to 53V.

Native-oxidized InAlAs blocking layer buried heterostructure InGaAsP-InP MQW laser for high-temperature operation

A novel idea of InAlAs native oxide utilized to replace the p-n-p-n thyristor blocking layer and improve the high-temperature performance of buried heterostructure InGaAsP-InP laser is first proposed and demonstrated. A characteristic temperature (T-0) of 50 K is achieved from an InA1As native oxide buried heterostructure (NOBH) InGaAsP-InP multiquantum-well laser with 1.5-mu m-wide diode leakage passage path. The threshold current and slope efficiency of NOBH laser changes from 5.6 mA, 0.23 mW/mA to 28 mA, 0.11 mW/mA with the operating temperature changing from 20 degrees C to 100 degrees C. It is comparable to conventional p-n reverse biased junction BH laser with minimized diode leakage current, and is much better than the buried ridge strip with proton implanted laterally confinement laser.

Plasma induced damage in GaN-based light emitting diodes - art. no. 68410X

The effects of plasma induced damage in different conditions of ICP and PECVD processes on LEDs were presented. For ICP mesa etch, in an effort to confirm the effects of dry etch damage on the optical properties of p-type GaN, a photoluminescence (PL) measurement was investigated with different rf chuck power. It was founded the PL intensity of the peak decreased with increasing DC bias and the intensity of sample etched at a higher DC bias of -400V is less by two orders of magnitude than that of the as-grown sample. Meanwhile, In the IN curve for the etched samples with different DC biases, the reverse leakage current of higher DC bias sample was obviously degraded than the lower one. In addition, plasma induced damage was also inevitable during the deposition of etch masks and surface passivation films by PECVD. The PL intensity of samples deposited with different powers sharply decreased when the power was excessive. The PL spectra of samples deposited under the fixed condition with the different processing time were measured, indicating the intensity of sample deposited with a lower power did not obviously vary after a long time deposition. A two-layer film was made in order to improve the compactness of sparse dielectric film deposited with a lower power.

Fabrication of improved FD SOIMOSFETs for suppressing edge effect

FD SOI MOSFETs with MESA and Irradiated FD SOI MOSFETs with LOCOS isolation usually show the edge effect, that is, the leakage current called hump is generated in the subthreshold region. According to different reasons for generating the edge effect, rounded corner process and BTS structure are applied to improve device performance. The results indicate that the above two methods are effective to reduce the edge effect and qualified devices are fabricated successfully.

Radiation response of partially-depleted MOS transistors fabricated in the fluorinated SIMOX wafers

Ionizing radiation response of partially-depleted MOS transistors fabricated in the, fluorinated SIMOX wafers has been investigated. The experimental data show that the, radiation-induced threshold voltage shift of PMOSFETs and NMOSFETs, as well as the radiation-induced increase of off-state leakage current of NMOSFETs can be restrained by implanting fluorine ions into the buried oxide of SIMOX wafers.

Temperature-stimulated abnormal annealing of neutron-induced damage in high-resistivity silicon detectors

Neutron-irradiated high-resistivity silicon detectors have been subjected to elevated temperature annealing (ETA). It has been found that both detector full depletion voltage and leakage current exhibit abnormal annealing (or ''reverse annealing'') behaviour for highly irradiated detectors: increase with ETA. Laser induced current measurements indicate a net increase of acceptor type space charges associated with the full depletion voltage increase after ETA. Current deep level transient spectroscopy (I-DLTS) and thermally stimulated current (TSC) data show that the dominant effect is the increase of a level at 0.39 eV below the conduction band (E(c) - 0.39 eV) or a level above the valence band (E(v) + 0.39 eV). Candidates tentatively identified for this level are the singly charged double vacancy (V-V-) level at E(c) - 0.39 eV, the carbon interstitial-oxygen interstitial (C-i-O-i) level at E(v) + 0.36 eV, and/or the tri-vacancy-oxygen center (V3O) at E(v) + 0.40 eV.

Investigation on the N-eff reverse annealing effect using TSC/I-DLTS: Relationship between neutron induced microscopic defects and silicon detector electrical degradations

Neutron induced defect levels in high resistivity silicon detectors have been studied using a current-based macroscopic defect analysis system: thermally stimulated current (TSC) and current deep level transient spectroscopy (I-DLTS). These studies have been correlated to the traditional C-V, I-V, and transient current and charge techniques (TCT/TChT) after neutron radiation and subsequent thermal anneals. It has been found that the increases of the space charge density, N-eff, in irradiated detectors after thermal anneals (N-eff reverse anneal) correspond to the increases of deep levels in the silicon bandgap. In particular, increases of the double vacancy center (V-V and V-V-- -) and/or C-i-O-i level have good correlations with the N-eff reverse anneal. It has also been observed that the leakage current of highly irradiated (Phi(n) > 10(13) n/cm(2)) detectors increases after thermal anneals, which is different from the leakage current annealing behavior of slightly irradiated (Phi(n) < 10(13) n/cm(2)) detectors. It is apparent that V-V center and/or C-i-O-i level play important roles in both N-eff and leakage current degradations for highly irradiated high resistivity silicon detectors.

Microscopic analysis of defects in a high resistivity silicon detector irradiated to 1.7x10(15)n/cm(2)

Current-based microscopic defect analysis methods with optical filling techniques, namely current deep level transient spectroscopy (I-DLTS) and thermally stimulated current (TSC), have been used to study defect levels in a high resistivity silicon detector (p(+)-n-n(+)) induced by very high fluence neutron (VHFN) irradiation (1.7x10(15) n/cm(2)). As many as fourteen deep levels have been detected by I-DLTS. Arrhenius plots of the I-DLTS data have shown defects with energy levels ranging from 0.03 eV to 0.5 eV in the energy band gap. Defect concentrations of relatively shallow levels (E(t) < 0.33 eV) are in the order of 10(13)cm(-3), while those for relatively deep levels (E(t) > 0.33 eV) are in the order of 10(14) cm(-3). TSC data have shown similar defect spectra. A full depletion voltage of about 27,000 volts has been estimated by C-V measurements for the as-irradiated detector, which corresponds to an effective space charge density (N-eff) in the order of 2x10(14) cm(-3). Both detector leakage current and full depletion voltage have been observed to increase with elevated temperature annealing (ETA). The increase of the full depletion voltage corresponds to the increase of some deep levels, especially the 0.39 eV level. Results of positron annihilation spectroscopy have shown a decrease of total concentration of vacancy related defects including vacancy clusters with ETA, suggesting the breaking up of vacancy clusters as possible source of vacancies for the formation of single defects during the reverse anneal.

A fast-settling frequency-presetting PLL frequency synthesizer with process variation compensation and spur reduction

This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixed-signal VCO and a digital processor are developed to accurately preset the frequency of VCO and greatly reduce the settling time. An auxiliary tuning loop is introduced in order to reduce reference spur caused by leakage current. The digital processor can automatically compensate presetting frequency variation with process and temperature, and control the operation of the auxiliary tuning loop. A 1.2 GHz integer-N synthesizer with 1 MHz reference input Was implemented in a 0.18μm process. The measured results demonstrate that the typical settling time of the synthesizer is less than 3μs,and the phase noise is -108 dBc/Hz@1MHz.The reference spur is -52 dBc.

A Novel 4T nMOS-Only SRAM Cell in 32nm Technology Node

This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator （SO1） technology node. It consists of two access transistors and two pull-down transistors. The pull-down transistors have larger channel length than the access transistors. Due to the significant short channel effect of small-size MOS transistors, the access transistors have much larger leakage current than the pull-down transistors,enabling the SRAM cell to maintain logic ＂1＂ while in standby. The storage node voltages of the cell are fed back to the back-gates of the access transistors,enabling the stable ＂read＂ operation of the cell. The use of back-gate feedback also helps to im- prove the static noise margin （SNM） of the cell. The proposed SRAM cell has smaller area than conventional bulk 6T SRAM cells and 4T SRAM cells. The speed and power dissipation of the SRAM cell are simulated and discussed. The SRAM cell can operate with a 0. 5V supply voltage.

Total Dose Radiation-Hard 0. SOI CMOS Transistors and ASIC

This paper presents the total dose radiation performance of 0. S^m SOI CMOS devices fabricated with full dose SIMOX technology. The radiation performance is characterized by threshold voltage shifts and leakage currents of transistors and standby currents of ASIC as functions of the total dose up to 500krad(Si) .The experimental results show that the worst case threshold voltage shifts of front channels are less than 320mV for pMOS transistors under off-gate radiation bias at lMrad(Si) and less than 120mV for nMOS transistors under on-gate radiation bias. No significant radiation-induced leakage current is observed in transistors to lMrad(Si). The standby currents of ASIC are less than the specification of 5μA over the total dose range of 500krad(Si).