211 resultados para Field-effect transistors


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The influence of dielectric surface energy on the initial nucleation and the growth of pentacene films as well as the electrical properties of the pentacene-based field-effect transistors are investigated. We have examined a range of organic and inorganic dielectrics with different surface energies, such as polycarbonate/SiO2, polystyrene/SiO2, and PMMA/SiO2 bi-layered dielectrics and also the bare SiO2 dielectric. Atomic force microscopy measurements of sub-monolayer and thick pentacene films indicated that the growth of pentacene film was in Stranski-Kranstanow growth mode on all the dielectrics. However, the initial nucleation density and the size of the first-layered pentacene islands deposited on different dielectrics are drastically influenced by the dielectric surface energy. With the increasing of the surface energy, the nucleation density increased and thus the average size of pentacene islands for the first mono-layer deposition decreased. The performance of fabricated pentacene-based thin film transistors was found to be highly related to nucleation density and the island size of deposited Pentacene film, and it had no relationship to the final particle size of the thick pentacene film. The field effect mobility of the thin film transistor could be achieved as high as 1.38 cm(2)/Vs with on/off ratio over 3 x 10(7) on the PS/SiO2 where the lowest surface energy existed among all the dielectrics. For comparison, the values of mobility and on/off ratio were 0.42 cm(2)/Vs and 1 x 10(6) for thin film transistor deposited directly on bare SiO2 having the highest surface energy.

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The fabrication of multilayer microstructures, for example for organic field-effect transistors, using metal transfer printing (MTP) is demonstrated. The Figure shows a two-layer gold structure produced by MTP. Since MTP is a purely additive technique, in which mechanical adhesion acts as the patterning driving force, it is considered an attractive approach to reel-to-reel processing.

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Phthalocyanato tin(IV) dichloride, an axially dichloriniated MPc, is an air-stable high performance n-type organic semiconductor with a field-effect electron mobility of up to 0.30 cm(2) V-1 s(-1). This high mobility together with good device stability and commercial availability makes it a most suitable n-type material for future organic thin-film transistor applications.

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Organic thin-film transistors (OTFTs) using high dielectric constant material tantalum pentoxide (Ta2O5) and benzocyclobutenone (BCBO) derivatives as double-layer insulator were fabricated. Three metals with different work function, including Al (4.3 eV), Cr (4.5 eV) and Au (5.1 eV), were employed as gate electrodes to study the correlation between work function of gate metals and hysteresis characteristics of OTFTs. The devices with low work function metal Al or Cr as gate electrode exhibited high hysteresis (about 2.5 V threshold voltage shift). However, low hysteresis (about 0.7 V threshold voltage shift) OTFTs were attained based on high work function metal Au as gate electrode.

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This paper proposes a novel single-electron multiple-valued memory. It is a metal-oxide-semiconductor field effect transistor (MOS)-type memory with multiple separate control gates and floating gate layer, which consists of nano-crystal grains. The electron can tunnel among the grains (floating gates) and between the floating gate layer and the MOS channel. The memory can realize operations of 'write', 'store' and 'erase' of multiple-valued signals exceeding three values by controlling the single electron tunneling behavior. We use Monte Carlo method to simulate the operation of single-electron four-valued memory. The simulation results show that it can operate well at room temperature.

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The influence of a transverse magnetic field up to 13 T at 1.6 K on the current-voltage, I (V), characteristics of a doped GaAs/AlAs superlattice was investigated. Current hysteresis was observed in the domain formation regions of the I (V) at zero magnetic field while applied bias was swept in both up (0-6 V) and down (6-0 V) directions. The magnitude of current hysteresis was reduced and finally disappeared with increasing transverse magnetic field. The effect is explained as the modification of the current density versus electric field characteristic by transverse magnetic fields. Calculated results based on the tunnelling current formula in a superlattice support our interpretation.

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This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devices (SEDs) and metal-oxide-semiconductor (MOS) field-effect transistors. The PLL frequency synthesizer mainly consists of a single-electron transistor (SET)/MOS hybrid voltage-controlled oscillator circuit, a single-electron (SE) turnstile/MOS hybrid phase-frequency detector (PFD) circuit and a SE turnstile/MOS hybrid frequency divider. The phase-frequency detection and frequency-division functions are realized by manipulating the single electrons. We propose a SPICE model to describe the behavior of the MOSFET-based SE turnstile. The authors simulate the performance of the PILL block circuits and the whole PLL synthesizer. Simulation results indicated that the circuit can well perform the operation of the PLL frequency synthesizer at room temperature. The PILL synthesizer is very compact. The total number of the transistors is less than 50. The power dissipation of the proposed PLL circuit is less than 3 uW. The authors discuss the effect of fabrication tolerance, the effect of background charge and the SE transfer accuracy on the performance of the PLL circuit. A technique to compensate parameter dispersions of SEDs is proposed.

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The electronic structure of diluted magnetic semiconductor (DMS) superlattices under an in-plane magnetic field is studied within the framework of the effective-mass theory; the strain effect is also included in the calculation. The numerical results show that an increase of the in-plane magnetic field renders the DMS superlattice from the direct band-gap system to the indirect band-gap system, and spatially separates the electron and the hole by changing the type-I band alignment to a type-II band alignment. The optical transition probability changes from type I to type II and back to type I like at large magnetic field. This phenomenon arises from the interplay among the superlattice potential profile, the external magnetic field, and the sp-d exchange interaction between the carriers and the magnetic ions. The shear strain induces a strong coupling of the light- and heavy-hole states and a transition of the hole ground states from "light"-hole to "heavy"-hole-like states.

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Shubnikov-de Haas measurements were carried out for In0.52Al0.48As/InxGa1-xAs metamorphic high-electron-mobility-transistor structures grown on GaAs substrates with different indium contents and/or different Si delta-doping concentrations. Zero-field (B-->0) spin splitting was found in samples with stronger conduction band bending in the InGaAs well. It was shown that the dominant spin splitting mechanism is attributed to the contribution by the Rashba term. We found that zero-field spin splitting not only occurs in the ground electron subband, but also in the first excited electron subband for a sample with Si delta-doping concentration of 6x10(12) cm(-2). We propose that this In0.52Al0.48As/InxGa1-xAs metamorphic high-electron-mobility-transistor structure grown on GaAs may be a promising candidate spin-polarized field-effect transistors. (C) 2002 American Institute of Physics.

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Three causes involved in the instability of the ISFET are proposed in this study. First, it is ascertained that hydroxyl group resident at the surface of the Si3N4 film or in the electrolyte solution is most active and subject to gain or loss of electrons. This is one of the main causes for ISFET structural instability. Secondly, the stability of the pH-sensitive FET varies with deposition conditions in the fabrication process of the ISFET. This proves to be another cause of ISFET instability. Thirdly, the pH of the measured solution varies with the measuring process and time, contributing to the instability, but is not a cause of the instability of the pH-ISFET itself. We utilized the technique of readjusting and controlling the ratio of hydroxyl groups to amine groups to enhance the stability of the ISFET. Our techniques to improve stability characteristics proved to be effective in practice.

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Results are reported of electric-field dependence on thermal emission of electrons from the 0.40 eV level at various temperatures in InGaP by means of deep-level transient spectroscopy. The data are analyzed according to the Poole-Frankel emission from the potentials which are assumed to be Coulombic, square well, and Gaussian, respectively. The emission mte from this level is strongly field dependent. It is found that the Gaussian potential model is more reasonable to describe the phosphorus-vacancy-induced potential in InGaP than the Coulombic and square-well ones.

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N-shaped negative differential resistance (NDR) with a high peak-to-valley ratio (PVR) is observed in a GaAs-based modulation-doped field effect transistor (MODFET) with InAs quantum dots (QDs) in the barrier layer (QDFET) compared with a GaAs MODFET. The NDR is explained as the real-space transfer (RST) of high-mobility electrons in a channel into nearby barrier layers with low mobility, and the PVR is enhanced dramatically upon inserting the QD layer. It is also revealed that the QD layer traps holes and acts as a positively charged nano-floating gate after a brief optical illumination, while it acts as a negatively charged nano-floating gate and depletes the adjacent channel when charged by the electrons. The NDR suggests a promising application in memory or high-speed logic devices for the QDFET structure.

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We investigated the electrical instability of vanadyl-phthalocyanine (VOPc) thin-film transistors (TFTs) at various temperatures. The results demonstrate a slow threshold voltage shift in the bias stress process and a rapid recovery after the removal of bias stress, which indicates that a slower degradation process occurs in the on state while a faster removal in the off state of VOPc TFTs. The shift of threshold voltage comes from traps generated at the organic/dielectrics interface. Additionally, a relaxation time of 10(7) s was obtained at room temperature according to the stretched exponential model, which is comparable to a-Si: H TFTs. Therefore, VOPc TFTs are suitable to be applied in flat panel displays.