35 resultados para Drain-tiles


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Enhancement of the electrical properties in an AlGaN/GaN high electron mobility transistor (HEMT) structures was demonstrated by employing the combination of a high mobility GaN channel layer and an AlN interlayer. The structures were grown on 50 mm semi-insulating (SI) 6H-SiC substrates by metalorganic chemical vapor deposition (MOCVD). The room temperature (RT) two-dimensional electron gas (2DEG) mobility was as high as 2215 cm(2)/V s, with a 2DEG concentration of 1.044 x 10(13)cm(-2). The 50 mm HEMT wafer exhibited a low average sheet resistance of 251.0 Omega/square, with a resistance uniformity of 2.02%. The 0.35 Pin gate length HEMT devices based on this material structure, exhibited a maximum drain current density of 1300 mA/mm, a maximum extrinsic transconductance of 314 mS/mm, a current gain cut-off frequency of 28 GHz and a maximum oscillation frequency of 60 GHz. The maximum output power density of 4.10 W/mm was achieved at 8 GHz, with a power gain of 6.13 dB and a power added efficiency (PAE) of 33.6%. (c) 2006 Elsevier B.V. All rights reserved.

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AlGaN/GaN high electron mobility transistor (HEMT) structures were grown on 2 inch sapphire substrates by MOCVD, and 0.8-mu m gate length devices were fabricated and measured. It is shown by resistance mapping that the HEMT structures have an average sheet resistance of approximately 380 Omega/sq with a uniformity of more than 96%. The 1-mm gate width devices using the materials yielded a pulsed drain current of 784 mA/mm at V-gs=0.5 V and V-ds=7 V with an extrinsic transconductance of 200 mS/mm. A 20-GHz unity current gain cutoff frequency (f(T)) and a 28-GHz maximum oscillation frequency (f(max)) were obtained. The device with a 0.6-mm gate width yielded a total output power of 2.0 W/mm (power density of 3.33 W/mm) with 41% power added efficiency (PAE) at 4 GHz.

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Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits. In the present paper, three novel SOI nano-layer structures have been demonstrated. ULTRA-THIN SOI has been fabricated by separation by implantation of oxygen (SIMOX) technique at low oxygen ion energy of 45 keV and implantation dosage of 1.81017/cm2. The formed SOI layer is uniform with thickness of only 60 nm. This layer is of crystalline quality. and the interface between this layer and the buried oxide layer is very sharp, PATTERNED SOI nanostructure is illustrated by source and drain on insulator (DSOI) MOSFETs. The DSOI structure has been formed by selective oxygen ion implantation in SIMOX process. With the patterned SOI technology, the floating-body effect and self-heating effect, which occur in the conventional SOI devices, are significantly suppressed. In order to improve the total-dose irradiation hardness of SOI devices, SILICON ON INSULATING MULTILAYERS (SOIM) nano-structure is proposed. The buried insulating multilayers, which are composed of SiOx and SiNy layers, have been realized by implantation of nitride and oxygen ions into silicon in turn at different ion energies, followed by two steps of high temperature annealing process, respectively, Electric property investigation shows that the hardness to the total-dose irradiation of SOIM is remarkably superior to those of the conventional SIMOX SOI and the Bond-and-Etch-Back SOI.

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We derive the modified rate equations for an Aharonov-Bohm (AB) ring with two transversely coupled quantum dots (QD's) embedded in two arms in the presence of a magnetic field. We find that the interdot coupling between the two QD's can cause a temporal oscillation in electron occupation at the initial stage of the quantum dynamics, while the source-drain current decays monotonically to a stationary value. On the other hand, the interdot coupling equivalently divides the AB ring into two coupled subrings. That also destroys the normal AB oscillations with a period of 2pi, and generates new and complex periodic oscillations with their periods varying in a linear manner as the ratio between two magnetic fluxes (each penetrates one AB subring) increases. Furthermore, the interference between two subrings is also evident from the observation of the perturbed fundamental AB oscillation.

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AlGaN/AlN/GaN/InGaN/GaN double heterojunction high electron mobility transistors (DH-HEMTs) structures with improved buffer isolation have been investigated. The structures were grown by MOCVD on sapphire substrate. AFM result of this structure shows a good surface morphology with the root-mean-square roughness (RMS) of 0.196 nm for a scan area of 5 mu mx5 mu m. A mobility as high as 1950 cm(2)/Vs with the sheet carrier density of 9.89x10(12) cm(-2) was obtained, which was about 50% higher than other results of similar structures which have been reported. Average sheet resistance of 327 Omega/sq was achieved. The HEMTs device using the materials was fabricated, and a maximum drain current density of 718.5 mA/mm, an extrinsic transconductance of 248 mS/mm, a current gain cutoff frequency of 16 GHz and a maximum frequency of oscillation 35 GHz were achieved.

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This paper describes a 12-bit 300 MHz CMOS DAC for high-speed system applications. The proposed DAC consists of a unit current-cell matrix for 8 MSBs and a binary-weighted array for 4 LSBs. In order to ensure the linearity of DAC, a double Centro symmetric current matrix is designed by using the Q(2) random walk strategy. To minimize the feedthrough and improve the dynamic performance, the drain of the switching transistors is isolated from the output lines by adding two cascoded transistors.

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The influence of annealed ohmic contact metals on the electron mobility of a two dimensional electron gas (2DEG) is investigated on ungated AlGaN/GaN heterostructures and AlGaN/GaN heterostructure field effect transistors (AlGaN/GaN HFETs). Current-voltage (I-V) characteristics for ungated AlGaN/GaN heterostructures and capacitance-voltage (C-V) characteristics for AlGaN/GaN HFETs are obtained, and the electron mobility for the ungated AlGaN/GaN heterostructure is calculated. It is found that the electron mobility of the 2DEG for the ungated AlGaN/GaN heterostructure is decreased by more than 50% compared with the electron mobility of Hall measurements. We propose that defects are introduced into the AlGaN barrier layer and the strain of the AlGaN barrier layer is changed during the annealing process of the source and drain, causing the decrease in the electron mobility.

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We propose and fabricate an A1GaN/GaN high electron mobility transistor (HEMT) on sapphire substrate using a new kind of electron beam (EB) lithography layout for the T-gate. Using this new layout,we can change the aspect ratio (ratio of top gate dimension to gate length) and modify the shape of the T-gate freely. Therefore, we obtain a 0.18μm gate-length AlGaN/GaN HEMT with a unity current gain cutoff frequency (f_T) of 65GHz. The aspect ratio of the T-gate is 10. These single finger devices also exhibit a peak extrinsic transconductance of 287mS/mm and a maximum drain current as high as 980mA/mm.

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A reproducible terahertz (THz) photocurrent was observed at low temperatures in a Schottky wrap gate single electron transistor with a normal-incident of a CH_3OH gas laser with the frequency 2. 54THz.The change of source-drain current induced by THz photons shows that a satellite peak is generated beside the resonance peak. THz photon energy can be characterized by the difference of gate voltage positions between the resonance peak and satellite peak. This indicates that the satellite peak exactly results from the THz photon-assisted tunneling. Both experimental results and theoretical analysis show that a narrow spacing of double barriers is more effective for the enhancement of THz response.

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AlGaN/AlN/GaN high electron mobility transistor (HEMT) structures with a high-mobility GaN thin layer as a channel are grown on high resistive 6H-SiC substrates by metalorganic chemical vapor deposition. The HEMT structure exhibits a typical two-dimensional electron gas (2DEG) mobility of 1944cm2/(V · s) at room temperature and 11588cm2/(V· s) at 80K with almost equal 2DEG concentrations of about 1.03 × 1013 cm-2 High crystal quality of the HEMT structures is confirmed by triple-crystal X-ray diffraction analysis. Atomic force microscopy measurements reveal a smooth AlGaN surface with a root-mean-square roughness of 0. 27nm for a scan area of 10μm × 10μm. HEMT devices with 0.8μm gate length and 1.2mm gate width are fabricated using the structures. A maximum drain current density of 957mA/mm and an extrinsic transconductance of 267mS/mm are obtained.

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A Si doped AlGaN/GaN HEMT structure with high Al content (x= 44%) in the barrier layer is grown on sapphire substrate by RF-MBE. The structural and electrical properties of the heterostructure are investigated by the triple axis X-ray diffraction and Van der Pauw-Hall measurement, respectively. The observed prominent Bragg peaks of the GaN and AlGaN and the Hall results show that the structure is of high quality with smooth interface.fabricated and characterized. Better DC characteristics, maximum drain current of 1.0A/mm and extrinsic transconductance of 218mS/mm are obtained when compared with HEMTs fabricated using structures with lower Al mole fraction in the AlGaN barrier layer. The results suggest that the high Al content in the AlGaN barrier layer is promising in improving material electrical properties and device performance.

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AlGaN/GaN high electron mobility transistor (HEMT) materials are grown by RF plasma-assisted molecular beam epitaxy (RF-MBE) and HEMT devices are fabricated and characterized. The HEMT materials have a mobility of 1035cm~2/(V ? s) at sheet electron concentration of 1.0 * 10~(13)cm~(-2) at room temperature. For the de-vices fabricated using the malt-rials,a maximum saturation drain-current density of 925mA/mm and a peak extrinsic iransecmductance of IHfimS/mm are obtained on devices with gate length and width of l/-im and 80/im respectively. The f_t, unit-current-gain frequency of the devices,is about 18. 8GHz.

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Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits. In the present paper, three novel SOI nano-layer structures have been demonstrated. ULTRA-THIN SOI has been fabricated by separation by implantation of oxygen (SIMOX) technique at low oxygen ion energy of 45 keV and implantation dosage of 1.81017/cm2. The formed SOI layer is uniform with thickness of only 60 nm. This layer is of crystalline quality. and the interface between this layer and the buried oxide layer is very sharp, PATTERNED SOI nanostructure is illustrated by source and drain on insulator (DSOI) MOSFETs. The DSOI structure has been formed by selective oxygen ion implantation in SIMOX process. With the patterned SOI technology, the floating-body effect and self-heating effect, which occur in the conventional SOI devices, are significantly suppressed. In order to improve the total-dose irradiation hardness of SOI devices, SILICON ON INSULATING MULTILAYERS (SOIM) nano-structure is proposed. The buried insulating multilayers, which are composed of SiOx and SiNy layers, have been realized by implantation of nitride and oxygen ions into silicon in turn at different ion energies, followed by two steps of high temperature annealing process, respectively, Electric property investigation shows that the hardness to the total-dose irradiation of SOIM is remarkably superior to those of the conventional SIMOX SOI and the Bond-and-Etch-Back SOI.

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SOI based wrap-gate silicon nanowire FETs are fabricated through electron beam lithography and wet etching. Dry thermal oxidation is used to further reduce the patterned fins cross section and transfer them into nanowires. Silicon nanowire FETs with different nanowire widths varying from 60 nm to 200 nm are fabricated and the number of the nanowires contained in a channel is also varied. The on-current (I-ON) and off-current (I-OFF) of the fabricated silicon nanowire FET are 0.59 mu A and 0.19 nA respectively. The subthreshold swing (SS) and the drain induced barrier lowering are 580 mV/dec and 149 mVN respectively due to the 30 nm thick gate oxide and 1015 cm(-3) lightly doped silicon nanowire channel. The nanowire width dependence of SS is shown and attributed to the fact that the side-gate parts of a wrap gate play a more effectual role as the nanowires in a channel get narrower. It seems the nanowire number in a channel has no effect on SS because the side-gate parts fill in the space between two adjacent nanowires.

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Transport in a semiopen Kondo- correlated quantum dot is mediated through more than one quantum state. Using the Keldysh technique and the equation of motion method, we study the shot noise S for a wide range of source- drain voltages V-sd within a model incorporating the additional states as a background continuum, demonstrating the importance of the Fano interference. In the absence of the interference, the noise is revealed to be a probe of the second moment of the local density of states, and our theory reproduces the well- known peak structure around the Kondo temperature in the S-V-sd curve. More significantly, it is found that taking account of the background transmission, the voltage dependence of the noise exhibits rich peak- dip line shapes, indicating the presence of the Fano effect. We further demonstrate that due to its two- particle nature, the noise is more sensitive to the quantum interference effect than the simple current.