A Fast-Locking Phase-Locked Loop Using a Seven-State Phase Frequency Detector

A seven-state phase frequency detector (S.S PFD) is proposed for fast-locking charge pump based phase-locked loops (CPPLLs) in this paper. The locking time of the PLL can be significantly reduced by using the seven-state PFD to inject more current into the loop filter. In this stage, the bandwidth of the PLL is increased or decreased to track the phase difference of the reference signal and the feedback signal. The proposed architecture is realized in a standard 0.35 mu m 2P4M CMOS process with a 3.3V supply voltage. The locking time of the proposed PLL is 1.102 mu s compared with the 2.347 mu s of the PLL based on continuous-time PFD and the 3.298 mu s of the PLL based on the pass-transistor tri-state PFD. There are 53.05% and 66.59% reductions of the locking time. The simulation results and the comparison with other PLLs demonstrate that the proposed seven-state PFD is effective to reduce locking time.

A standard CMOS compatible monolithic photo-detector and trans-impedance amplifier

A 1GHz monolithic photo-detector (PD) and trans-impedance amplifier (TIA) is designed with the standard 0.35 mu m CMOS technique. The design of the photo-detector is analyzed and the CMOS trans-impedance amplifier is also analyzed in the paper. The integrating method is described too. The die photograph is also showed in the paper.

1.55 mu m Ge islands resonant-cavity-enhanced narrowband detector

The high quality Ge islands material with 1.55 mu m photo-response grown on Sol substrate is reported. Due to the modulation of the cavity formed by the mirrors at the surface and the buried SiO2 interface, seven sharp and strong peaks with narrow linewidth are found. And a 1.55 mu m Ge islands resonant-cavity-enhanced (RCE) detector with narrowband was fabricated by a simple method. The bottom mirror was deposited in the hole formed by anisotropically etching, in a basic solution from the backside of the sample with the buried SiO2 layer in silicon-on-insulator substrate as the etch-stop layer. Reflectivity spectrum indicates that the mirror deposited in the hole has a reflectivity as high as 99% in the range of 1.2-1.65 mu m. The peak responsivity of the RCE detector at 1543.8 nm is 0.028 mA/W and a full width at half maximum of 5 nm is obtained. Compared with the conventional p-i-n photodetector, the responsivity of RCE detector has a nearly threefold enhancement.

A Simplified Soft-output QRD-M MIMO Detector

In this paper, a low-complexity soft-output QRD-M detection algorithm is proposed for high-throughput Multiple-input multiple-output (MIMO) systems. By employing novel expansion on demand and distributed sorting scheme, the proposed algorithm can reduce 70% and 85% foundational operations for 16-QAM and 64-QAM respectively compared to the conventional QRD-M algorithm. Furthermore, the proposed algorithm can yield soft information to improve the bit error rate (BER) performance. Simulation results show that the proposed algorithm can achieve a near-NIL detection performance with less foundational operations

A Novel CMOS Color Pixel for Vision Chips

This paper presents a novel CMOS color pixel with a 2D metal-grating structure for real-time vision chips. It consists of an N-well/P-substrate diode without salicide and 2D metal-grating layers on the diode. The periods of the 2D metal structure are controlled to realize color filtering. We implemented sixteen kinds of the pixels with the different metal-grating structures in a standard 0.18 mu m CMOS process. The measured results demonstrate that the N-well/P-substrate diode without salicide and with the 2D metal-grating structures can serve as the high speed RGB color active pixel sensor for real-time vision chips well.

Strain-Compensated InGaAs/InAlAs Quantum Cascade Detector of 4.5 mu m Operating at Room Temperature

We present a strain-compensated InP-based InGaAs/InAlAs photovoltaic quantum cascade detector grown by solid source molecular beam epitaxy. The detector is based on a vertical intersubband transition and electron transfer on a cascade of quantum levels which is designed to provide longitudinal optical phonon extraction stairs. By careful structure design and growth, the whole epilayer has a residual strain toward InP substrate of only -2.8 x 10(-4). A clear narrow band detection spectrum centered at 4.5 mu m has been observed above room temperature for a device with 200 x 200 mu m(2) square mesa.

ZnO thin film photoconductive ultraviolet detector with fast photoresponse

C-axis preferred oriented ZnO thin films were prepared on quartz substrates by RF sputtering. Photoconductive ultraviolet detector with planar interdigital electrodes was fabricated on ZnO thin film by the lift off technique. Linear I-V characteristic was observed under dark or 365 nm UV light illumination and has obvious difference. The photoresponsivity of 365 nm at 5 V bias is 18 A/W. The response time measure set mainly contains KrF excimer laser with the pulse width of 30 ns and the oscillograph with the bandwidth of 200 MHz. The result shows fast photoresponse with a rise time of 100 ns and fall time of 1.5 mu s. (c) 2005 Elsevier B.V. All rights reserved.

Investigation on the N-eff reverse annealing effect using TSC/I-DLTS: Relationship between neutron induced microscopic defects and silicon detector electrical degradations

Neutron induced defect levels in high resistivity silicon detectors have been studied using a current-based macroscopic defect analysis system: thermally stimulated current (TSC) and current deep level transient spectroscopy (I-DLTS). These studies have been correlated to the traditional C-V, I-V, and transient current and charge techniques (TCT/TChT) after neutron radiation and subsequent thermal anneals. It has been found that the increases of the space charge density, N-eff, in irradiated detectors after thermal anneals (N-eff reverse anneal) correspond to the increases of deep levels in the silicon bandgap. In particular, increases of the double vacancy center (V-V and V-V-- -) and/or C-i-O-i level have good correlations with the N-eff reverse anneal. It has also been observed that the leakage current of highly irradiated (Phi(n) > 10(13) n/cm(2)) detectors increases after thermal anneals, which is different from the leakage current annealing behavior of slightly irradiated (Phi(n) < 10(13) n/cm(2)) detectors. It is apparent that V-V center and/or C-i-O-i level play important roles in both N-eff and leakage current degradations for highly irradiated high resistivity silicon detectors.

Microscopic analysis of defects in a high resistivity silicon detector irradiated to 1.7x10(15)n/cm(2)

Current-based microscopic defect analysis methods with optical filling techniques, namely current deep level transient spectroscopy (I-DLTS) and thermally stimulated current (TSC), have been used to study defect levels in a high resistivity silicon detector (p(+)-n-n(+)) induced by very high fluence neutron (VHFN) irradiation (1.7x10(15) n/cm(2)). As many as fourteen deep levels have been detected by I-DLTS. Arrhenius plots of the I-DLTS data have shown defects with energy levels ranging from 0.03 eV to 0.5 eV in the energy band gap. Defect concentrations of relatively shallow levels (E(t) < 0.33 eV) are in the order of 10(13)cm(-3), while those for relatively deep levels (E(t) > 0.33 eV) are in the order of 10(14) cm(-3). TSC data have shown similar defect spectra. A full depletion voltage of about 27,000 volts has been estimated by C-V measurements for the as-irradiated detector, which corresponds to an effective space charge density (N-eff) in the order of 2x10(14) cm(-3). Both detector leakage current and full depletion voltage have been observed to increase with elevated temperature annealing (ETA). The increase of the full depletion voltage corresponds to the increase of some deep levels, especially the 0.39 eV level. Results of positron annihilation spectroscopy have shown a decrease of total concentration of vacancy related defects including vacancy clusters with ETA, suggesting the breaking up of vacancy clusters as possible source of vacancies for the formation of single defects during the reverse anneal.

VLSI architecture of a K-best detector for MIMO--OFDM wireless communication systems

The K-best detector is considered as a promising technique in the MIMO-OFDM detection because of its good performance and low complexity. In this paper, a new K-best VLSI architecture is presented. In the proposed architecture, the metric computation units (MCUs) expand each surviving path only to its partial branches, based on the novel expansion scheme, which can predetermine the branches' ascending order by their local distances. Then a distributed sorter sorts out the new K surviving paths from the expanded branches in pipelines. Compared to the conventional K-best scheme, the proposed architecture can approximately reduce fundamental operations by 50% and 75% for the 16-QAM and the 64-QAM cases, respectively, and, consequently, lower the demand on the hardware resource significantly. Simulation results prove that the proposed architecture can achieve a performance very similar to conventional K-best detectors. Hence, it is an efficient solution to the K-best detector's VLSI implementation for high-throughput MIMO-OFDM systems.