Dispersion characteristics of nanometer-scaled silicon rib waveguides

We investigate the dispersion properties of nanometer-scaled silicon waveguides with channel and rib cross section around the optical fiber communication wavelength and systematically study their relationship with the key structural parameters of the waveguide. The simulation results show that the introduction of an extra degree of freedom in the rib depth enables the rib waveguide more flexible in engineering the group velocity dispersion (GVD) compared with the channel waveguide. Besides, we get the structural parameters of the waveguides that can realize zero-GVD at 1550 nm.

Tunable optical properties of nano-Au on vanadium dioxide

The optical properties of Au nanoparticles deposited on thermochromic thin films of VO2 are investigated using spectroscopy. A localized modification on the transmittance spectrum of VO2 film is formed due to the presence of Au nanoparticles which exhibit localized surface plasmon resonance (LSPR) in the visible-near IR region. The position of the modification wavelength region shows a strong dependence on the Au mass thickness and shifts toward the red as it increases. On the other hand, it was found that the LSPR of Au nanoparticles can be thermally tunable because of the thermochromism of the supporting material of VO2. The LSPR wavelength, lambda(SPR), shifts to the blue with increasing temperature, and shifts back to the red as temperature decreases. A fine tuning is achieved when the temperature is increased in a stepwise manner.

Electron injection assisted phase transition in a nano-Au-VO2 junction

The semiconductor-metal transition of vanadium dioxide (VO2) thin films epitaxially grown on C-plane sapphire is studied by depositing Au nanoparticles onto the thermochromic films forming a metal-semiconductor contact, namely, a nano-Au-VO2 junction. It reveals that Au nanoparticles have a marked effect on the reduction in the phase transition temperature of VO2. A process of electron injection in which electrons flow from Au to VO2 due to the lower work function of the metal is believed to be the mechanism. The result may support the Mott-Hubbard phase transition model for VO2.

High-Saturation-Power and High-Speed Ge-on-SOI p-i-n Photodetectors

Ge-on-silicon-on-insulator p-i-n photodetectors were fabricated using an ultralow-temperature Ge buffer by ultrahigh-vacuum chemical vapor deposition. For a detector of 70-mu m diameter, the 1-dB small-signal compression power was about 110.5 mW. The 3-dB bandwidth at 3-V reverse bias was 13.4 GHz.

A transmission electron microscopy study of microstructural defects in proton implanted silicon

The microstructure of silicon on defect layer, a new type of silicon-on-insulator material using proton implantation and two-step annealing to obtain a high resistivity buried layer beneath the silicon surface, has been investigated by transmission electron microscopy. Implantation induced a heavily damaged region containing two types of extended defects involving hydrogen: {001} platelets and {111} platelets. During the first step annealing, gas bubbles and {111} precipitates formed. After the second step annealing, {111} precipitates disappeared, while the bubble microstructure still remained and a buried layer consisting of bubbles and dislocations between the bubbles was left. This study shows that the dislocations pinning the bubbles plays an important role in stabilizing the bubbles and in the formation of the defect insulating layer. (C) 1996 American Institute of Physics.

CHARACTERISTICS OF OXIDES FORMED FROM A SI0.5GE0.5

X-ray photoelectron spectroscopy (XPS) combined with Auger electron spectroscopy (AES) have been used to study the oxides from a Si0.5Ge0.5 alloy grown by molecular beam epitaxy (MBE). The oxidation was performed at 1000 degrees C wet atmosphere. The oxide consists of two layers: a mixed (Si,Ge)O-x layer near the surface and a pure SiOx layer underneath. Ge is rejected from the pure SiOx and piles up at the SiOx/SiGe interface. XPS analysis demonstrates that the chemical shifts of Si 2p and Ge 3d in the oxidized Si0.5Ge0.5 are significantly larger than those in SiO2 and GeO2 formed from pure Si and Ge crystals.

A STUDY OF THE COMPOSITION DISTRIBUTION AT THE TI/AL2O3 INTERFACE USING THE MCS(+)-SIMS TECHNIQUE

In this article, the MCs(+)-SIMS technique has been used to characterize Ti/Al2O3 metal/insulator interfaces. Our experiment shows that by detecting MCs(+) secondary ions, the matrix and interface effects are reduced, and good depth profiles have been obtained. The experimental result also shows that with the increase of the annealing temperature (RT, 300 degrees C, 600 degrees C, 850 degrees C), the interface gets broadened gradually, indicating diffusion and reaction take place at the interface, and the interface reaction is enhanced with the increase in annealing temperature. When the temperature increases, the AlCs+ signal forms two plateaus in the Ti layer, indicating Al from the decomposition of Al2O3 diffuses into the Ti layer and exists as two new forms (phases). Also, with the increase of the annealing temperature, oxygen diffuses into the Ti layer gradually, and makes the O signal in the Ti layer increase significantly in the 850 degrees C annealed sample.

4×4热光SOI波导开关阵列

设计并制作了阻塞型和完全无阻塞型4×4热光SOI(silicon-on-insulator)波导开关阵列.开关单元采用了多模干涉耦合器(MMI)-MZI(Mach-Zehnder intederometer)结构的2×2光开关.阻塞型光开关附加损耗为4.8～5.4 dB,串扰为-21.8 dB～-14.5 dB.完全无阻塞型光开关阵列附加损耗为6.6～9.6 dB,串扰为-25.8～-16.8 dB.两者的消光比都在17～25 dB内变化,开关单元功耗小于230 mW.器件的开关时间小于3μs.功耗和开关速度都明显优于SiO_2基和聚合物基的开关阵列.

亚微米尺度高速电光调制器的研究进展

基于SOI(silicon on insulator)材料的亚微米尺度电光调制器成为了研究Si光电子学的重点.评述了亚微米尺度下SOI脊型光波导实现单模条件、偏振无关、低耦合损耗的技术要求,分析并比较了几种基于不同光学结构和电学结构的电光调制器的原理和特性,讨论了达到高速电光调制的方式.

慢光在光子晶体弯折波导中的高透射传播

研究了慢光模式在SOI(silicon-on-insulator)材料光子晶体线缺陷弯折波导中的传输特性.通过优化波导弯折处的结构参数,慢光模式在光子晶体60°与120°弯折波导中的透射率提高10倍以上,归一化透射率分别达到80%和60%以上.为了进一步减慢光速,设计了新颖的高Q值耦合腔弯折波导结构,在归一化透射率达到75%的基础上,光波群速度低至c/170(c为真空光速).研究结果对于增强光子晶体的慢光效应,提高光子晶体慢光器件的微型化和集成化都有一定的积极意义.

A Novel 4T nMOS-Only SRAM Cell in 32nm Technology Node

This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator （SO1） technology node. It consists of two access transistors and two pull-down transistors. The pull-down transistors have larger channel length than the access transistors. Due to the significant short channel effect of small-size MOS transistors, the access transistors have much larger leakage current than the pull-down transistors,enabling the SRAM cell to maintain logic ＂1＂ while in standby. The storage node voltages of the cell are fed back to the back-gates of the access transistors,enabling the stable ＂read＂ operation of the cell. The use of back-gate feedback also helps to im- prove the static noise margin （SNM） of the cell. The proposed SRAM cell has smaller area than conventional bulk 6T SRAM cells and 4T SRAM cells. The speed and power dissipation of the SRAM cell are simulated and discussed. The SRAM cell can operate with a 0. 5V supply voltage.

Fabrication of Silicon Crystal-Facet-Dependent Nanostructures by Electron-Beam Lithography

Silicon crystal-facet-dependent nanostructures have been successfully fabricated on a (100)-oriented silicon-on-insulator wafer using electron-beam lithography and the silicon anisotropic wet etching technique. This technique takes ad-vantage of the large difference in etching properties for different crystallographic planes in alkaline solution. The mini-mum size of the trapezoidal top for those Si nanostructures can be reduced to less than 10nm. Scanning electron microscopy(SEM) and atomic force microscopy (AFM) observations indicate that the etched nanostructures have controllable shapes and smooth surfaces.

A High-Performance Silicon Electro-Optic Phase Modulator with a Triple MOS Capacitor

We propose and analyze a novel Si-based electro-optic modulator with an improved metal-oxide-semiconductor (MOS) capacitor configuration integrated into silicon-on-insulator (SOI).Three gate-oxide layers embedded in the silicon waveguide constitute a triple MOS capacitor structure,which boosts the modulation efficiency compared with a single MOS capacitor.The simulation results demonstrate that the VπLπ product is 2.4V·cm.The rise time and fall time of the proposed device are calculated to be 80 and 40ps from the transient response curve,respectively,indicating a bandwidth of 8GHz.The phase shift efficiency and bandwidth can be enhanced by rib width scaling.

SOI光波导高速电光调制器的研究进展

介绍了不同截面大小的SOI(silicon-on-insulator)波导单模条件,详细描述了几种降低传输损耗,消除偏振相关,提高耦合效率的技术手段.分析比较了一种带有MOS(metal-oxide-semiconductor)电容结构和一种具有微环结构的高速电光调制器,其调制频率分别达到10和1.5GHz.