921 resultados para power supply design
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We describe the design and implementation of a high voltage pulse power supply (pulser) that supports the operation of a repetitively pulsed filtered vacuum arc plasma deposition facility in plasma immersion ion implantation and deposition (Mepiiid) mode. Negative pulses (micropulses) of up to 20 kV in magnitude and 20 A peak current are provided in gated pulse packets (macropulses) over a broad range of possible pulse width and duty cycle. Application of the system consisting of filtered vacuum arc and high voltage pulser is demonstrated by forming diamond-like carbon (DLC) thin films with and without substrate bias provided by the pulser. Significantly enhanced film/substrate adhesion is observed when the pulser is used to induce interface mixing between the DLC film and the underlying Si substrate. (C) 2010 American Institute of Physics. [doi:10.1063/1.3518969]
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An energy harvesting system requires an energy storing device to store the energy retrieved from the surrounding environment. This can either be a rechargeable battery or a supercapcitor. Due to the limited lifetime of rechargeable batteries, they need to be periodically replaced. Therefore, a supercapacitor, which has ideally a limitless number of charge/discharge cycles can be used to store the energy; however, a voltage regulator is required to obtain a constant output voltage as the supercapacitor discharges. This can be implemented by a Switched-Capacitor DC-DC converter which allows a complete integration in CMOS technology, although it requires several topologies in order to obtain a high efficiency. This thesis presents the complete analysis of four different topologies in order to determine expressions that allow to design and determine the optimum input voltage ranges for each topology. To better understand the parasitic effects, the implementation of the capacitors and the non-ideal effect of the switches, in 130 nm technology, were carefully studied. With these two analysis a multi-ratio SC DC-DC converter was designed with an output power of 2 mW, maximum efficiency of 77%, and a maximum output ripple, in the steady state, of 23 mV; for an input voltage swing of 2.3 V to 0.85 V. This proposed converter has four operation states that perform the conversion ratios of 1/2, 2/3, 1/1 and 3/2 and its clock frequency is automatically adjusted to produce a stable output voltage of 1 V. These features are implemented through two distinct controller circuits that use asynchronous time machines (ASM) to dynamically adjust the clock frequency and to select the active state of the converter. All the theoretical expressions as well as the behaviour of the whole system was verified using electrical simulations.
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Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing two effects: a degradation of performances mainly impacting gate delays anda noisy contamination of the quiescent levels of the logic that drives the node. Both effects are presented together, in thispaper, showing than both are a cause of errors in modern and future digital circuits. The paper groups both error mechanismsand shows how the global error rate is related with the voltage deviation and the period of the clock of the digital system.
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This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits.The analysis here considered gives the timing violation error probability as a new design quality factor in front of conventional techniques that assume the full perfection of the circuit. The evaluation of the error bound can be useful for new design paradigms where retry and self-recoveringtechniques are being applied to the design of high performance processors. The method here described allows to evaluate the performance of these techniques by means of calculating the expected error probability in terms of power supply distribution quality.
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The supply voltage decrease and powerconsumption increase of modern ICs made the requirements for low voltage fluctuation caused by packaging and on-chip parasitic impedances more difficult to achieve. Most of the research works on the area assume that all the nodes of the chip are fed at thesame voltage, in such a way that the main cause of disturbance or fluctuation is the parasitic impedance of packaging. In the paper an approach to analyze the effect of high and fast current demands on the on-chip power supply network. First an approach to model the entire network by considering a homogeneous conductive foil is presented. The modification of the timing parameters of flipflops caused by spatial voltage drops through the IC surface are also investigated.
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The authors present an offline switching power supply with multiple isolated outputs and unity power factor with the use of only one power processing stage, based on the DC-DC SEPIC (single ended primary inductance converter) modulated by variable hysteresis current control. The principle of operation, the theoretical analysis, the design procedure, an example, and simulation results are presented. A laboratory prototype, rated at 160 W, operating at a maximum switching frequency of 100 kHz, with isolated outputs rated at +5 V/15 A -5 V/1 A, +12 V/6 A and -12 V/1 A, has been built given an input power factor near unity.
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In this paper, a mathematical model is derived via Lagrange's Equation for a shear building structure that acts as a foundation of a non-ideal direct current electric motor, controlled by a mass loose inside a circular carving. Non-ideal sources of vibrations of structures are those whose characteristics are coupled to the motion of the structure, not being a function of time only as in the ideal case. Thus, in this case, an additional equation of motion is written, related to the motor rotation, coupled to the equation describing the horizontal motion of the shear building. This kind of problem can lead to the so-called Sommerfeld effect: steady state frequencies of the motor will usually increase as more power (voltage) is given to it in a step-by-step fashion. When a resonance condition with the structure is reached, the better part of this energy is consumed to generate large amplitude vibrations of the foundation without sensible change of the motor frequency as before. If additional increase steps in voltage are made, one may reach a situation where the rotor will jump to higher rotation regimes, no steady states being stable in between. As a device of passive control of both large amplitude vibrations and the Sommerfeld effect, a scheme is proposed using a point mass free to bounce back and forth inside a circular carving in the suspended mass of the structure. Numerical simulations of the model are also presented Copyright © 2007 by ASME.
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We discuss dynamics of a vibro-impact system consisting of a cart with an piecewise-linear restoring force, which vibrates under driving by a source with limited power supply. From the point of view of dynamical systems, vibro-impact systems exhibit a rich variety of phenomena, particularly chaotic motion. In our analyzes, we use bifurcation diagrams, basins of attractions, identifying several non-linear phenomena, such as chaotic regimes, crises, intermittent mechanisms, and coexistence of attractors with complex basins of attraction. © 2009 by ASME.
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SMART material systems offer great possibilities in terms of providing novel and economical solutions to engineering problems. The technological advantages of these materials over traditional ones are due to their unique microstructure and molecular properties. Smart materials such as shape memory alloys (SMA), has been used in such diverse areas of engineering science, nowadays. In this paper, we present a numerical investigation of the dynamics interaction of a nonideal structure (NIS). We analyze the phenomenon of the passage through resonance region in the steady state processes. We remarked that this kind of problem can lead to the so-called Sommerfeld effect: steady state frequencies of the DC motor will usually increase as more power (voltage) is given to it in a step-by-step fashion. When a resonance condition with the structure it is reached, the better part of this energy it is consumed to generate large amplitude vibrations of the foundation without sensible change of the motor frequency as before. The results obtained by using numerical simulations are discussed in details. Copyright © 2009 by ASME.
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The main objective of this work is the design and implementation of the digital control stage of a 280W AC/DC industrial power supply in a single low-cost microcontroller to replace the analog control stage. The switch-mode power supply (SMPS) consists of a PFC boost converter with fixed frequency operation and a variable frequency LLC series resonant DC/DC converter. Input voltage range is 85VRMS-550VRMS and the output voltage range is 24V-28V. A digital controller is especially suitable for this kind of SMPS to implement its multiple functionalities and to keep the efficiency and the performance high over the wide range of input voltages. Additional advantages of the digital control are reliability and size. The optimized design and implementation of the digital control stage it is presented. Experimental results show the stable operation of the controlled system and an estimation of the cost reduction achieved with the digital control stage.
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This paper presents an envelope amplifier solution for envelope elimination and restoration (EER), that consists of a series combination of a switch-mode power supply (SMPS), based on three-level voltage cells and a linear regulator. This cell topology offers several advantages over a previously presented envelope amplifier based on a different multilevel topology (two-level voltage cells). The topology of the multilevel converter affects to the whole design of the envelope amplifier and a comparison between both design alternatives regarding the size, complexity and the efficiency of the solution is done. Both envelope amplifier solutions have a bandwidth of 2 MHz with an instantaneous maximum power of 50 W. It is also analyzed the linearity of the three-level cell solution, with critical importance in the EER technique implementation. Additionally, considerations to optimize the design of the envelope amplifier and experimental comparison between both cell topologies are included.
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In this paper, implementation and testing of non- commercial GaN HEMT in a simple buck converter for envelope amplifier in ET and EER transmission techn iques has been done. Comparing to the prototypes with commercially available EPC1014 and 1015 GaN HEMTs, experimentally demonstrated power supply provided better thermal management and increased the switching frequency up to 25MHz. 64QAM signal with 1MHz of large signal bandw idth and 10.5dB of Peak to Average Power Ratio was gener ated, using the switching frequency of 20MHz. The obtaine defficiency was 38% including the driving circuit an d the total losses breakdown showed that switching power losses in the HEMT are the dominant ones. In addition to this, some basic physical modeling has been done, in order to provide an insight on the correlation between the electrical characteristics of the GaN HEMT and physical design parameters. This is the first step in the optimization of the HEMT design for this particular application.
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Power supply unpredictable uctuations jeopardize the functioning of several types of current electronic systems. This work presents a power supply sensor based on a voltage divider followed by buffer-comparator cells employing just MOSFET transistors and provides a digital output. The divider outputs are designed to change more slowly than the thresholds of the comparators, in this way the sensor is able to detect voltage droops. The sensor is implemented in a 65nm technology node occupying an area of 2700?m2 and displaying a power consumption of 50?W. It is designed to work with no voltage reference and with no clock and aiming to obtain a fast response.
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Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Energia
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Fast Field Cycling (FFC) Nuclear Magnetic Resonance (NMR) relaxometers require controlled current sources in order to get accurate flux density with respect to its magnet. The main elements of the proposed solution are a power semiconductor, a DC voltage source and the magnet. The power semiconductor is commanded in order to get a linear control of the flux density. To implement the flux density control, a Hall Effect sensor is used. Furthermore, the dynamic behavior of the current source is analyzed and compared when using a PI controller and a PD2I controller.