Nanoscale plasmonic memristor with optical readout functionality.

We experimentally demonstrate for the first time a nanoscale resistive random access memory (RRAM) electronic device integrated with a plasmonic waveguide providing the functionality of optical readout. The device fabrication is based on silicon on insulator CMOS compatible approach of local oxidation of silicon, which enables the realization of RRAM and low optical loss channel photonic waveguide at the same fabrication step. This plasmonic device operates at telecom wavelength of 1.55 μm and can be used to optically read the logic state of a memory by measuring two distinct levels of optical transmission. The experimental characterization of the device shows optical bistable behavior between these levels of transmission in addition to well-defined hysteresis. We attribute the changes in the optical transmission to the creation of a nanoscale absorbing and scattering metallic filament in the amorphous silicon layer, where the plasmonic mode resides.

Fractional generalization of memristor and higher order elements

Fractional calculus generalizes integer order derivatives and integrals. Memristor systems generalize the notion of electrical elements. Both concepts were shown to model important classes of phenomena. This paper goes a step further by embedding both tools in a generalization considering complex-order objects. Two complex operators leading to real-valued results are proposed. The proposed class of models generate a broad universe of elements. Several combinations of values are tested and the corresponding dynamical behavior is analyzed.

HOPF BIFURCATION FROM LINES of EQUILIBRIA WITHOUT PARAMETERS IN MEMRISTOR OSCILLATORS

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Estudo de sistemas lineares por parte com três zonas e aplicação na análise de um circuito elétrico envolvendo um memristor

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Bifurcations Leading to Nonlinear Oscillations in a 3D Piecewise Linear Memristor Oscillator

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Estabilidade de sistemas dinâmicos: Estudo do memristor

Pós-graduação em Matematica Aplicada e Computacional - FCT

Il memristor, un'innovazione nel campo dell'intelligenza artificiale: Analisi dello stato dell'arte e prospettive future

Questo elaborato concerne la revisione della letteratura scientifica relativa alla teorizzazione e realizzazione tecnologica del memristor, un nuovo componente elettronico teorizzato nel 1971 e realizzato solo nel 2008 nei laboratori della HP (Hewlett Packard, Palo Alto, California). Dopo una descrizione in termini matematici della teoria fisica alla base del dispositivo e del suo funzionamento, viene descritta la sua realizzazione tecnologica e il corrispettivo modello teorico. Succesivamente il lavoro discute la possibile analogia tra il funzionamento del memristor ed il funzionamento di neuroni e sinapsi biologiche all'interno del Sistema Nervoso Centrale. Infine, vengono descritte le architetture recentemente proposte per l'implementazione di reti neurali artificiali fondate su un sistema computazionale parallelo e realizzate mediante sistemi ibridi transistors/memristors.

A CAD framework for the characterization and use of Memristor models

In the recent years the missing fourth component, the memristor, was successfully synthesized. However, the mathematical complexity and variety of the models behind this component, in addition to the existence of convergence problems in the simulations, make the design of memristor-based applications long and difficult. In this work we present a memristor model characterization framework which supports the automated generation of subcircuit files. The proposed environment allows the designer to choose and parameterize the memristor model that best suits for a given application. The framework carries out characterizing simulations in order to study the possible non-convergence problems, solving the dependence on the simulation conditions and guaranteeing the functionality and performance of the design. Additionally, the occurrence of undesirable effects related to PVT variations is also taken into account. By performing a Monte Carlo or a corner analysis, the designer is aware of the safety margins which assure the correct device operation.

Building memristor applications: from device model to circuit design

Since the memristor was first built in 2008 at HP Labs, no end of devices and models have been presented. Also, new applications appear frequently. However, the integration of the device at the circuit level is not straightforward, because available models are still immature and/or suppose high computational loads, making their simulation long and cumbersome. This study assists circuit/systems designers in the integration of memristors in their applications, while aiding model developers in the validation of their proposals. We introduce the use of a memristor application framework to support the work of both the model developer and the circuit designer. First, the framework includes a library with the best-known memristor models, being easily extensible with upcoming models. Systematic modifications have been applied to these models to provide better convergence and significant simulations speedups. Second, a quick device simulator allows the study of the response of the models under different scenarios, helping the designer with the stimuli and operation time selection. Third, fine tuning of the device including parameters variations and threshold determination is also supported. Finally, SPICE/Spectre subcircuit generation is provided to ease the integration of the devices in application circuits. The framework provides the designer with total control overconvergence, computational load, and the evolution of system variables, overcoming usual problems in the integration of memristive devices.

Comment: Is memristor a dynamic element?

The authors present a charge/flux formulation of the equations of memristive circuits, which seemingly show that the memristor should not be considered as a dynamic circuit element. Here, is shown that this approach implicitly reduces the dynamic analysis to a certain subset of the state space in such a way that the dynamic contribution of memristors is hidden. This reduction might entail a substantial loss of information, regarding e.g. the local stability properties of the circuit. Two examples illustrate this. It is concluded that the memristor, even with its unconventional features, must be considered as a dynamic element.

Catalyst-free plasma enhanced growth of graphene from sustainable sources

Details of a fast and sustainable bottom-up process to grow large area high quality graphene films without the aid of any catalyst are reported in this paper. We used Melaleuca alternifolia, a volatile natural extract from tea tree plant as the precursor. The as-fabricated graphene films yielded a stable contact angle of 135°, indicating their potential application in very high hydrophobic coatings. The electronic devices formed by sandwiching pentacene between graphene and aluminum films demonstrated memristive behavior, and hence, these graphene films could find use in nonvolatile memory devices also.

Electrical characterization of metal-oxide-polymer devices for non-volatile memory applications

The objective of this thesis is to study the properties of resistive switching effect based on bistable resistive memory which is fabricated in the form of Al2O3/polymer diodes and to contribute to the elucidation of resistive switching mechanisms. Resistive memories were characterized using a variety of electrical techniques, including current-voltage measurements, small-signal impedance, and electrical noise based techniques. All the measurements were carried out over a large temperature range. Fast voltage ramps were used to elucidate the dynamic response of the memory to rapid varying electric fields. The temperature dependence of the current provided insight into the role of trapped charges in resistive switching. The analysis of fast current fluctuations using electric noise techniques contributed to the elucidation of the kinetics involved in filament formation/rupture, the filament size and correspondent current capabilities. The results reported in this thesis provide insight into a number of issues namely: (i) The fundamental limitations on the speed of operation of a bi-layer resistive memory are the time and voltage dependences of the switch-on mechanism. (ii) The results explain the wide spread in switching times reported in the literature and the apparently anomalous behaviour of the high conductance state namely the disappearance of the negative differential resistance region at high voltage scan rates which is commonly attributed to a “dead time” phenomenon which had remained elusive since it was first reported in the ‘60s. (iii) Assuming that the current is filamentary, Comsol simulations were performed and used to explain the observed dynamic properties of the current-voltage characteristics. Furthermore, the simulations suggest that filaments can interact with each other. (iv) The current-voltage characteristics have been studied as a function of temperature. The findings indicate that creation and annihilation of filaments is controlled by filling and neutralizing traps localized at the oxide/polymer interface. (v) Resistive switching was also studied in small-molecule OLEDs. It was shown that the degradation that leads to a loss of light output during operation is caused by the presence of a resistive switching layer. A diagnostic tool that predicts premature failure of OLEDs was devised and proposed. Resistive switching is a property of oxides. These layers can grow in a number of devices including, organic light emitting diodes (OLEDs), spin-valve transistors and photovoltaic devices fabricated in different types of material. Under strong electric fields the oxides can undergo dielectric breakdown and become resistive switching layers. Resistive switching strongly modifies the charge injection causing a number of deleterious effects and eventually device failure. In this respect the findings in this thesis are relevant to understand reliability issues in devices across a very broad field.

Nano-fabrication of complex functional structures using non- conventional lithography

In Chapter 1 I will present a brief introduction on the state of art of nanotechnologies, nanofabrication techniques and unconventional lithography as a technique to fabricate the novel electronic device as resistive switch so-called memristor is shown. In Chapter 2 a detailed description of the main fabrication and characterization techniques employed in this work is reported. Chapter 3 parallel local oxidation lithography (pLOx) describes as a main technique to obtain accurate patterning process. All the effective parameters has been studied and the optimized condition observed to highly reproducible with excellent patterned nanostructures. The effect of negative bias, calls local reduction (LR) studied. Moreover, the use of AC bias shows faster patterning process respect to DC bias. In Chapter 4 (metal/ e-SiO2/ Si nanojunction) it is shown how the electrochemical oxide nanostructures by using pLOx can be used in the fabrication of novel devices call memristor. We demonstrate a new concept, based on conventional materials, where the lifetime problem is resolved by introducing a “regeneration” step, which restores the nano-memristor to its pristine condition by applying an appropriate voltage cycle. In Chapter 5 (Graphene/ e-SiO2/ Si), Graphene as a building block material is used as an electrode to selectively oxidize the silicon substrate by pLOx set up for the fabrication of novel resistive switch device. In Chapter 6 (surface architecture) I will show another application of pLOx in biotechnology is shown. So the surface functionalization combine with nano-patterning by pLOx used to design a new surface to accurately bind biomolecules with the possibility of studying those properties and more application in nano-bio device fabrication. So, in order to obtain biochips, electronic and optical/photonics devices Nano patterning of DNA used as scaffolds to fabricate small functional nano-components.

Charge and spin transport in memristive La0.7Sr0.3Mno3/SrTiO3/Co devices

Il lavoro svolto si concentra sul trasporto di carica e spin in dispositivi trilayer La0.7Sr0.3MnO3/SrTiO3/Co multifunzionali. Questi dispositivi mostrano sia magnetoresistenza che resistive switching, con un'interessante interazione fra i due effetti. Le giunzioni SrTiO3 sono state scelte per questo lavoro sia per via dei precedenti studi su SrTiO3 come barriera in dispositivi spintronici (cioè dispositivi con magnetoresistenza), sia perché sono promettenti come materiale base per costruire memristor (cioè dispositivi con resistive switching). Il lavoro di tesi è stato svolto all'Istituto per lo studio dei materiali nanostrutturati (ISMN-CNR) a Bologna. Nella prima parte di questa tesi illustrerò la fisica dietro al resistive switching e alla magnetoresistenza di dispositivi trilayer, mostrando anche risultati di studi su dispositivi simili a quelli da me studiati. Nella seconda parte mostrerò la complessa fisica degli ossidi utilizzati nei nostri dispositivi e i possibili meccanismi di trasporto attraverso essi. Nell'ultima parte descriverò i risultati ottenuti. I dispositivi La0.7Sr0.3MnO3/SrTiO3/Co sono stati studiati tramite caratterizzazione elettrica, di magnetotrasporto e con spettroscopia di impedenza. Le misure ottenute hanno mostrato una fisica molto ricca dietro al trasporto di spin e carica in questi dispositivi, e la mutua interazione fra fenomeni spintronici e di resistive switching rappresenta una chiave per comprendere la fisica di questi fenomeni. Analisi dati della dipendenza della resistenza della temperature e caratteristiche corrente-tensioni saranno usati per quantificare e descrivere il trasporto in questi dispositivi.