Three-terminal heterojunction bipolar transistor solar cell for high-efficiency photovoltaic conversion

Here we propose, for the first time, a solar cell characterized by a semiconductor transistor structure (n/p/n or p/n/p) where the base-emitter junction is made of a high-bandgap semiconductor and the collector is made of a low-bandgap semiconductor. We calculate its detailed-balance efficiency limit and prove that it is the same one than that of a double-junction solar cell. The practical importance of this result relies on the simplicity of the structure that reduces the number of layers that are required to match the limiting efficiency of dual-junction solar cells without using tunnel junctions. The device naturally emerges as a three-terminal solar cell and can also be used as building block of multijunction solar cells with an increased number of junctions.

First principles study of metal contacts to monolayer black phosphorous

Atomically thin layered black phosphorous (BP) has recently appeared as an alternative to the transitional metal dichalcogenides for future channel material in a metal-oxide-semiconductor transistor due to its lower carrier effective mass. Investigation of the electronic property of source/drain contact involving metal and two-dimensional material is essential as it impacts the transistor performance. In this paper, we perform a systematic and rigorous study to evaluate the Ohmic nature of the side-contact formed by the monolayer BP (mBP) and metals (gold, titanium, and palladium), which are commonly used in experiments. Employing the Density Functional Theory, we analyse the potential barrier, charge transfer and atomic orbital overlap at the metal-mBP interface in an optimized structure to understand how efficiently carriers could be injected from metal contact to the mBP channel. Our analysis shows that gold forms a Schottky contact with a higher tunnel barrier at the interface in comparison to the titanium and palladium. mBP contact with palladium is found to be purely Ohmic, where as titanium contact demonstrates an intermediate behaviour. (C) 2014 AIP Publishing LLC.

A novel vision chip for high-speed target tracking

This paper presents a novel vision chip for high-speed target tracking. Two concise algorithms for high-speed target tracking are developed. The algorithms include some basic operations that can be used to process the real-time image information during target tracking. The vision chip is implemented that is based on the algorithms and a row-parallel architecture. A prototype chip has 64 x 64 pixels is fabricated by 0.35 pm complementary metal-oxide-semiconductor transistor (CMOS) process with 4.5 x 2.5 mm(2) area. It operates at a rate of 1000 frames per second with 10 MHz chip main clock. The experiment results demonstrate that a high-speed target can be tracked in complex static background and a high-speed target among other high-speed objects can be tracked in clean background.

Large current gain and low operational voltage permeable metal-base organic transistors based on Au/Al double layer metal base

In order to realize the common-emitter characteristics of the tris(8-hydroxyquinoline) aluminium (Alq(3))-based organic transistors, we used Au/Al double metal layer as the base, thus the vertical metal-base transistors with structure of Al/n-Si/Au/Al/Alq(3)/LiF/Al were constructed. It was found that the contact properties between the base and the organic semiconductors play an important role in the device performance. The utilization of Au/Al double layer metal base allows the devices to operate at high gain in the common-emitter and common-base mode at low operational voltage.

Modeling multiple state electrostatically formed nanowire transistors

The present thesis work proposes a new physical equivalent circuit model for a recently proposed semiconductor transistor, a 2-drain MSET (Multiple State Electrostatically Formed Nanowire Transistor). It presents a new software-based experimental setup that has been developed for carrying out numerical simulations on the device and on equivalent circuits. As of 2015, we have already approached the scaling limits of the ubiquitous CMOS technology that has been in the forefront of mainstream technological advancement, so many researchers are exploring different ideas in the realm of electrical devices for logical applications, among them MSET transistors. The idea that underlies MSETs is that a single multiple-terminal device could replace many traditional transistors. In particular a 2-drain MSET is akin to a silicon multiplexer, consisting in a Junction FET with independent gates, but with a split drain, so that a voltage-controlled conductive path can connect either of the drains to the source. The first chapter of this work presents the theory of classical JFETs and its common equivalent circuit models. The physical model and its derivation are presented, the current state of equivalent circuits for the JFET is discussed. A physical model of a JFET with two independent gates has been developed, deriving it from previous results, and is presented at the end of the chapter. A review of the characteristics of MSET device is shown in chapter 2. In this chapter, the proposed physical model and its formulation are presented. A listing for the SPICE model was attached as an appendix at the end of this document. Chapter 3 concerns the results of the numerical simulations on the device. At first the research for a suitable geometry is discussed and then comparisons between results from finite-elements simulations and equivalent circuit runs are made. Where points of challenging divergence were found between the two numerical results, the relevant physical processes are discussed. In the fourth chapter the experimental setup is discussed. The GUI-based environments that allow to explore the four-dimensional solution space and to analyze the physical variables inside the device are described. It is shown how this software project has been structured to overcome technical challenges in structuring multiple simulations in sequence, and to provide for a flexible platform for future research in the field.

Resonance Energy Transfer-Based Molecular Switch Designed Using a Systematic Design Process Based on Monte Carlo Methods and Markov Chains

A RET network consists of a network of photo-active molecules called chromophores that can participate in inter-molecular energy transfer called resonance energy transfer (RET). RET networks are used in a variety of applications including cryptographic devices, storage systems, light harvesting complexes, biological sensors, and molecular rulers. In this dissertation, we focus on creating a RET device called closed-diffusive exciton valve (C-DEV) in which the input to output transfer function is controlled by an external energy source, similar to a semiconductor transistor like the MOSFET. Due to their biocompatibility, molecular devices like the C-DEVs can be used to introduce computing power in biological, organic, and aqueous environments such as living cells. Furthermore, the underlying physics in RET devices are stochastic in nature, making them suitable for stochastic computing in which true random distribution generation is critical.

In order to determine a valid configuration of chromophores for the C-DEV, we developed a systematic process based on user-guided design space pruning techniques and built-in simulation tools. We show that our C-DEV is 15x better than C-DEVs designed using ad hoc methods that rely on limited data from prior experiments. We also show ways in which the C-DEV can be improved further and how different varieties of C-DEVs can be combined to form more complex logic circuits. Moreover, the systematic design process can be used to search for valid chromophore network configurations for a variety of RET applications.

We also describe a feasibility study for a technique used to control the orientation of chromophores attached to DNA. Being able to control the orientation can expand the design space for RET networks because it provides another parameter to tune their collective behavior. While results showed limited control over orientation, the analysis required the development of a mathematical model that can be used to determine the distribution of dipoles in a given sample of chromophore constructs. The model can be used to evaluate the feasibility of other potential orientation control techniques.

High mobility organic thin film transistor and efficient photovoltaic devices using versatile donor-acceptor polymer semiconductor by molecular design

In this work, we report a novel donor-acceptor based solution processable low band gap polymer semiconductor, PDPP-TNT, synthesized via Suzuki coupling using condensed diketopyrrolopyrrole (DPP) as an acceptor moiety with a fused naphthalene donor building block in the polymer backbone. This polymer exhibits p-channel charge transport characteristics when used as the active semiconductor in organic thin-film transistor (OTFT) devices. The hole mobilities of 0.65 cm2 V-1 s-1 and 0.98 cm2 V -1 s-1 are achieved respectively in bottom gate and dual gate OTFT devices with on/off ratios in the range of 105 to 10 7. Additionally, due to its appropriate HOMO (5.29 eV) energy level and optimum optical band gap (1.50 eV), PDPP-TNT is a promising candidate for organic photovoltaic (OPV) applications. When this polymer semiconductor is used as a donor and PC71BM as an acceptor in OPV devices, high power conversion efficiencies (PCE) of 4.7% are obtained. Such high mobility values in OTFTs and high PCE in OPV make PDPP-TNT a very promising polymer semiconductor for a wide range of applications in organic electronics.

Impact of energy quantisation in single electron transistor island on hybrid complementary metal oxide semiconductor-single electron transistor integrated circuits

For the first time, the impact of energy quantisation in single electron transistor (SET) island on the performance of hybrid complementary metal oxide semiconductor (CMOS)-SET transistor circuits has been studied. It has been shown through simple analytical models that energy quantisation primarily increases the Coulomb Blockade area and Coulomb Blockade oscillation periodicity of the SET device and thus influences the performance of hybrid CMOS-SET circuits. A novel computer aided design (CAD) framework has been developed for hybrid CMOS-SET co-simulation, which uses Monte Carlo (MC) simulator for SET devices along with conventional SPICE for metal oxide semiconductor devices. Using this co-simulation framework, the effects of energy quantisation have been studied for some hybrid circuits, namely, SETMOS, multiband voltage filter and multiple valued logic circuits. Although energy quantisation immensely deteriorates the performance of the hybrid circuits, it has been shown that the performance degradation because of energy quantisation can be compensated by properly tuning the bias current of the current-biased SET devices within the hybrid CMOS-SET circuits. Although this study is primarily done by exhaustive MC simulation, effort has also been put to develop first-order compact model for SET that includes energy quantisation effects. Finally, it has been demonstrated that one can predict the SET behaviour under energy quantisation with reasonable accuracy by slightly modifying the existing SET compact models that are valid for metallic devices having continuous energy states.

Threshold voltage modeling under size quantization for ultra-thin silicon double-gate metal-oxide-semiconductor field-effect transistor

We report on the threshold voltage modeling of ultra-thin (1 nm-5 nm) silicon body double-gate (DG) MOSFETs using self-consistent Poisson-Schrodinger solver (SCHRED). We define the threshold voltage (V th) of symmetric DG MOSFETs as the gate voltage at which the center potential (Φ c) saturates to Φ c (s a t), and analyze the effects of oxide thickness (t ox) and substrate doping (N A) variations on V th. The validity of this definition is demonstrated by comparing the results with the charge transition (from weak to strong inversion) based model using SCHRED simulations. In addition, it is also shown that the proposed V t h definition, electrically corresponds to a condition where the inversion layer capacitance (C i n v) is equal to the oxide capacitance (C o x) across a wide-range of substrate doping densities. A capacitance based analytical model based on the criteria C i n v C o x is proposed to compute Φ c (s a t), while accounting for band-gap widening. This is validated through comparisons with the Poisson-Schrodinger solution. Further, we show that at the threshold voltage condition, the electron distribution (n(x)) along the depth (x) of the silicon film makes a transition from a strong single peak at the center of the silicon film to the onset of a symmetric double-peak away from the center of the silicon film. © 2012 American Institute of Physics.

Analysis of size quantization and temperature effects on the threshold voltage of thin silicon film double-gate metal-oxide-semiconductor field-effect transistor (MOSFET)

In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50K to 400 K) on the intrinsic carrier concentration (n(i)), electron concentration (n) and thereby on the threshold voltage (V-th) for thin silicon film (t(si) = 1 nm to 10 nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage (V-th) is defined as the gate voltage (V-g) at which the potential at the center of the channel (Phi(c)) begins to saturate (Phi(c) = Phi(c(sat))). It is shown that in the strong quantum confinement regime (t(si) <= 3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (Delta E-g(eff)), intrinsic carrier concentration (n(i)), electron concentration (n), Phi(c(sat)) and the threshold voltage (V-th). On the other hand, for t(si) >= 4 nm, it is shown that size quantization effects recede with increasing t(si), while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for V-th as a function of device temperature (T). (C) 2013 AIP Publishing LLC.

Negative differential resistance and effect of defects and deformations in MoS2 armchair nanoribbon metal-oxide-semiconductor field effect transistor

In this work, we present a study on the negative differential resistance (NDR) behavior and the impact of various deformations (like ripple, twist, wrap) and defects like vacancies and edge roughness on the electronic properties of short-channel MoS2 armchair nanoribbon MOSFETs. The effect of deformation (3 degrees-7 degrees twist or wrap and 0.3-0.7 angstrom ripple amplitude) and defects on a 10 nm MoS2 ANR FET is evaluated by the density functional tight binding theory and the non-equilibrium Green's function approach. We study the channel density of states, transmission spectra, and the I-D-V-D characteristics of such devices under the varying conditions, with focus on the NDR behavior. Our results show significant change in the NDR peak to valley ratio and the NDR window with such minor intrinsic deformations, especially with the ripple. (C) 2013 AIP Publishing LLC.

Performance analysis of boron nitride embedded armchair graphene nanoribbon metal-oxide-semiconductor field effect transistor with Stone Wales defects

We study the performance of a hybrid Graphene-Boron Nitride armchair nanoribbon (a-GNR-BN) n-MOSFET at its ballistic transport limit. We consider three geometric configurations 3p, 3p + 1, and 3p + 2 of a-GNR-BN with BN atoms embedded on either side (2, 4, and 6 BN) on the GNR. Material properties like band gap, effective mass, and density of states of these H-passivated structures are evaluated using the Density Functional Theory. Using these material parameters, self-consistent Poisson-Schrodinger simulations are carried out under the Non Equilibrium Green's Function formalism to calculate the ballistic n-MOSFET device characteristics. For a hybrid nanoribbon of width similar to 5 nm, the simulated ON current is found to be in the range of 265 mu A-280 mu A with an ON/OFF ratio 7.1 x 10(6)-7.4 x 10(6) for a V-DD = 0.68 V corresponding to 10 nm technology node. We further study the impact of randomly distributed Stone Wales (SW) defects in these hybrid structures and only 2.5% degradation of ON current is observed for SW defect density of 3.18%. (C) 2014 AIP Publishing LLC.