Modeling multiple state electrostatically formed nanowire transistors


Autoria(s): Coen, Tom
Contribuinte(s)

Fraboni, Beatrice

Data(s)

23/10/2015

31/12/1969

Resumo

The present thesis work proposes a new physical equivalent circuit model for a recently proposed semiconductor transistor, a 2-drain MSET (Multiple State Electrostatically Formed Nanowire Transistor). It presents a new software-based experimental setup that has been developed for carrying out numerical simulations on the device and on equivalent circuits. As of 2015, we have already approached the scaling limits of the ubiquitous CMOS technology that has been in the forefront of mainstream technological advancement, so many researchers are exploring different ideas in the realm of electrical devices for logical applications, among them MSET transistors. The idea that underlies MSETs is that a single multiple-terminal device could replace many traditional transistors. In particular a 2-drain MSET is akin to a silicon multiplexer, consisting in a Junction FET with independent gates, but with a split drain, so that a voltage-controlled conductive path can connect either of the drains to the source. The first chapter of this work presents the theory of classical JFETs and its common equivalent circuit models. The physical model and its derivation are presented, the current state of equivalent circuits for the JFET is discussed. A physical model of a JFET with two independent gates has been developed, deriving it from previous results, and is presented at the end of the chapter. A review of the characteristics of MSET device is shown in chapter 2. In this chapter, the proposed physical model and its formulation are presented. A listing for the SPICE model was attached as an appendix at the end of this document. Chapter 3 concerns the results of the numerical simulations on the device. At first the research for a suitable geometry is discussed and then comparisons between results from finite-elements simulations and equivalent circuit runs are made. Where points of challenging divergence were found between the two numerical results, the relevant physical processes are discussed. In the fourth chapter the experimental setup is discussed. The GUI-based environments that allow to explore the four-dimensional solution space and to analyze the physical variables inside the device are described. It is shown how this software project has been structured to overcome technical challenges in structuring multiple simulations in sequence, and to provide for a flexible platform for future research in the field.

Formato

application/pdf

Identificador

http://amslaurea.unibo.it/9365/1/coen_tom_tesi.pdf

Coen, Tom (2015) Modeling multiple state electrostatically formed nanowire transistors. [Laurea magistrale], Università di Bologna, Corso di Studio in Fisica [LM-DM270] <http://amslaurea.unibo.it/view/cds/CDS8025/>

Relação

http://amslaurea.unibo.it/9365/

Direitos

info:eu-repo/semantics/embargoedAccess

Palavras-Chave #transistor, jfet, mset #scuola :: 843899 :: Scienze #cds :: 8025 :: Fisica [LM-DM270] #indirizzo :: 789 :: Curriculum C: Fisica della materia #sessione :: seconda
Tipo

PeerReviewed