Comparative analysis of nanoscale MOS device architectures for RF applications

This paper provides valuable design insights for optimizing device parameters for nanoscale planar and vertical SOI MOSFETs. The suitability of nanoscale non-planar FinFETs and classical planar single and double gate SOI MOSFETs for rf applications is examined via extensive 3D device simulations and detailed interpretation. The origin of higher parasitic capacitance in FinFETs, compared to planar MOSFETs is examined. RF figures of merit for planar and vertical MOS devices are compared, based on layout-area calculations.

How crucial is back gate misalignment/oversize in double gate MOSFETs for ultra-low-voltage analog/rf applications?

In the present work, by investigating the influence of source/drain (S/D) extension region engineering (also known as gate-underlap architecture) in planar Double Gate (DG) SOI MOSFETs, we offer new design insights to achieve high tolerance to gate misalignment/oversize in nanoscale devices for ultra-low-voltage (ULV) analog/rf applications. Our results show that (i) misaligned gate-underlap devices perform significantly better than DC devices with abrupt source/drain junctions with identical misalignment, (ii) misaligned gate underlap performance (with S/D optimization) exceeds perfectly aligned DG devices with abrupt S/D regions and (iii) 25% back gate misalignment can be tolerated without any significant degradation in cut-off frequency (f(T)) and intrinsic voltage gain (A(VO)). Gate-underlap DG devices designed with spacer-to-straggle ratio lying within the range 2.5 to 3.0 show best tolerance to misaligned/oversize back gate and indeed are better than self-aligned DG MOSFETs with non-underlap (abrupt) S/D regions. Impact of gate length and silicon film thickness scaling is also discussed. These results are very significant as the tolerable limit of misaligned/oversized back gate is considerably extended and the stringent process control requirements to achieve self-alignment can be relaxed for nanoscale planar ULV DG MOSFETs operating in weak-inversion region. The present work provides new opportunities for realizing future ULV analog/rf design with nanoscale gate-underlap DG MOSFETs. (C) 2008 Elsevier Ltd. All rights reserved.

Graphene transistors for CMOS applications: opportunities and challenges

In the last decade, there has been a tremendous interest in Graphene transistors. The greatest advantage for CMOS nanoelectronics applications is the fact that Graphene is compatible with planar CMOS technology and potentially offers excellent short channel properties. Because of the zero bandgap, it will not be possible to turn off the MOSFET efficiently and hence the typical on current to off current ratio (Ion/Ioff) has been less than 10. Several techniques have been proposed to open the bandgap in Graphene. It has been demonstrated, both theoretically and experimentally, that Graphene Nanoribbons (GNR) show a bandgap which is inversely proportional to their width. GNRs with about 20 nm width have bandgaps in the range of 100meV. But it is very difficult to obtain GNRs with well defined edges. An alternate technique to open the band gap is to use bilayer Graphene (BLG), with an asymmetric bias applied in the direction perpendicular to their plane. Another important CMOS metric, the subthreshold slope is also limited by the inability to turn off the transistor. However, these devices could be attractive for RF CMOS applications. But even for analog and RF applications the non-saturating behavior of the drain current can be an issue. Although some studies have reported current saturation, the mechanisms are still not very clear. In this talk we present some of our recent findings, based on simulations and experiments, and propose possible solutions to obtain high on current to off current ratio. A detailed study on high field transport in grapheme transistors, relevant for analog and RF applications will also be presented.

CMOS-Compatible and Scalable Deposition of Nanocrystalline Zinc Ferrite Thin Film to Improve Inductance Density of Integrated RF Inductor

Development towards the combination of miniaturization and improved functionality of RFIC has been stalled due to the lack of high-performance integrated inductors. To meet this challenge, integration of magnetic material with high permeability as well as low conductivity is a must. Ferrite films are excellent candidates for RF devices due to their low cost, high resistivity, and low eddy current losses. Unlike its bulk counterpart, nanocrystalline zinc ferrite, because of partial inversion in the spinel structure, exhibits novel magnetic properties suitable for RF applications. However, most scalable ferrite film deposition processes require either high temperature or expensive equipment or both. We report a novel low temperature (< 200 degrees C) solution-based deposition process for obtaining high quality, polycrystalline zinc ferrite thin films (ZFTF) on Si (100) and on CMOS-foundry-fabricated spiral inductor structures, rapidly, using safe solvents and precursors. An enhancement of up to 20% at 5 GHz in the inductance of a fabricated device was achieved due to the deposited ZFTF. Substantial inductance enhancement requires sufficiently thick films and our reported process is capable of depositing smooth, uniform films as thick as similar to 20 mu m just by altering the solution composition. The method is capable of depositing film conformally on a surface with complex geometry. As it requires neither a vacuum system nor any post-deposition processing, the method reported here has a low thermal budget, making it compatible with modern CMOS process flow.

A simulation-based design method to transfer surface mount RF system to flip-chip die implementation

The flip-chip technology is a high chip density solution to meet the demand for very large scale integration design. For wireless sensor node or some similar RF applications, due to the growing requirements for the wearable and implantable implementations, flip-chip appears to be a leading technology to realize the integration and miniaturization. In this paper, flip-chip is considered as part of the whole system to affect the RF performance. A simulation based design is presented to transfer the surface mount PCB board to the flip-chip die package for the RF applications. Models are built by Q3D Extractor to extract the equivalent circuit based on the parasitic parameters of the interconnections, for both bare die and wire-bonding technologies. All the parameters and the PCB layout and stack-up are then modeled in the essential parts' design of the flip-chip RF circuit. By implementing simulation and optimization, a flip-chip package is re-designed by the parameters given by simulation sweep. Experimental results fit the simulation well for the comparison between pre-optimization and post-optimization of the bare die package's return loss performance. This design method could generally be used to transfer any surface mount PCB to flip-chip package for the RF systems or to predict the RF specifications of a RF system using the flip-chip technology.

Accurate substrate modelling of RF CMOS

The losses within the substrate of an RF IC can have significant effect on performance in a mixed signal application. in order to model substrate coupling accurately, it is represented by an RC network to account for both resistive and dielectric losses at high frequency (> 1 GHz). A small-signal equivalent circuit model of an RF IC inclusive of substrate parasitic effect is analysed in terms of its y-parameters and an extraction procedure for substrate parameters has been developed. By coupling the extracted substrate parameters along with extrinsic resistances associated with gate, source and drain, a standard BSIM3 model has been extended for RF applications. The new model exhibits a significant improvement in prediction of output reflection coefficient S-22 in the frequency range from 1 to 10 GHz in device mode of operation and for a low noise amplifier (LNA) at 2.4 GHz. Copyright (C) 2006 John Wiley & Sons, Ltd.

Design and experimental characterization of antennas and wireless systems for innovative wearable and implantable ultra low–power applications

The present PhD thesis exploits the design skills I have been improving since my master thesis’ research. A brief description of the chapters’ content follows. Chapter 1: the simulation of a complete front–end is a very complex problem and, in particular, is the basis upon which the prediction of the overall performance of the system is possible. By means of a commercial EM simulation tool and a rigorous nonlinear/EM circuit co–simulation based on the Reciprocity Theorem, the above–mentioned prediction can be achieved and exploited for wireless links characterization. This will represent the theoretical basics of the entire present thesis and will be supported by two RF applications. Chapter 2: an extensive dissertation about Magneto–Dielectric (MD) materials will be presented, together with their peculiar characteristics as substrates for antenna miniaturization purposes. A designed and tested device for RF on–body applications will be described in detail. Finally, future research will be discussed. Chapter 3: this chapter will deal with the issue regarding the exploitation of renewable energy sources for low–energy consumption devices. Hence the problem related to the so–called energy harvesting will be tackled and a first attempt to deploy THz solar energy in an innovative way will be presented and discussed. Future research will be proposed as well. Chapter 4: graphene is a very promising material for devices to be exploited in the RF and THz frequency range for a wide range of engineering applications, including those ones marked as the main research goal of the present thesis. This chapter will present the results obtained during my research period at the National Institute for Research and Development in Microtechnologies (IMT) in Bucharest, Romania. It will concern the design and manufacturing of antennas and diodes made in graphene–based technology for detection/rectification purposes.

Parasitic feedthrough cancellation techniques for enhanced electrical characterization of electrostatic microresonators

Capacitive parasitic feedthrough is an impediment that is inherent to all electrically interfaced micron scale resonant devices, resulting in increased challenges to their integration in more complex circuits, particularly as devices are scaled to operate at higher frequencies for RF applications. In this paper, a technique to cancel the undesirable effects of capacitive feedthrough that was previously proposed is here developed for an on-chip implementation. The method reported in this paper benefits from the simplicity of its implementation, and its effectiveness is demonstrated in this paper. This technique is demonstrated for two disk-plate resonators that have been excited in the wine glass mode at 5.4 MHz, though applicable to almost any electrically interfaced resonator. Measurements of the electrical transmission from these resonators show that the magnitude of the frequency response of the system is enhanced by up to 19 dB, while the phase is found to shift through a full 180° about the resonant frequency. This method is proposed as a useful addition to other techniques for enhancing the measured response of electrostatic micromechanical resonators. © 2009 Elsevier B.V. All rights reserved.

Improving f(MAX)/f(T) ratio in FinFETs using source/drain extension region engineering

A design methodology to optimise the ratio of maximum oscillation frequency to cutoff frequency, f(MAX)/f(T), in 60 nm FinFETs is presented. Results show that 25 to 60% improvement in f(MAX)/f(T) at drain currents of 20-300 mu A/mu m can be achieved in a non-overlap gate-source/drain architecture. The reported work provides new insights into the design and optimisation of nanoscale FinFETs for RF applications.

Radiofrequency ablation in children and adolescents: results in 154 consecutive patients

AIMS: The experience of using radiofrequency ablation (RFA) for the treatment of arrhythmias in children and adolescents is still limited. This study aimed to review the most recent results of RF ablation in children and adolescents in a highly experienced centre with access to both conventional techniques and non-fluoroscopic electroanatomic mapping (CARTO). METHODS AND RESULTS: A total of 154 consecutive patients younger than 19 years treated with RFA during the period 2000-04 were included. Numbers (%) or median (quartiles) are reported. Age was 15 (12-17) years, 70 (45%) were males. Five patients (3%) had congenital heart disease. RFA was successful in 147/154 patients (95%). Arrhythmia recurrence occurred in 11 patients (7%). Procedure time was 55 (35-90) min and fluoroscopy time was 8.8 (4-19) min. Number of RF applications was 4 (2-10) and number of RF applications >20 s was 2 (1-7). One patient (0.7%) had complicating high-grade atrioventricular block. CARTO was used in 18 RF ablation procedures (11%) performed in 15 patients. CONCLUSION: RF ablation can be undertaken in children and adolescents with a high success rate, few recurrences and complications, very short procedure times, and acceptable fluoroscopy times. Non-fluoroscopic electroanatomic mapping is helpful in selected patients.

Endocardial Ablation to Eliminate Epicardial Arrhythmia Substrate in Scar-Related Ventricular Tachycardia

OBJECTIVES We evaluated the feasibility and safety of epicardial substrate elimination using endocardial radiofrequency (RF) delivery in patients with scar-related ventricular tachycardia (VT). BACKGROUND Epicardial RF delivery is limited by fat or associated with bleeding, extra-cardiac damages, coronary vessels and phrenic nerve injury. Alternative ablation approaches may be desirable. METHODS Forty-six patients (18 ischemic cardiomyopathy [ICM], 13 non-ischemic dilated cardiomyopathy [NICM], 15 arrhythmogenic right ventricular cardiomyopathy [ARVC]) with sustained VT underwent combined endo- and epicardial mapping. All patients received endocardial ablation targeting local abnormal ventricular activities in the endocardium (Endo-LAVA) and epicardium (Epi-LAVA), followed by epicardial ablation if needed. RESULTS From a total of 173 endocardial ablations targeting Epi-LAVA at the facing site, 48 (28%) applications (ICM: 20/71 [28%], NICM: 3/39 [8%], ARVC: 25/63 [40%]) successfully eliminated the Epi-LAVA. Presence of Endo-LAVA, most delayed and low bipolar amplitude of Epi-LAVA, low unipolar amplitude in the facing endocardium, and Epi-LAVA within a wall thinning area at CT scan were associated with successful ablation. Endocardial ablation could abolish all Epi-LAVA in 4 ICM and 2 ARVC patients, whereas all patients with NICM required epicardial ablation. Endocardial ablation was able to eliminate Epi-LAVA at least partially in 15 (83%) ICM, 2 (13%) NICM, and 11 (73%) ARVC patients, contributing to a potential reduction in epicardial RF applications. Pericardial bleeding occurred in 4 patients with epicardial ablation. CONCLUSIONS Elimination of Epi-LAVA using endocardial RF delivery is feasible and may be used first to reduce the risk of epicardial ablation.

Irrigated-tip catheter ablation of intraatrial reentrant tachycardia in patients late after surgery of congenital heart disease.

OBJECTIVES The aim of this study was to evaluate irrigated-tip catheter for ablation of intraatrial reentrant tachycardias late after surgical repair of congenital heart disease. BACKGROUND In congenital heart disease patients, the right atrium can be markedly enlarged with areas of low blood flow. Radiofrequency (RF) lesion creation may be hampered by insufficient electrode cooling at sites with low blood flow. METHODS Thirty-six consecutive patients with intraatrial reentrant tachycardia refractory to antiarrhythmic therapy from two centers were included in the study. Entrainment pacing and electroanatomic mapping (CARTO) were used to delineate reentrant circuits and critical isthmus sites. RF ablation was performed using an irrigated-tip catheter (Navistar Thermocool). RESULTS Fifty-two intraatrial reentrant tachycardia circuits were identified, and 48 were targeted with RF ablation. RF ablation was performed using a mean of 13 +/- 11 irrigated RF applications per tachycardia isthmus with a mean power of 36 +/- 8 W. In a historical control group of congenital heart disease patients managed with conventional catheter ablation, the number of lesions per isthmus was higher (23 +/- 11) and mean power was lower (27 +/- 14 W). Acute success was achieved in 45 intraatrial reentrant tachycardias (94% of targeted tachycardias and 87% of all tachycardias). After a mean follow-up of 17 +/- 7 months, 33 (92%) of 36 patients were free of recurrence. Five patients (14%) developed paroxysmal atrial fibrillation. CONCLUSIONS The combination of modern techniques including electroanatomic mapping and catheter irrigation allows safe and highly effective ablation of intraatrial reentrant tachycardia in patients with surgically repaired congenital heart disease.