How crucial is back gate misalignment/oversize in double gate MOSFETs for ultra-low-voltage analog/rf applications?
Data(s) |
01/12/2008
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Resumo |
In the present work, by investigating the influence of source/drain (S/D) extension region engineering (also known as gate-underlap architecture) in planar Double Gate (DG) SOI MOSFETs, we offer new design insights to achieve high tolerance to gate misalignment/oversize in nanoscale devices for ultra-low-voltage (ULV) analog/rf applications. Our results show that (i) misaligned gate-underlap devices perform significantly better than DC devices with abrupt source/drain junctions with identical misalignment, (ii) misaligned gate underlap performance (with S/D optimization) exceeds perfectly aligned DG devices with abrupt S/D regions and (iii) 25% back gate misalignment can be tolerated without any significant degradation in cut-off frequency (f(T)) and intrinsic voltage gain (A(VO)). Gate-underlap DG devices designed with spacer-to-straggle ratio lying within the range 2.5 to 3.0 show best tolerance to misaligned/oversize back gate and indeed are better than self-aligned DG MOSFETs with non-underlap (abrupt) S/D regions. Impact of gate length and silicon film thickness scaling is also discussed. These results are very significant as the tolerable limit of misaligned/oversized back gate is considerably extended and the stringent process control requirements to achieve self-alignment can be relaxed for nanoscale planar ULV DG MOSFETs operating in weak-inversion region. The present work provides new opportunities for realizing future ULV analog/rf design with nanoscale gate-underlap DG MOSFETs. (C) 2008 Elsevier Ltd. All rights reserved. |
Identificador | |
Idioma(s) |
eng |
Direitos |
info:eu-repo/semantics/restrictedAccess |
Fonte |
Kranti , A & Armstrong , A 2008 , ' How crucial is back gate misalignment/oversize in double gate MOSFETs for ultra-low-voltage analog/rf applications? ' SOLID-STATE ELECTRONICS , vol 52 , no. 12 , pp. 1895-1903 . DOI: 10.1016/j.sse.2008.06.051 |
Palavras-Chave | #/dk/atira/pure/subjectarea/asjc/2200/2208 #Electrical and Electronic Engineering #/dk/atira/pure/subjectarea/asjc/2500/2504 #Electronic, Optical and Magnetic Materials #/dk/atira/pure/subjectarea/asjc/2500/2505 #Materials Chemistry #/dk/atira/pure/subjectarea/asjc/3100/3104 #Condensed Matter Physics |
Tipo |
article |