Study of the audio coding algorithm of the MPEG-4 AAC standard and comparison among implementations of modules of the algorithm

Audio coding is used to compress digital audio signals, thereby reducing the amount of bits needed to transmit or to store an audio signal. This is useful when network bandwidth or storage capacity is very limited. Audio compression algorithms are based on an encoding and decoding process. In the encoding step, the uncompressed audio signal is transformed into a coded representation, thereby compressing the audio signal. Thereafter, the coded audio signal eventually needs to be restored (e.g. for playing back) through decoding of the coded audio signal. The decoder receives the bitstream and reconverts it into an uncompressed signal. ISO-MPEG is a standard for high-quality, low bit-rate video and audio coding. The audio part of the standard is composed by algorithms for high-quality low-bit-rate audio coding, i.e. algorithms that reduce the original bit-rate, while guaranteeing high quality of the audio signal. The audio coding algorithms consists of MPEG-1 (with three different layers), MPEG-2, MPEG-2 AAC, and MPEG-4. This work presents a study of the MPEG-4 AAC audio coding algorithm. Besides, it presents the implementation of the AAC algorithm on different platforms, and comparisons among implementations. The implementations are in C language, in Assembly of Intel Pentium, in C-language using DSP processor, and in HDL. Since each implementation has its own application niche, each one is valid as a final solution. Moreover, another purpose of this work is the comparison among these implementations, considering estimated costs, execution time, and advantages and disadvantages of each one.

O padrão de compressão de video MPEG moving picture experts group

This work focuses on the study of video compression standard MPEG. To this end, a study was undertaken starting from the basics of digital video, addressing the components necessary for the understanding of the tools used by the video coding standard MPEG. The Motion Picture Experts Group (MPEG) was formed in the late '80s by a group of experts in order to create international standards for encoding and decoding audio and video. This paper will discuss the techniques present in the video compression standard MPEG, as well as its evolution. Will be described in the MPEG-1, MPEG-2, MPEG-4 and H.264 (MPEG-4 Part 10), however, the last two will be presented with more emphasis, because the standards are present in most modern video technologies, as in HDTV broadcasts

Simultaneous MultiStreaming for complexity-effective VLIW architectures

Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hardware. However, control and data dependencies between operations limit the available ILP, which not only hinders the scalability of VLIW architectures, but also result in code size expansion. Although speculation and predicated execution mitigate ILP limitations due to control dependencies to a certain extent, they increase hardware cost and exacerbate code size expansion. Simultaneous multistreaming (SMS) can significantly improve operation throughput by allowing interleaved execution of operations from multiple instruction streams. In this paper we study SMS for VLIW architectures and quantify the benefits associated with it using a case study of the MPEG-2 video decoder. We also propose the notion of virtual resources for VLIW architectures, which decouple architectural resources (resources exposed to the compiler) from the microarchitectural resources, to limit code size expansion. Our results for a VLIW architecture demonstrate that: (1) SMS delivers much higher throughput than that achieved by speculation and predicated execution, (2) the increase in performance due to the addition of speculation and predicated execution support over SMS averages around 12%. The minor increase in performance might not warrant the additional hardware complexity involved, and (3) the notion of virtual resources is very effective in reducing no-operations (NOPs) and consequently reduce code size with little or no impact on performance.

Subpixel interpolation architecture for multistandard video motion estimation

A new reconfigurable subpixel interpolation architecture for multistandard (e.g., MPEG-2, MPEG-4, H.264, and AVS) video motion estimation (ME) is presented. This exploits the mixed use of parallel and serial-input FIR filters to achieve high throughput rate and efficient silicon utilization. Silicon design studies show that this can be implemented using 34.8 × 10 3 gates with area and performance that compares very favorably with specific fixed solutions, e.g., for the H.264 standard alone. This can support SDTV and HDTV applications when implemented in 0.18 µm CMOS technology, with further performance enhancements achievable at 0.13 µm and below. © 2009 IEEE.

Reconfigurable system-on-a-chip motion estimation architecture for multi-standard video coding

A new domain-specific, reconfigurable system-on-a-chip (SoC) architecture is proposed for video motion estimation. This has been designed to cover most of the common block-based video coding standards, including MPEG-2, MPEG-4, H.264, WMV-9 and AVS. The architecture exhibits simple control, high throughput and relatively low hardware cost when compared with existing circuits. It can also easily handle flexible search ranges without any increase in silicon area and can be configured prior to the start of the motion estimation process for a specific standard. The computational rates achieved make the circuit suitable for high-end video processing applications, such as HDTV. Silicon design studies indicate that circuits based on this approach incur only a relatively small penalty in terms of power dissipation and silicon area when compared with implementations for specific standards. Indeed, the cost/performance achieved exceeds that of existing but specific solutions and greatly exceeds that of general purpose field programmable gate array (FPGA) designs.

Reconfigurable full-search video motion estimation architecture

In this paper, a new reconfigurable multi-standard architecture is introduced for integer-pixel motion estimation and a standard-cell based chip design study is presented. This has been designed to cover most of the common block-based video compression standards, including MPEG-2, MPEG-4, H.263, H.264, AVS and WMV-9. The architecture exhibits simpler control, high throughput and relative low hardware cost and highly competitive when compared with excising designs for specific video standards. It can also, through the use of control signals, be dynamically reconfigured at run-time to accommodate different system constraint such as the trade-off in power dissipation and video-quality. The computational rates achieved make the circuit suitable for high end video processing applications. Silicon design studies indicate that circuits based on this approach incur only a relatively small penalty in terms of power dissipation and silicon area when compared with implementations for specific standards.

Deterministic equalization and results of a DVB-T multipath equalizer for both 16-QAM and 64-QAM operation

Recent developments in the UK concerning the reception of Digital Terrestrial Television (DTT) have indicated that, as it currently stands, DVB-T receivers may not be sufficient to maintain adequate quality of digital picture information to the consumer. There are many possible reasons why such large errors are being introduced into the system preventing reception failure. It has been suggested that one possibility is that the assumptions concerning the immunity to multipath that Coded Orthogonal Frequency Division Multiplex (COFDM) is expected to have, may not be entirely accurate. Previous research has shown that multipath can indeed have an impact on a DVB-T receiver performance. In the UK, proposals have been made to change the modulation from 64-QAM to 16-QAM to improve the immunity to multipath, but this paper demonstrates that the 16-QAM performance may again not be sufficient. To this end, this paper presents a deterministic approach to equalization such that a 64-QAM receiver with the simple equalizer presented in this paper has the same order of MPEG-2 BER performance as that to a 16-QAM receiver without equalization. Thus, alleviating the requirement in the broadcasters to migrate from 64-QAM to 16-QAM Of course, by adding the equalizer to a 16-QAM receiver then the BER is also further improved and thus creating one more step to satisfying the consumers(1).

Analysis of a DVB-T compliant receiver simulation under various multipath conditions

Since 1966, coded orthogonal frequency division multiplexing (COFDM) has been investigated to determine the possibility of reducing the overall throughput of a digitally modulated terrestrial television channel. In the investigations, many assumptions have emerged. One common misconception is that in a terrestrial environment, COFDM has an inherent immunity to multipath interference. A theoretical analysis of a multipath channel, along with simulation results has shown that this assumption does not hold the information is considered when including the radio frequency modulation and demodulation. This paper presents a background into the inception of COFDM, a mathematical analysis of the digitally modulated television signal under multipath conditions and the results of a European Digital Video Broadcasting-Terrestrial (DVB-T) compliant simulation model with MPEG-2 bitstreams transmitted under various multipath conditions.

Cabecera de televisión por cable

En el presente proyecto se realiza un estudio para la construcción de una cabecera de televisión por cable. Se trata de un proyecto puramente teórico en el que se especifican cada una de las partes que forman una cabecera de televisión y cómo funciona cada una de ellas. En un principio, se sitúa la cabecera de televisión dentro de una plataforma general de transmisión, para indicar sus funciones. Posteriormente, se analizan las distintas tecnologías que implementan esta transmisión y los estándares DVB que las rigen, como son DVB-C y DVB-C2 para las transmisiones por cable propiamente dichas y DVB-IPTV para las transmisiones por IP, para elegir cuál de las opciones es la más acertada y adaptar la cabecera de televisión a la misma. En cuanto al desarrollo teórico de la cabecera, se estudia el proceso que sigue la señal dentro de la misma, desde la recepción de los canales hasta el envío de los mismos hacia los hogares de los distintos usuarios, pasando previamente por las etapas de codificación y multiplexación. Además, se especifican los equipos necesarios para el correcto funcionamiento de cada una de las etapas. En la recepción, se reciben los canales por cada uno de los medios posibles (satélite, cable, TDT y estudio), que son demodulados y decodificados por el receptor. A continuación, son codificados (en este proyecto en MPEG-2 o H.264) para posteriormente ser multiplexados. En la etapa de multiplexación, se forma una trama Transport Stream por cada canal, compuesta por su flujo de video, audio y datos. Estos datos se trata de una serie de tablas (SI y PSI) que guían al set-topbox del usuario en la decodificación de los programas (tablas PSI) y que proporcionan información de cada uno de los mismos y del sistema (tablas SI). Con estas últimas el decodificador forma la EPG. Posteriormente, se realiza una segunda multiplexación, de forma que se incluyen múltiples programas en una sola trama Transport Stream (MPTS). Estos MPTS son los flujos que les son enviados a cada uno de los usuarios. El mecanismo de transmisión es de dos tipos en función del contenido y los destinatarios: multicast o unicast. Por último, se especifica el funcionamiento básico de un sistema de acceso condicional, así como su estructura, el cual es imprescindible en todas las cabeceras para asegurar que cada usuario solo visualiza los contenidos contratados. In this project, a study is realized for the cable television head-end construction . It is a theoretical project in which there are specified each of the parts that form a television headend and how their works each of them. At first, the television head-end places inside a general platform of transmission, to indicate its functions. Later, the different technologies that implement this transmission and the standards DVB that govern them are analyzed, since the standards that govern the cable transmissions (DVB-C and DVB-C2) to the standard that govern the IP transmissions (DVB-IPTV), to choose which of the options is the most guessed right and to adapt the television head-end to the same one. The theoretical development of the head-end, there is studied the process that follows the sign inside the same one, from the receipt of the channels up to the sending of the same ones towards the homes of the different users, happening before for the stages of codification and multiplexación. In addition, there are specified the equipments necessary for the correct functioning of each one of the stages. In the reception, the channels are receiving for each of the possible systems(satellite, cable, TDT and study), and they are demodulated and decoded by the receiver. Later, they are codified (in this project in MPEG-2 or H.264). The next stage is the stage of multiplexing. In the multiplexing stage, the channels are packetized in Transport Stream, composed by his video flow, audio and information. The information are composed by many tables(SI and PSI). The PSI tables guide the set-top-box of the user in the programs decoding and the SI tables provide information about the programs and system. With the information mentioned the decoder forms the EPG. Later, a second multiplexación is realized, so that there includes multiple programs in an alone Transport Stream (MPTS). These MPTS are the flows that are sent to each of the users. Two types of transmission are possible: unicast (VoD channels) and multicast (live channels). Finally, the basic functioning of a conditional access system is specified and his structure too, which is indispensable in all the head-end to assure that every users visualizes the contracted contents only.

Modelado en alto nivel con SystemC

El presente proyecto final de carrera titulado “Modelado de alto nivel con SystemC” tiene como objetivo principal el modelado de algunos módulos de un codificador de vídeo MPEG-2 utilizando el lenguaje de descripción de sistemas igitales SystemC con un nivel de abstracción TLM o Transaction Level Modeling. SystemC es un lenguaje de descripción de sistemas digitales basado en C++. En él hay un conjunto de rutinas y librerías que implementan tipos de datos, estructuras y procesos especiales para el modelado de sistemas digitales. Su descripción se puede consultar en [GLMS02] El nivel de abstracción TLM se caracteriza por separar la comunicación entre los módulos de su funcionalidad. Este nivel de abstracción hace un mayor énfasis en la funcionalidad de la comunicación entre los módulos (de donde a donde van datos) que la implementación exacta de la misma. En los documentos [RSPF] y [HG] se describen el TLM y un ejemplo de implementación. La arquitectura del modelo se basa en el codificador MVIP-2 descrito en [Gar04], de dicho modelo, los módulos implementados son: · IVIDEOH: módulo que realiza un filtrado del vídeo de entrada en la dimensión horizontal y guarda en memoria el video filtrado. · IVIDEOV: módulo que lee de la memoria el vídeo filtrado por IVIDEOH, realiza el filtrado en la dimensión horizontal y escribe el video filtrado en memoria. · DCT: módulo que lee el video filtrado por IVIDEOV, hace la transformada discreta del coseno y guarda el vídeo transformado en la memoria. · QUANT: módulo que lee el video transformado por DCT, lo cuantifica y guarda el resultado en la memoria. · IQUANT: módulo que lee el video cuantificado por QUANT, realiza la cuantificación inversa y guarda el resultado en memoria. · IDCT: módulo que lee el video procesado por IQUANT, realiza la transformada inversa del coseno y guarda el resultado en memoria. · IMEM: módulo que hace de interfaz entre los módulos anteriores y la memoria. Gestiona las peticiones simultáneas de acceso a la memoria y asegura el acceso exclusivo a la memoria en cada instante de tiempo. Todos estos módulos aparecen en gris en la siguiente figura en la que se muestra la arquitectura del modelo: Figura 1. Arquitectura del modelo (VER PDF DEL PFC) En figura también aparecen unos módulos en blanco, dichos módulos son de pruebas y se han añadido para realizar simulaciones y probar los módulos del modelo: · CAMARA: módulo que simula una cámara en blanco y negro, lee la luminancia de un fichero de vídeo y lo envía al modelo a través de una FIFO. · FIFO: hace de interfaz entre la cámara y el modelo, guarda los datos que envía la cámara hasta que IVIDEOH los lee. · CONTROL: módulo que se encarga de controlar los módulos que procesan el vídeo, estos le indican cuando terminan de procesar un frame de vídeo y este módulo se encarga de iniciar los módulos que sean necesarios para seguir con la codificación. Este módulo se encarga del correcto secuenciamiento de los módulos procesadores de vídeo. · RAM: módulo que simula una memoria RAM, incluye un retardo programable en el acceso. Para las pruebas también se han generado ficheros de vídeo con el resultado de cada módulo procesador de vídeo, ficheros con mensajes y un fichero de trazas en el que se muestra el secuenciamiento de los procesadores. Como resultado del trabajo en el presente PFC se puede concluir que SystemC permite el modelado de sistemas digitales con bastante sencillez (hace falta conocimientos previos de C++ y programación orientada objetos) y permite la realización de modelos con un nivel de abstracción mayor a RTL, el habitual en Verilog y VHDL, en el caso del presente PFC, el TLM. ABSTRACT This final career project titled “High level modeling with SystemC” have as main objective the modeling of some of the modules of an MPEG-2 video coder using the SystemC digital systems description language at the TLM or Transaction Level Modeling abstraction level. SystemC is a digital systems description language based in C++. It contains routines and libraries that define special data types, structures and process to model digital systems. There is a complete description of the SystemC language in the document [GLMS02]. The main characteristic of TLM abstraction level is that it separates the communication among modules of their functionality. This abstraction level puts a higher emphasis in the functionality of the communication (from where to where the data go) than the exact implementation of it. The TLM and an example are described in the documents [RSPF] and [HG]. The architecture of the model is based in the MVIP-2 video coder (described in the document [Gar04]) The modeled modules are: · IVIDEOH: module that filter the video input in the horizontal dimension. It saves the filtered video in the memory. · IVIDEOV: module that read the IVIDEOH filtered video, filter it in the vertical dimension and save the filtered video in the memory. · DCT: module that read the IVIDEOV filtered video, do the discrete cosine transform and save the transformed video in the memory. · QUANT: module that read the DCT transformed video, quantify it and save the quantified video in the memory. · IQUANT: module that read the QUANT processed video, do the inverse quantification and save the result in the memory. · IDCT: module that read the IQUANT processed video, do the inverse cosine transform and save the result in the memory. · IMEM: this module is the interface between the modules described previously and the memory. It manage the simultaneous accesses to the memory and ensure an unique access at each instant of time All this modules are included in grey in the following figure (SEE PDF OF PFC). This figure shows the architecture of the model: Figure 1. Architecture of the model This figure also includes other modules in white, these modules have been added to the model in order to simulate and prove the modules of the model: · CAMARA: simulates a black and white video camera, it reads the luminance of a video file and sends it to the model through a FIFO. · FIFO: is the interface between the camera and the model, it saves the video data sent by the camera until the IVIDEOH module reads it. · CONTROL: controls the modules that process the video. These modules indicate the CONTROL module when they have finished the processing of a video frame. The CONTROL module, then, init the necessary modules to continue with the video coding. This module is responsible of the right sequence of the video processing modules. · RAM: it simulates a RAM memory; it also simulates a programmable delay in the access to the memory. It has been generated video files, text files and a trace file to check the correct function of the model. The trace file shows the sequence of the video processing modules. As a result of the present final career project, it can be deduced that it is quite easy to model digital systems with SystemC (it is only needed previous knowledge of C++ and object oriented programming) and it also allow the modeling with a level of abstraction higher than the RTL used in Verilog and VHDL, in the case of the present final career project, the TLM.

Redes VSAT con el estándar DVB-S

Actualmente las redes VSAT (Very Small Aperture Terminal) están adquiriendo una mayor importancia en las comunicaciones por satélite debido a las nuevas aplicaciones que se están desarrollando tanto a nivel empresarial como a nivel de usuario final. El presente proyecto pretende hacer un estudio de este tipo de red para presentarla como una solución al problema de querer conectar estaciones dispersas, que por el perfil del terreno hace difícil la conexión de las mismas a través de las redes terrestres convencionales. Los nuevos estándares están haciendo que este tipo de redes proliferen muy deprisa ya que se consigue una mayor flexibilidad que con los estándares precedentes para este tipo de red. En concreto, en este proyecto se ha estudiado el estándar abierto DVB-S desarrollado por el grupo de trabajo DVB por ser uno de los más aceptado internacionalmente. Para comprender este sistema de comunicaciones, el proyecto está estructurado en dos partes. En la primera parte se hace una revisión de cómo han evolucionado las comunicaciones satelitales VSAT, indicando las ventajas y desventajas de su implementación y sobre todo la orientación que éstas muestran a la utilización de los estándares DVB. Posteriormente se realiza un estudio de los estándares DVB-S y DVBRCS en donde se profundiza en conceptos claves tales como el Multiplexado de Transporte MPEG-2, los mecanismos de envío de mensajes de señalización, etc. En la segunda parte del proyecto se presta atención a la seguridad de la red, analizando los mecanismos propios que presenta el estándar DVB así como los diferentes protocolos de seguridad existentes en las capas superiores para una protección adicional. Para concluir el proyecto se han creado dos aplicaciones, la primera como método didáctico para comprender mejor el comportamiento de las redes VSAT con el estándar DVB-S, y una segunda aplicación con carácter comercial para la transferencia de ficheros de manera segura con características específicas, enfocada particularmente en redes VSAT, aunque siendo posible su uso en otras redes. ABSTRACT. Nowadays VSAT networks (Very Small Aperture Terminal) are becoming more important in satellite communications, due to several new applications that are being developed both at company level and end user level. This project aims to make a study of this type of network to present it as a solution to the problem of wanting to connect scattered stations, because the terrain profile makes difficult to connect them via conventional terrestrial networks. New standards are making that such networks proliferate very quickly for the reason that a more flexibility than the previous standards for this type of network is achieved. Specifically, this project has studied the open standard DVB-S developed by the DVB workgroup as one of the most internationally accepted. To understand this communication system, this project is structured in two different parts: On one hand, in the first part a review about how VSAT satellite communications have evolved, indicating the advantages and disadvantages of its implementation and above all, the guidance that they show to the use of the DVB standards. Subsequently, a study of the DVB-S and DVB-RCS standards is developed, where delves into key concepts such as MPEG-2 Multiplexed Transport, mechanisms of transmission of signaling messages, etc. On the other hand, in the second part of the project, we focus on network security, analyzing the mechanisms presented by the DVB standard and various existing security protocols in the upper layers for an extra protection. To complete the project two different applications have been developed: the first one as a teaching method to better understand the behavior of VSAT networks in DVB-S standard, and the second one with a commercial basis for transferring files securely with specific features applications focused particularly in VSAT networks, although with a possible use on other networks.

Physical oceanography, sea-bed photographs and videos of benthos from the Weddell Sea taken with remote operated vehicle CHEROKEE during POLARSTERN cruise ANT-XXIII/8

The marine ecosystem on the eastern shelf of the Antarctic Peninsula was surveyed 5 and 12 years after the climate-induced collapse of the Larsen A and B ice shelves. An impoverished benthic fauna was discovered, that included deep-sea species presumed to be remnants from ice-covered conditions. The current structure of various ecosystem components appears to result from extremely different response rates to the change from an oligotrophic sub-ice-shelf ecosystem to a productive shelf ecosystem. Meiobenthic communities remained impoverished only inside the embayments. On local scales, macro- and mega-epibenthic diversity was generally low, with pioneer species and typical Antarctic megabenthic shelf species interspersed. Antarctic Minke whales and seals utilised the Larsen A/B area to feed on presumably newly established krill and pelagic fish biomass. Ecosystem impacts also extended well beyond the zone of ice-shelf collapse, with areas of high benthic disturbance resulting from scour by icebergs discharged from the Larsen embayments.