Parallel min-cut placement on reduced hardware SIMD architecture.

Massively parallel SIMD computing is applied to obtain an order of magnitude improvement in the executional speed of an important algorithm in VLSI design automation. The physical design of a VLSI circuit involves logic module placement as a subtask. The paper is concerned with accelerating the well known Min-cut placement technique for logic cell placement. The inherent parallelism of the Min-cut algorithm is identified, and it is shown that a parallel machine based on the efficient execution of the placement procedure.

Generic Architecture and Semiconductor Intellectual Property Cores for Avanced Encryption Standard Cryptography

A generic architecture for implementing the advanced encryption standard (AES) encryption algorithm in silicon is proposed. This allows the instantiation of a wide range of chip specifications, with these taking the form of semiconductor intellectual property (IP) cores. Cores implemented from this architecture can perform both encryption and decryption and support four modes of operation: (i) electronic codebook mode; (ii) output feedback mode; (iii) cipher block chaining mode; and (iv) ciphertext feedback mode. Chip designs can also be generated to cover all three AES key lengths, namely 128 bits, 192 bits and 256 bits. On-the-fly generation of the round keys required during decryption is also possible. The general, flexible and multi-functional nature of the approach described contrasts with previous designs which, to date, have been focused on specific implementations. The presented ideas are demonstrated by implementation in FPGA technology. However, the architecture and IP cores derived from this are easily migratable to other silicon technologies including ASIC and PLD and are capable of covering a wide range of modem communication systems cryptographic requirements. Moreover, the designs produced have a gate count and throughput comparable with or better than the previous one-off solutions.

Design and implementation of a field programmable CRC circuit architecture

The design and implementation of a programmable cyclic redundancy check (CRC) computation circuit architecture, suitable for deployment in network related system-on-chips (SoCs) is presented. The architecture has been designed to be field reprogrammable so that it is fully flexible in terms of the polynomial deployed and the input port width. The circuit includes an embedded configuration controller that has a low reconfiguration time and hardware cost. The circuit has been synthesised and mapped to 130-nm UMC standard cell [application-specific integrated circuit (ASIC)] technology and is capable of supporting line speeds of 5 Gb/s. © 2006 IEEE.

Fully hardware based WFQ architecture for high-speed QoS packet scheduling

A full hardware implementation of a Weighted Fair Queuing (WFQ) packet scheduler is proposed. The circuit architecture presented has been implemented using Altera Stratix II FPGA technology, utilizing RLDII and QDRII memory components. The circuit can provide fine granularity Quality of Service (QoS) support at a line throughput rate of 12.8Gb/s in its current implementation. The authors suggest that, due to the flexible and scalable modular circuit design approach used, the current circuit architecture can be targeted for a full ASIC implementation to deliver 50 Gb/s throughput. The circuit itself comprises three main components; a WFQ algorithm computation circuit, a tag/time-stamp sort and retrieval circuit, and a high throughput shared buffer. The circuit targets the support of emerging wireline and wireless network nodes that focus on Service Level Agreements (SLA's) and Quality of Experience.

NFA decomposition and multiprocessing architecture for parallel regular expression processing

This work presents a novel algorithm for decomposing NFA automata into one-state-active modules for parallel execution on Multiprocessor Systems on Chip (MP-SoC). Furthermore, performance related studies based on a 16-PE system for Snort, Bro and Linux-L7 regular expressions are presented. ©2009 IEEE.

Novel hardware and software combination for automotive motorsport vehicles based on direct processing of graphical functions

The main motivation for the work presented here began with previously conducted experiments with a programming concept at the time named "Macro". These experiments led to the conviction that it would be possible to build a system of engine control from scratch, which could eliminate many of the current problems of engine management systems in a direct and intrinsic way. It was also hoped that it would minimize the full range of software and hardware needed to make a final and fully functional system. Initially, this paper proposes to make a comprehensive survey of the state of the art in the specific area of software and corresponding hardware of automotive tools and automotive ECUs. Problems arising from such software will be identified, and it will be clear that practically all of these problems stem directly or indirectly from the fact that we continue to make comprehensive use of extremely long and complex "tool chains". Similarly, in the hardware, it will be argued that the problems stem from the extreme complexity and inter-dependency inside processor architectures. The conclusions are presented through an extensive list of "pitfalls" which will be thoroughly enumerated, identified and characterized. Solutions will also be proposed for the various current issues and for the implementation of these same solutions. All this final work will be part of a "proof-of-concept" system called "ECU2010". The central element of this system is the before mentioned "Macro" concept, which is an graphical block representing one of many operations required in a automotive system having arithmetic, logic, filtering, integration, multiplexing functions among others. The end result of the proposed work is a single tool, fully integrated, enabling the development and management of the entire system in one simple visual interface. Part of the presented result relies on a hardware platform fully adapted to the software, as well as enabling high flexibility and scalability in addition to using exactly the same technology for ECU, data logger and peripherals alike. Current systems rely on a mostly evolutionary path, only allowing online calibration of parameters, but never the online alteration of their own automotive functionality algorithms. By contrast, the system developed and described in this thesis had the advantage of following a "clean-slate" approach, whereby everything could be rethought globally. In the end, out of all the system characteristics, "LIVE-Prototyping" is the most relevant feature, allowing the adjustment of automotive algorithms (eg. Injection, ignition, lambda control, etc.) 100% online, keeping the engine constantly working, without ever having to stop or reboot to make such changes. This consequently eliminates any "turnaround delay" typically present in current automotive systems, thereby enhancing the efficiency and handling of such systems.

Integrating hardware and software information flow analyses

Security-critical communications devices must be evaluated to the highest possible standards before they can be deployed. This process includes tracing potential information flow through the device's electronic circuitry, for each of the device's operating modes. Increasingly, however, security functionality is being entrusted to embedded software running on microprocessors within such devices, so new strategies are needed for integrating information flow analyses of embedded program code with hardware analyses. Here we show how standard compiler principles can augment high-integrity security evaluations to allow seamless tracing of information flow through both the hardware and software of embedded systems. This is done by unifying input/output statements in embedded program execution paths with the hardware pins they access, and by associating significant software states with corresponding operating modes of the surrounding electronic circuitry.

Play in the city : Parkour and architecture

The ability to play freely in our cities is essential for sustainable wellbeing. When integrated successfully into our cities, Urban Play performs an important role; physically, socially and culturally contributing to the image of the city. While Urban Play is essential, it also finds itself in conflict with the city. Under modernist urban approaches play activities have become progressively segregated from the urban context through a tripartite of design, procurement and management practices. Despite these restrictions, emergent underground play forms overcome the isolation of play within urban space. One of these activities (parkour) is used as an evocative case study to reveal the hidden urban terrains of desire and fear as it re-interprets the fabric of the city, eliciting practice based discussions about procurement, design and management practice along its route.

Newstead House : the social history, culture and architecture of a bygone era

Historic house museums form a significant component of the built heritage and social history of a country. They vary from the elaborate mansions of the wealthy to modest dwellings of the working class. Regardless of the original owner's status in society these house museums are vital to an understanding of architecture, culture and society from a bygone era. The Newstead House, the oldest surviving residence, in Brisbane, is the first house to be designated a 'Historic House Museum' in Queensland. It is a representative example of a house that demonstrates the British colonial heritage of 19th century Australia. Originally a modest cottage, on 34 acres of land, the Newstead house was built by a Scottish migrant. The ownership of the house and land changed many times, during the period from 1847 to 1939. During this period a series of prominent residents of Brisbane either owned or rented this residence. They included, an officer of the Royal Navy, politicians, magistrates, merchant ship owners, and a Consul General of the United States of America. As a result, the house went through a series of renovations and extensions to accommodate the needs of its owners and their position in society. This paper aims to investigate the significance of historic museum houses in educating the community on aspects of social history, culture and architecture of 19th century Australia. It will focus on the heritage listed Newstead House as a case study to demonstrate the significance of the house as an artefact and an educational tool.

The form of form : the fold and architecture

This paper will examine the idea of the fold arid its assimilation into architecture through philosophy and mathematics. In all its iterations, the fold appears as two constitutive items: the fold as self-similarity, which implies recursion; the fold within the fold, and in turn, the fold as continuous discontinuity. The persistence of this conception of die fold will be demonstrated through a discussion of Leibniz's Monadology, Deleuze's Le Pli, and some mathematical ideas from catastrophe and chaos theory. This raises the issue of continuity between disciplines and thus the philosophical status this confers on the fold.

The subject and architecture

Invited Presentation on my book Architecture for a Free Subjectivity. In March of 1982, Skyline, the Institute for Architecture and Urban Studies serial, published the landmark interview between Paul Rabinow, an American anthropologist, and Michel Foucault, which would only appear two years later under the title “Space, Knowledge, and Power,” in Rabinow’s edited book The Foucault Reader. Foucault said that in the spatialization of knowledge and power beginning in the 18th century, architecture is not a signifier or metaphor for power, it is rather the “technique for practising social organization.” The role of the IAUS in the architectural dissemination of Foucault’s ideas on the subject and space in the North American academy – such as the concept “heterotopia,” and Foucault’s writing on surveillance and Jeremy Bentham’s Panopticon, subsequently analysed by Georges Teyssot, who was teaching at the Venice School – is well known. Teyssot’s work is part of the historical canalization of Foucauldianism, and French subjectivity more broadly, along its dizzying path, via Italy, to American architecture schools, where it solidified in the 1980s paradigm that would come to be known as American architecture theory. Foucault was already writing on incarceration and prisons, from the 1970s. (In the 1975 lectures he said “architecture was responsible for the invention of madness.”) But this work was not properly incorporated into architectural discussion until the early ’80s. What is not immediately apparent, what this history suggests to me is that subjectivity was not a marginal topic within “theory”, but was perhaps a platform and entry point for architecture theory. One of the ideas that I’m working on is that “theory” can be viewed, historically, as the making of architectural subjectivity, something that can be traced back to the Frankfurt School critique which begins with the modern subject...