709 resultados para Galium arsenide


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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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Layered materials exhibit intriguing electronic characteristics and the search for new types of two-dimensional (2D) structures is of importance for future device fabrication. Using state-of-art first principle calculations, we identify and characterize the structural and electronic properties of two 2D layered arsenic materials, namely, arsenic and its alloy AsSb. The stable 2D structural configuration of arsenic is confirmed to be the low-buckled two-dimensional hexagonal structure by phonon and binding energy calculations. The monolayer exhibits indirect semiconducting properties with gap around 1.5 eV (corrected to 2.2 eV by hybrid function), which can be modulated into a direct semiconductor within a small amount of tensile strain. These semiconducting properties are preserved when cutting into 1D nanoribbons, but the band gap is edge dependent. It is interesting to find that an indirect to direct gap transition can be achieved under strain modulation of the armchair ribbon. Essentially the same phenomena can be found in layered AsSb, except a weak Rashba induced band splitting is present in AsSb due to the nonsymmetric structure and spin orbit coupling. When an additional layer is added on the top, a semiconductor–metal transition will occur. The findings here broaden the family of 2D materials beyond graphene and transition metal dichalcogenides and provide useful information for experimental fabrication of new layered materials with possible application in optoelectronics.

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The need for high purity materials for the growth of epitaxial layers of GaAs and the limitations of present source materials are discussed. A for purifying bulk quantitites of GaAs using chemical vapour transport is presented. GaAs is contained in a silica capsule which has a small orifice allow movement of gas between inside and outside. The capsule is contained in a heated tube and hydrogen chloride is used as the transporting agent. Growth rates of 0.1 g/h have been obtained and evidence for the purification is presented along with a discussion of the principles involved. The potentialities of the method for both purification and for the growth of single crystal substrate material are stressed.--AA

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Characterization of silver- and gold-related defects in gallium arsenide is carried out. These impurities were introduced during the thermal diffusion process and the related defects are characterized by deep-level transient spectroscopy and photoluminescence. The silver-related center in GaAs shows a 0.238 eV photoluminescence line corresponding to no-phonon transition, whereas its thermal ionization energy is found to be 0.426 eV. The thermal activation energy of the gold-related center in GaAs is 0.395 eV, but there is no corresponding luminescence signal.

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It is well-known that the properties of semiconductor materials including gallium arsenide are controlled by defects and impurities. The characterization of these defects is important not only for better understanding of the solid state phenomena but also for improved reliability and performance of electronic devices. We have been investigating the defects in gallium arsenide for several years using deep level transient spectroscopy, photoconductivity, transient photoconductivity, photoluminescence etc. Results drawn from our recent studies are presented here to illustrate some of the problems concerning transition metal impurities, process-induced defects, occurrence of intracentre transitions and metastability of deep levels in gallium arsenide.

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Low noise field effect transistors and analogue switch integrated circuits (ICs) have been fabricated in semi-insulating gallium arsenide (SI-GaAs) wafers grown in space by direct ion-implantation. The electrical behaviors of the devices and the ICs have surpassed those fabricated in the terrestrially grown SI-GaAs wafers. The highest gain and the lowest noise of the transistors made from space-grown SI-GaAs wafers are 22.8 dB and 0.78 dB, respectively. The threshold back-gating voltage of the ICs made from space-grown SI-GaAs wafers is better than 8.5 V The con-elation between the characterizations of materials and devices is studied systematically. (C) 2002 COSPAR. Published by Elsevier Science Ltd. All rights reserved.

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Semi-insulating gallium arsenide single crystal grown in space has been used in fabricating low noise field effect transistors and analog switch integrated circuits by the direct ion-implantation technique. All key electrical properties of these transistors and integrated circuits have surpassed those made from conventional earth-grown gallium arsenide. This result shows that device-grade space-grown semiconducting single crystal has surpassed the best terrestrial counterparts. (C) 2001 American Institute of Physics.

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Experimental results have shown the fact that the deep-level centers in semi-insulating GaAs decrease with the improvement in stoichiometry. The electrical resistivity doubles when the concentration of EL2 centers decreases to a half. The microgravity-growth experiments also show that improved crystal stoichiometry results in a decrease of deep-level centers. (C) 1998 American Institute of Physics. [S0021-8979(98)04921-4].

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A semi-insulating (SI) GaAs single crystal was recently grown in a retrievable satellite. The average etch pit density (EPD) of dislocations in the crystal revealed by molten KOH is 2.0 x 10(4) cm(-2), and the highest EPD is 3.1 x 10(4) cm(-2) This result indicates a quite good homogenity of the EPD which is much better than the ground-grown crystals. A similar better homogenity of the stoichiometry i.e., the [As]/([As] + [Ga]) ratio has been found in the space-grown SI-GaAs single crystal studied nondestructively using a new mapping method based upon X-ray Bond diffraction. The average stoichiometry in the space-grown crystal is 0.50007 with mean-square deviation of 6x10(-6), while the average stoichiometry in ground-grown SI-GaAs crystal is more than 0.50010. (C) 1998 Elsevier Science B.V. All rights reserved.

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HF etching followed by relatively low temperature (almost-equal-to 600-degrees-C) pretreatment is shown to provide a suitable substrate for the heteroepitaxial growth of GaAs on Si(100) by CBE using TEGa and AsH3 as sources. Rutherford backscattering (RBS), photoluminescence (PL), transmission electron microscopy (TEM), and Raman measurements show the low-defect nature of the GaAs epilayer.

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The influences of microdefects and dislocations on the lattice parameters of undoped semi-insulating GaAs single crystals were analyzed, and a novel nondestructive method for measuring stoichiometry in undoped semi-insulating GaAs was established in this letter. The comparison of this method with coulometric titration indicates that the method of nondestructive measurements is indeed convenient and reliable. (C) 1996 American Institute of Physics.

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The dislocations and precipitates in SI-GaAs single crystals are revealed by ultrasonic-aided Abrahams-Buiocchi etching (USAB), and the etch pits are observed and measured by metalloscope and scanning electron microscope (SEM) equipped with an energy dispersive X-ray spectrometer (EDS), respectively. The size of etch pit revealed by USAB etching is about 1 order of magnitude smaller than that revealed by molten KOH. The amount of arsenic atoms in the dislocation-dense zone is about 1% larger than that in an adjacent dislocation-free zone measured by EDS attached to SEM, which indicates that the excess arsenic atoms adjacent to the dislocation-dense zone are attracted to the dislocations and precipitate there due to the deformation energy.

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Low noise field effect transistors and analogue switch integrated circuits (ICs) have been fabricated in semi-insulating gallium arsenide (SI-GaAs) wafers grown in space by direct ion-implantation. The electrical behaviors of the devices and the ICs have surpassed those fabricated in the terrestrially grown SI-GaAs wafers. The highest gain and the lowest noise of the transistors made from space-grown SI-GaAs wafers are 22.8 dB and 0.78 dB, respectively. The threshold back-gating voltage of the ICs made from space-grown SI-GaAs wafers is better than 8.5 V The con-elation between the characterizations of materials and devices is studied systematically. (C) 2002 COSPAR. Published by Elsevier Science Ltd. All rights reserved.

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This PhD covers the development of planar inversion-mode and junctionless Al2O3/In0.53Ga0.47As metal-oxidesemiconductor field-effect transistors (MOSFETs). An implant activation anneal was developed for the formation of the source and drain (S/D) of the inversionmode MOSFET. Fabricated inversion-mode devices were used as test vehicles to investigate the impact of forming gas annealing (FGA) on device performance. Following FGA, the devices exhibited a subthreshold swing (SS) of 150mV/dec., an ION/IOFF of 104 and the transconductance, drive current and peak effective mobility increased by 29%, 25% and 15%, respectively. An alternative technique, based on the fitting of the measured full-gate capacitance vs gate voltage using a selfconsistent Poisson-Schrödinger solver, was developed to extract the trap energy profile across the full In0.53Ga0.47As bandgap and beyond. A multi-frequency inversion-charge pumping approach was proposed to (1) study the traps located at energy levels aligned with the In0.53Ga0.47As conduction band and (2) separate the trapped charge and mobile charge contributions. The analysis revealed an effective mobility (μeff) peaking at ~2850cm2/V.s for an inversion-charge density (Ninv) = 7*1011cm2 and rapidly decreasing to ~600cm2/V.s for Ninv = 1*1013 cm2, consistent with a μeff limited by surface roughness scattering. Atomic force microscopy measurements confirmed a large surface roughness of 1.95±0.28nm on the In0.53Ga0.47As channel caused by the S/D activation anneal. In order to circumvent the issue relative to S/D formation, a junctionless In0.53Ga0.47As device was developed. A digital etch was used to thin the In0.53Ga0.47As channel and investigate the impact of channel thickness (tInGaAs) on device performance. Scaling of the SS with tInGaAs was observed for tInGaAs going from 24 to 16nm, yielding a SS of 115mV/dec. for tInGaAs = 16nm. Flat-band μeff values of 2130 and 1975cm2/V.s were extracted on devices with tInGaAs of 24 and 20nm, respectively