Junction Field Effect on the Retention Time for One-Transistor Floating-Body RAM

One-transistor floating-body random access memory retention time distribution is investigated on silicon-on-insulator UTBOX devices. It is shown that the average retention time can be improved by two to three orders of magnitude by reducing the body-junction electric field. However, the retention time distribution, which is mainly caused by the generation-recombination center density variation, remains similar.

Pulsed laser deposition of strontium titanate thin films for dynamic random access memory applications

Polycrystalline strontium titanate (SrTiO3) films were prepared by a pulsed laser deposition technique on p-type silicon and platinum-coated silicon substrates. The films exhibited good structural and dielectric properties which were sensitive to the processing conditions. The small signal dielectric constant and dissipation factor at a frequency of 100 kHz were about 225 and 0.03 respectively. The capacitance-voltage (C-V) characteristics in metal-insulator-semiconductor structures exhibited anomalous frequency dispersion behavior and a hysteresis effect. The hysteresis in the C-V curve was found to be about 1 V and of a charge injection type. The density of interface states was about 1.79 x 10(12) cm(-2). The charge storage density was found to be 40 fC mu m(-2) at an applied electric field of 200 kV cm(-1). Studies on current-voltage characteristics indicated an ohmic nature at lower voltages and space charge conduction at higher voltages. The films also exhibited excellent time-dependent dielectric breakdown behavior.

Band alignment between Ta2O5 and metals for resistive random access memory electrodes engineering

Band alignment of resistive random access memory (RRAM) switching material Ta2O5 and different metal electrode materials was examined using high-resolution X-ray photoelectron spectroscopy. Schottky and hole barrier heights at the interface between electrode and Ta2O 5 were obtained, where the electrodes consist of materials with low to high work function (Φ m, v a c from 4.06 to 5.93 eV). Effective metal work functions were extracted to study the Fermi level pinning effect and to discuss the dominant conduction mechanism. An accurate band alignment between electrodes and Ta2O5 is obtained and can be used for RRAM electrode engineering and conduction mechanism study. © 2013 American Institute of Physics.

Fully lithography independent fabrication of nanogap electrodes for lateral phase-change random access memory application

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Properties of BaBi2Ta2O9 thin films prepared by chemical solution deposition technique for dynamic random-access memory applications

We report on the properties of BaBi2Ta2O9 (BBT) thin films for dynamic random-access memory (DRAM) and integrated capacitor applications. Crystalline BBT thin films were successfully fabricated by the chemical solution deposition technique on Pt-coated Si substrates at a low annealing temperature of 650°C. The films were characterized in terms of structural, dielectric, and insulating properties. The electrical measurements were conducted on Pt/BBT/Pt capacitors. The typical measured small signal dielectric constant and dissipation factor, at 100 kHz, were 282 and 0.023, respectively, for films annealed at 700°C for 60 min. The leakage current density of the films was lower than 10-9 A/cm2 at an applied electric field of 300 kV/cm. A large storage density of 38.4 fC/μm2 was obtained at an applied electric field of 200 kV/cm. The high dielectric constant, low dielectric loss and low leakage current density suggest the suitability of BBT thin films as dielectric layer for DRAM and integrated capacitor applications.

Select-divide-and-conquer method for large-scale configuration interaction

A select-divide-and-conquer variational method to approximate configuration interaction (CI) is presented. Given an orthonormal set made up of occupied orbitals (Hartree-Fock or similar) and suitable correlation orbitals (natural or localized orbitals), a large N-electron target space S is split into subspaces S0,S1,S2,...,SR. S0, of dimension d0, contains all configurations K with attributes (energy contributions, etc.) above thresholds T0={T0egy, T0etc.}; the CI coefficients in S0 remain always free to vary. S1 accommodates KS with attributes above T1≤T0. An eigenproblem of dimension d0+d1 for S0+S 1 is solved first, after which the last d1 rows and columns are contracted into a single row and column, thus freezing the last d1 CI coefficients hereinafter. The process is repeated with successive Sj(j≥2) chosen so that corresponding CI matrices fit random access memory (RAM). Davidson's eigensolver is used R times. The final energy eigenvalue (lowest or excited one) is always above the corresponding exact eigenvalue in S. Threshold values {Tj;j=0, 1, 2,...,R} regulate accuracy; for large-dimensional S, high accuracy requires S 0+S1 to be solved outside RAM. From there on, however, usually a few Davidson iterations in RAM are needed for each step, so that Hamiltonian matrix-element evaluation becomes rate determining. One μhartree accuracy is achieved for an eigenproblem of order 24 × 106, involving 1.2 × 1012 nonzero matrix elements, and 8.4×109 Slater determinants

Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis

Conventional dual-rail precharge logic suffers from difficult implementations of dual-rail structure for obtaining strict compensation between the counterpart rails. As a light-weight and high-speed dual-rail style, balanced cell-based dual-rail logic (BCDL) uses synchronised compound gates with global precharge signal to provide high resistance against differential power or electromagnetic analyses. BCDL can be realised from generic field programmable gate array (FPGA) design flows with constraints. However, routings still exist as concerns because of the deficient flexibility on routing control, which unfavourably results in bias between complementary nets in security-sensitive parts. In this article, based on a routing repair technique, novel verifications towards routing effect are presented. An 8 bit simplified advanced encryption processing (AES)-co-processor is executed that is constructed on block random access memory (RAM)-based BCDL in Xilinx Virtex-5 FPGAs. Since imbalanced routing are major defects in BCDL, the authors can rule out other influences and fairly quantify the security variants. A series of asymptotic correlation electromagnetic (EM) analyses are launched towards a group of circuits with consecutive routing schemes to be able to verify routing impact on side channel analyses. After repairing the non-identical routings, Mutual information analyses are executed to further validate the concrete security increase obtained from identical routing pairs in BCDL.

Floating-body SOI memory: Concepts, physics and challenges

We present an overview of the single-transistor memory cells (lT-DRAMs), which are based on floating-body effects in SOI MOSFETs. The typical device architectures, principles of operation and key mechanisms for programming are described. The various approaches (Z-RAM, MSDRAM, etc) are compared in terms of performance and potential for aggressive scaling. ©The Electrochemical Society.

Toward Self-Assembled Ferroelectric Random Access Memories: Hard-Wired Switching Capacitor Arrays with Almost Tb/in.2 Densities

We report on the successful fabrication of arrays of switchable nanocapacitors made by harnessing the self-assembly of materials. The structures are composed of arrays of 20-40 nm diameter Pt nanowires, spaced 50-100 nm apart, electrodeposited through nanoporous alumina onto a thin film lower electrode on a silicon wafer. A thin film ferroelectric (both barium titanate (BTO) and lead zirconium titanate (PZT)) has been deposited on top of the nanowire array, followed by the deposition of thin film upper electrodes. The PZT nanocapacitors exhibit hysteresis loops with substantial remnant polarizations, while although the switching performance was inferior, the low-field characteristics of the BTO nanocapacitors show dielectric behavior comparable to conventional thin film heterostructures. While registration is not sufficient for commercial RAM production, this is nevertheless an embryonic form of the highest density hard-wired FRAM capacitor array reported to date and compares favorably with atomic force microscopy read-write densities.

Dependence of Generation-Recombination Noise With Gate Voltage in FD SOI MOSFETs

A model for computing the generation-recombination noise due to traps within the semiconductor film of fully depleted silicon-on-insulator MOSFET transistors is presented. Dependence of the corner frequency of the Lorentzian spectra on the gate voltage is addressed in this paper, which is different to the constant behavior expected for bulk transistors. The shift in the corner frequency makes the characterization process easier. It helps to identify the energy position, capture cross sections, and densities of the traps. This characterization task is carried out considering noise measurements of two different candidate structures for single-transistor dynamic random access memory devices.

Low electric field, easily reversible electrical set and reset processes in a Ge15Te83Si2 glass for phase change memory applications

We report here an easily reversible set-reset process in a new Ge15Te83Si2 glass that could be a promising candidate for phase change random access memory applications. The I-V characteristics of the studied sample show a comparatively low threshold electric field (E-th) of 7.3 kV/cm. Distinct differences in the type of switching behavior are achieved by means of controlling the on state current. It enables the observation of a threshold type for less than 0.7 mA beyond memory type (set) switching. The set and reset processes have been achieved with a similar magnitude of 1 mA, and with a triangular current pulse for the set process and a short duration rectangular pulse of 10 msec width for the reset operation. Further, a self-resetting effect is seen in this material upon excitation with a saw-tooth/square pulse, and their response of leading and trailing edges are discussed. About 6.5 x 10(4) set-reset cycles have been undertaken without any damage to the device. (C) 2011 American Institute of Physics. doi: 10.1063/1.3574659]

Study of thickness dependence on electrical properties of (Pb,La)TiO3 thin films for memory applications

Lead-lanthanum-titanate (Pb0.72La0.28)TiO3 (PLT) is one of the interesting materials for DRAM applications due to its room temperature paraelectric nature and its higher dielectric permittivity. PLT thin films of different thickness ranging from 0.54- 0.9 mum were deposited on Pt coated Si substrates by excimer laser ablation technique. We have measured the voltage (field) dependence, the thickness dependence, temperature dependence of dc leakage currents and analysis is done on these PLT thin films. Current- voltage characteristics were measured at different temperatures for different thick films and the thickness dependence of leakage current has been explained by considering space charge limited conduction mechanism. The charge transport phenomena were studied in detail for films of different thicknesses for dynamic random access memory applications.

Ferroelectric and optical properties of Ba5Li2Ti2Nb8O30 ceramics potential for memory applications

Giant grained (42 mu m) translucent Ba5Li2Ti2Nb8O30 ceramic was fabricated by conventional sintering technique using the powders obtained via solid state reaction route. These samples were confirmed to possess tetragonal tungsten bronze structure (P4bm) at room temperature. The scanning electron microscopy established the average grain size to be close to 20 mu m. The photoluminescence studies carried out on these ceramics indicated sharp emission bands around 433 and 578 nm at an excitation wavelength of 350 nm which were attributed to band-edge emission as the band gap was 2.76 eV determined by Kubelka-Munk function. The dielectric properties of these ceramics were studied over wide frequency range (100-1 MHz) at room temperature. The decrease in dielectric constant with frequency could be explained on the basis of Koops theory. The dielectric constant and the loss were found to decrease with increasing frequency. The Curie temperature was confirmed to be similar to 370 A degrees C based on the dielectric anomaly observed when these measurements were carried out over a temperature range of 30-500 A degrees C. This shows a deviation from Curie-Weiss behaviour and hence an indicator of the occurrence of disordering in the system, the gamma = 1.23 which confirms the diffuse ferroelectric transition. These ceramics at room temperature exhibited P-E hysteresis loops, though not well saturated akin to that of their single crystalline counterparts. These are the suitable properties for ferroelectric random access memory applications.