Development of a DC-DC converter for DC bus voltage control of series connected device

The purpose of this work is to study voltage control and energy balance of a split DC bus topology within a power electronics equipment connected to the AC mains, such as UPS systems, wind power generators, active filters and FACTS devices. A typical configuration in such equipment has two mains connected converters sharing a common DC bus, one series connected and the other parallel connected. The DC bus is usually composed by a battery or a capacitor bank. In the proposed topology, the DC bus is divided in two sides, interconnected with a buck-boost converter, which controls power flow and DC voltage on both sides. © 2009 IEEE.

Common mode DC bus filter for Active Front-End converter

Active Front-End (AFE) converter operation produces electrically noisy DC bus on common mode basis. This results in higher ground current as compared to three phase diode bridge rectifier. Filter topologies for DC bus have to deal problems with switching frequency and harmonic currents. The proposed filter approach reduces common mode voltage and circulates third harmonic current within the system, resulting in minimal ground current injection. The filtering technique, its constrains and design to attenuate common mode voltage and eliminate lower order harmonics injection to ground is discussed. The experimental results for operation of the converter with both SPWM and CSVPWM are presented.

Common DC link in residential LV network to improve the penetration level of Small-Scale Embedded Generators

This paper presents a new approach for network upgrading to improve the penetration level of Small Scale Generators in residential feeders. In this paper, it is proposed that a common DC link can be added to LV network to alleviate the negative impact of increased export power on AC lines, allowing customers to inject their surplus power with no restrictions to the common DC link. In addition, it is shown that the proposed approach can be a pathway from current AC network to future DC network.

Low-frequency dc bus ripple cancellation in single phase pulse-width modulation inverters

This study presents a topology for a single-phase pulse-width modulation (PWM) converter which achieves low-frequency ripple reduction in the dc bus even when there are grid frequency variations. A hybrid filter is introduced to absorb the low-frequency current ripple in the dc bus. The control strategy for the proposed filter does not require the measurement of the dc bus ripple current. The design criteria for selecting the filter components are also presented in this study. The effectiveness of the proposed circuit has been tested and validated experimentally. A smaller dc-link capacitor is sufficient to keep the low-frequency bus ripple to an acceptable range in the proposed topology.

Damping torque analysis for DC bus implemented damping control

Damping torque analysis is a well-developed technique for understanding and studying power system oscillations. This paper presents the applications of damping torque analysis for DC bus implemented damping control in power transmission networks in two examples. The first example is the investigation of damping effect of shunt VSC (Voltage Source Converter) based FACTS voltage control, i.e., STATCOM (Static Synchronous Compensator) voltage control. It is shown in the paper that STATCOM voltage control mainly contributes synchronous torque and hence has little effect on the damping of power system oscillations. The second example is the damping control implemented by a Battery Energy Storage System (BESS) installed in a power system. Damping torque analysis reveals that when BESS damping control is realized by regulating exchange of active and reactive power between the BESS and power system respectively, BESS damping control exhibits different properties. It is concluded by damping torque analysis that BESS damping control implemented by regulating active power is better with less interaction with BESS voltage control and more robust to variations of power system operating conditions. In the paper, all analytical conclusions obtained are demonstrated by simulation results of example power systems.

Novel communication method between power converters for DC micro-grid applications

Communication between power converters is vital for high performance DC micro-grids controls. However, for residential DC micro-grid applications, using external communication link would increase the system cost, and reduce the system flexibility and reliability. This paper presents a novel method to enable the conventional DC/DC converters to transmit data via the common DC Bus. With this technology, cost-effective low bandwidth communication links between power converters can be established within a DC micro-grid, and advanced distributed control algorithms can be developed. A reliable communication with 2 kbps transmission rate has been implemented between the Boost converters through the common input DC bus.

Power Quality Improvement Using Interline Voltage Controller

The concept of an interline voltage controller (IVOLCON) to improve the power quality in a power distribution system is discussed. An IVOLCON consists of two shunt voltage source converters (VSCs) that are joined through a common dc bus. The VSCs are connected to two different feeders. The main aim of the IVOLCON is to control the PCC (Point of Common Coupling) bus voltages of the two feeders to pre-specified magnitudes. The phase angles of the PCC bus voltages are obtained such that the voltage across the common dc link remains constant. The structure, control and capability of the IVOLCON are described. The efficacy of the proposed configuration has been verified through simulation studies using PSCAD/EMTDC for voltage sags and feeder outage

A Grid Simulator to Evaluate Control Performance of Grid-Connected Inverters

Grid simulators are used to test the control performance of grid-connected inverters under a wide range of grid disturbance conditions. In the present work, a three phase back-to-back connected inverter sharing a common dc bus has been programmed as a grid simulator. Three phase balanced disturbance voltages applied to three-phase balanced loads has been considered in the present work. The developed grid simulator can generate three phase balanced voltage sags, voltage swells, frequency deviations and phase jumps. The grid simulator uses a novel disturbance generation algorithm. The algorithm allows the user to reference the disturbance to any of the three phases at any desired phase angle. Further, the exit of the disturbance condition can be referenced to the desired phase angle of any phase by adjusting the duration of the disturbance. The grid simulator hardware has been tested with different loads – a linear purely resistive load, a non-linear diode-bridge load and a grid-connected inverter load.

Common-Mode Injection PWM for Parallel Converters

The ac-side terminal voltages of parallel-connected converters are different if the line reactive drops of the individual converters are different. This could result either from differences in per-phase inductances or from differences in the line currents of the converters. In such cases, the modulating signals are different for the converters. Hence, the common-mode (CM) voltages for the converters, injected by conventional space vector pulsewidth modulation (CSVPWM) to increase dc-bus utilization, are different. Consequently, significant low-frequency zero-sequence circulating currents result. This paper proposes a new modulation method for parallel-connected converters with unequal terminal voltages. This method does not cause low-frequency zero-sequence circulating currents and is comparable with CSVPWM in terms of dc-bus utilization and device power loss. Experimental results are presented at a power level of 150 kVA from a circulating-power test setup, where the differences in converter terminal voltages are quite significant.

Direct power control with common mode voltage elimination for open-winding brushless doubly-fed wind power generators

In this paper, a new open-winding control strategy is proposed for a brushless doubly-fed reluctance generator (BDFRG) applicable for wind turbines. The BDFRG control winding is fed via a dual two-level three-phase converter using a single dc bus. Direct power control based on maximum power point tracking with common mode voltage elimination is designed, which not only the active and reactive power is decoupled, but the reliability and redundancy are all improved greatly by increasing the switching modes of operation, while DC-link voltage and rating of power devices decreased by 50% comparing to the traditional three-level converter systems. Consequently its effectiveness is evaluated by simulation tests based on a 42-kW prototype generator.

A DC circuit breaker for an electric vehicle battery pack

Electric vehicle battery packs require DC circuit breakers for safety. These must break thousands of Amps DC at hundreds of Volts. The Sunshark solar racing car has a 140V 17Ahr battery box which needs such a breaker. A static design using 200V MOSFETs to interrupt the fault current is presented. The design specification, decisions and proposed solution circuit are given. The current sensing technique,MOSFET overvoltage protection, and DC bus capacitor precharging scheme are specific focuses. Simulation results are presented and discussed.

Improving the penetration level of PVs using DC link for residential buildings

This paper proposes the use of a common DC link in residential buildings to allow customers to inject their surplus power that otherwise would be limited due to AC power quality violation. The surplus power can easily be transferred to other phases and feeders through common DC link in order to maintain the balance between generated power and load. PSCAD-EMTDC platform is used to simulate and study the proposed approach. This paper suggests that this structure can be a pathway to the future DC power systems.

Neutral-point balancing of neutral-point-clamped three-level inverter with a front end switched rectifier DC source for the full modulationn range

A switched rectifier DC voltage source three-level neutral-point-clamped (NPC) converter topology is proposed here to alleviate the inverter from capacitor voltage balancing in three-level drive systems. The proposed configuration requires only one DC link with a voltage of half of that needed in a conventional NPC inverter. To obtain a rated DC link voltage, the rectifier DC source is alternately connected in parallel to one of the two series capacitors using two switches and two diodes with device voltage ratings of half the total DC bus voltage. The frequency at which the voltage source is switched is independent of the inverter and will not affect its operation since the switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two-level inverter in the lower modulation index range, thereby increasing the reliability of the drivesystem. A space-vector-based PWM scheme is used to verify this proposed topology on a laboratory system.

Digital Dead Time Logic and Protection Circuitry for PWM Voltage Source Converters

Power semiconductor devices have finite turn on and turn off delays that may not be perfectly matched. In a leg of a voltage source converter, the simultaneous turn on of one device and the turn off of the complementary device will cause a DC bus shoot through, if the turn off delay is larger than the turn on delay time. To avoid this situation it is common practice to blank the two complementary devices in a leg for a small duration of time while switching, which is called dead time. This paper proposes a logic circuit for digital implementation required to control the complementary devices of a leg independently and at the same time preventing cross conduction of devices in a leg, and while providing accurate and stable dead time. This implementation is based on the concept of finite state machines. This circuit can also block improper PWM pulses to semiconductor switches and filters small pulses notches below a threshold time width as the narrow pulses do not provide any significant contribution to average pole voltage, but leads to increased switching loss. This proposed dead time logic has been implemented in a CPLD and is implemented in a protection and delay card for 3- power converters.

Experimental Investigation on the Effect of Advanced Bus-Clamping Pulsewidth Modulation on Motor Acoustic Noise

Voltage source inverters (VSIs) supply nonsinusoidal voltages to induction motor drives, leading to line current distortion and torque pulsation. Conventional space vector pulsewidth modulation (PWM) techniques are widely used in VSIs on the account of good waveform quality and high dc bus utilization. In a conventional space vector PWM technique, the switching sequence begins with one zero state and ends with the other zero state in a subcycle. Some novel switching sequences have been proposed, which employ only one zero state but apply one of the two active states twice in a subcycle. One pair of such special switching sequences has recently been shown to reduce the pulsating torque considerably. In this paper, the conventional and special switching sequences are compared experimentally in terms of acoustic noise. In the low-and medium-speed ranges, the special switching sequence is seen to reduce the amplitude of the tonal component of noise at the switching frequency considerably and is also found to result in spread spectrum.