Microelectromechanical torsional varactors with low parasitic capacitances and high dynamic range

This work focuses on the design of torsional microelectromechanical systems (MEMS) varactors to achieve highdynamic range of capacitances. MEMS varactors fabricated through the polyMUMPS process are characterized at low and high frequencies for their capacitance-voltage characteristics and electrical parasitics. The effect of parasitic capacitances on tuning ratio is studied and an equivalent circuit is developed. Two variants of torsional varactors that help to improve the dynamic range of torsional varactors despite the parasitics are proposed and characterized. A tuning ratio of 1:8, which is the highest reported in literature, has been obtained. We also demonstrate through simulations that much higher tuning ratios can be obtained with the designs proposed. The designs and experimental results presented are relevant to CMOS fabrication processes that use low resistivity substrate. (C) 2012 Society of Photo-Optical Instrumentation Engineers (SPIE). DOI: 10.1117/1.JMM.11.1.013006]

Dense carbon monoliths for supercapacitors with outstanding volumetric capacitances

A commercially available dense carbon monolith (CM) and four carbon monoliths obtained from it have been studied as electrochemical capacitor electrodes in a two-electrode cell. CM has: (i) very high density (1.17 g cm−3), (ii) high electrical conductivity (9.3 S cm−1), (iii) well-compacted and interconnected carbon spheres, (iv) homogeneous microporous structure and (v) apparent BET surface area of 957 m2g−1. It presents interesting electrochemical behaviors (e.g., excellent gravimetric capacitance and outstanding volumetric capacitance). The textural characteristics of CM (porosity and surface chemistry) have been modified by means of different treatments. The electrochemical performances of the starting and treated monoliths have been analyzed as a function of their porous textures and surface chemistry, both on gravimetric and volumetric basis. The monoliths present high specific and volumetric capacitances (292 F g−1 and 342 F cm−3), high energy densities (38 Wh kg−1 and 44 Wh L−1), and high power densities (176 W kg−1 and 183 W L−1). The specific and volumetric capacitances, especially the volumetric capacitance, are the highest ever reported for carbon monoliths. The high values are achieved due to a suitable combination of density, electrical conductivity, porosity and oxygen surface content.

The effect of linear loading capacitances upon the switching transient of colemanite.

"NAVORD report 5922, NOLC report 413."

Characteristics of small-signal capacitances of silicon-on-sapphire MOSFETs

The measured inter-electrode capacitances of silicon-on-sapphire (SOS) MOSFETs are presented and compared with simulation results. It is shown that the variations of capacitances with DC bias differ from those of bulk MOSFETs due to change in body potential variation of the SOS device resulting from electron-hole pair generation through impact ionisation.

End-winding effect on shalft voltage in AC generators

This paper presents effects of end-winding on shaft voltage in AC generators. A variety of design parameters have been considered to calculate the parasitic capacitive couplings in the machine structure with Finite Elements simulations and mathematical calculations. End-winding capacitances have also been calculated to have a precise estimation of shaft voltage and its relationship with design parameters in AC generators.

Calculations of capacitive couplings in induction generators to analyse shaft voltage

This paper deals with the analysis of the parameters which are effective in shaft voltage generation of induction generators. It focuses on different parasitic capacitive couplings by mathematical equations, finite element simulations and experiments. The effects of different design parameters have been studied on proposed capacitances and resultant shaft voltage. Some parameters can change proposed capacitive coupling such as: stator slot tooth, the gap between slot tooth and winding, and the height of the slot tooth, as well as the air gap between the rotor and the stator. This analysis can be used in a primary stage of a generator design to reduce motor shaft voltage and avoid additional costs of resultant bearing current mitigation.

Remediation strategies of shaft and common mode voltages in adjustable speed drive systems

AC motors are largely used in a wide range of modern systems, from household appliances to automated industry applications such as: ventilations systems, fans, pumps, conveyors and machine tool drives. Inverters are widely used in industrial and commercial applications due to the growing need for speed control in ASD systems. Fast switching transients and the common mode voltage, in interaction with parasitic capacitive couplings, may cause many unwanted problems in the ASD applications. These include shaft voltage and leakage currents. One of the inherent characteristics of Pulse Width Modulation (PWM) techniques is the generation of the common mode voltage, which is defined as the voltage between the electrical neutral of the inverter output and the ground. Shaft voltage can cause bearing currents when it exceeds the amount of breakdown voltage level of the thin lubricant film between the inner and outer rings of the bearing. This phenomenon is the main reason for early bearing failures. A rapid development in power switches technology has lead to a drastic decrement of switching rise and fall times. Because there is considerable capacitance between the stator windings and the frame, there can be a significant capacitive current (ground current escaping to earth through stray capacitors inside a motor) if the common mode voltage has high frequency components. This current leads to noises and Electromagnetic Interferences (EMI) issues in motor drive systems. These problems have been dealt with using a variety of methods which have been reported in the literature. However, cost and maintenance issues have prevented these methods from being widely accepted. Extra cost or rating of the inverter switches is usually the price to pay for such approaches. Thus, the determination of cost-effective techniques for shaft and common mode voltage reduction in ASD systems, with the focus on the first step of the design process, is the targeted scope of this thesis. An introduction to this research – including a description of the research problem, the literature review and an account of the research progress linking the research papers – is presented in Chapter 1. Electrical power generation from renewable energy sources, such as wind energy systems, has become a crucial issue because of environmental problems and a predicted future shortage of traditional energy sources. Thus, Chapter 2 focuses on the shaft voltage analysis of stator-fed induction generators (IG) and Doubly Fed Induction Generators DFIGs in wind turbine applications. This shaft voltage analysis includes: topologies, high frequency modelling, calculation and mitigation techniques. A back-to-back AC-DC-AC converter is investigated in terms of shaft voltage generation in a DFIG. Different topologies of LC filter placement are analysed in an effort to eliminate the shaft voltage. Different capacitive couplings exist in the motor/generator structure and any change in design parameters affects the capacitive couplings. Thus, an appropriate design for AC motors should lead to the smallest possible shaft voltage. Calculation of the shaft voltage based on different capacitive couplings, and an investigation of the effects of different design parameters are discussed in Chapter 3. This is achieved through 2-D and 3-D finite element simulation and experimental analysis. End-winding parameters of the motor are also effective factors in the calculation of the shaft voltage and have not been taken into account in previous reported studies. Calculation of the end-winding capacitances is rather complex because of the diversity of end winding shapes and the complexity of their geometry. A comprehensive analysis of these capacitances has been carried out with 3-D finite element simulations and experimental studies to determine their effective design parameters. These are documented in Chapter 4. Results of this analysis show that, by choosing appropriate design parameters, it is possible to decrease the shaft voltage and resultant bearing current in the primary stage of generator/motor design without using any additional active and passive filter-based techniques. The common mode voltage is defined by a switching pattern and, by using the appropriate pattern; the common mode voltage level can be controlled. Therefore, any PWM pattern which eliminates or minimizes the common mode voltage will be an effective shaft voltage reduction technique. Thus, common mode voltage reduction of a three-phase AC motor supplied with a single-phase diode rectifier is the focus of Chapter 5. The proposed strategy is mainly based on proper utilization of the zero vectors. Multilevel inverters are also used in ASD systems which have more voltage levels and switching states, and can provide more possibilities to reduce common mode voltage. A description of common mode voltage of multilevel inverters is investigated in Chapter 6. Chapter 7 investigates the elimination techniques of the shaft voltage in a DFIG based on the methods presented in the literature by the use of simulation results. However, it could be shown that every solution to reduce the shaft voltage in DFIG systems has its own characteristics, and these have to be taken into account in determining the most effective strategy. Calculation of the capacitive coupling and electric fields between the outer and inner races and the balls at different motor speeds in symmetrical and asymmetrical shaft and balls positions is discussed in Chapter 8. The analysis is carried out using finite element simulations to determine the conditions which will increase the probability of high rates of bearing failure due to current discharges through the balls and races.

Analysis Of The Energy Quantization Effects On Single Electron Inverter Performance Through Noise Margin Modeling

Possible integration of Single Electron Transistor (SET) with CMOS technology is making the study of semiconductor SET more important than the metallic SET and consequently, the study of energy quantization effects on semiconductor SET devices and circuits is gaining significance. In this paper, for the first time, the effects of energy quantization on SET inverter performance are examined through analytical modeling and Monte Carlo simulations. It is observed that the primary effect of energy quantization is to change the Coulomb Blockade region and drain current of SET devices and as a result affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. It is shown that SET inverter designed with CT : CG = 1/3 (where CT and CG are tunnel junction and gate capacitances respectively) offers maximum robustness against energy quantization.

Modeling and analysis of energy quantization effects on single electron inverter performance

In this paper, for the first time, the effects of energy quantization on single electron transistor (SET) inverter performance are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantization mainly changes the Coulomb blockade region and drain current of SET devices and thus affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new analytical model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. A compact expression is developed for a novel parameter quantization threshold which is introduced for the first time in this paper. Quantization threshold explicitly defines the maximum energy quantization that an SET inverter logic circuit can withstand before its noise margin falls below a specified tolerance level. It is found that SET inverter designed with CT:CG=1/3 (where CT and CG are tunnel junction and gate capacitances, respectively) offers maximum robustness against energy quantization.

Measurement of dielectric constant of conducting liquids

A ratio transformer method suitable for the measurement of the dielectric constant of highly conducting liquids is described. The resistance between the two plates of the capacitor can be as low as 2 k Omega . In this method variations in this low resistance will not give any error in capacitance measurement. One of the features of this method is the simplicity in balancing the resistance, using a LDR (light dependent resistor), without influencing the independent capacitance measurement. The ratio transformer enables the ground capacitances to be eliminated. The change in leakage inductance of the ratio transformer while changing the ratios is also taken into account. The capacitance of a dielectric cell of the order of 50 pF can be measured from 1000 Hz to 100 kHz with a resolution of 0.06 pF. The electrode polarisation problem is also discussed.

Assessment of SET Logic Robustness Through Noise Margin Modeling

A compact model for noise margin (NM) of single-electron transistor (SET) logic is developed, which is a function of device capacitances and background charge (zeta). Noise margin is, then, used as a metric to evaluate the robustness of SET logic against background charge, temperature, and variation of SET gate and tunnel junction capacitances (CG and CT). It is shown that choosing alpha=CT/CG=1/3 maximizes the NM. An estimate of the maximum tolerable zeta is shown to be equal to plusmn0.03 e. Finally, the effect of mismatch in device parameters on the NM is studied through exhaustive simulations, which indicates that a isin [0.3, 0.4] provides maximum robustness. It is also observed that mismatch can have a significant impact on static power dissipation.

Exfoliated graphite–ruthenium oxide composite electrodes for electrochemical supercapacitors

The performance of exfoliated graphite (EG)–ruthenium oxide (RuOx) composites as binderless electrodes is evaluated for electrochemical capacitors (ECs). A composite of EG–RuOx is prepared by a modified sol–gel process. The material is characterized using X-ray diffraction and microscopy. Electrochemical capacitors with the composite electrodes in the presence of aqueous sulfuric acid (H2SO4) electrolyte are evaluated using voltammetry, impedance and charge–discharge studies. Cyclic voltammetry reveals very stable current–voltage behaviour up to several thousands of cycles, as well as high specific capacitances, e.g., a few hundreds of farads per gram for the composite that contains 16.5 wt.% RuOx.