Analog/RF Built-in-Self-Test Subsystem for a Mobile Broadcast Video Receiver in 65-nm CMOS

A built-in-self-test (BIST) subsystem embedded in a 65-nm mobile broadcast video receiver is described. The subsystem is designed to perform analog and RF measurements at multiple internal nodes of the receiver. It uses a distributed network of CMOS sensors and a low bandwidth, 12-bit A/D converter to perform the measurements with a serial bus interface enabling a digital transfer of measured data to automatic test equipment (ATE). A perturbation/correlation based BIST method is described, which makes pass/fail determination on parts, resulting in significant test time and cost reduction.

Time-Based All-Digital Technique for Analog Built-in Self-Test

A scheme for built-in self-test of analog signals with minimal area overhead for measuring on-chip voltages in an all-digital manner is presented. The method is well suited for a distributed architecture, where the routing of analog signals over long paths is minimized. A clock is routed serially to the sampling heads placed at the nodes of analog test voltages. This sampling head present at each test node, which consists of a pair of delay cells and a pair of flip-flops, locally converts the test voltage to a skew between a pair of subsampled signals, thus giving rise to as many subsampled signal pairs as the number of nodes. To measure a certain analog voltage, the corresponding subsampled signal pair is fed to a delay measurement unit to measure the skew between this pair. The concept is validated by designing a test chip in a UMC 130-nm CMOS process. Sub-millivolt accuracy for static signals is demonstrated for a measurement time of a few seconds, and an effective number of bits of 5.29 is demonstrated for low-bandwidth signals in the absence of sample-and-hold circuitry.

Board-level prototype validation: a built-in controller and extended BST architecture

Prototype validation is a major concern in modern electronic product design and development. Simulation, structural test, functional and timing debug are all forming parts of the validation process, although very often addressed as dissociated tasks. In this paper we describe an integrated approach to board-level prototype validation, based on a set of mandatory/optional BST instructions and a built-in controller for debug and test, that addresses the late mentioned tasks as inherent parts of a whole process

Quantum-confined Stark effect and built-in dipole moment in self-assembled InAs/GaAs quantum dots

Quantum-confined Stark effect and built-in dipole moment in self-assembled InAs/GaAs quantum dots (QDs), which are grown at relative low temperature (460degreesC) and embedded in GaAs p-i-n structure, have been studied by dc-biased electroreflectance. Franz-Keldysh oscillations from the undoped GaAs layer are used to determine the electric field under various bias voltages. Stark shift of -34 meV for the ground-state interband transition of the QDs is observed when the electric field increases from 105 to 308 kV/cm. The separation of the electron and hole states in the growth direction of 0.4 nm, corresponding to the built-in dipole moment of 6.4x10(-29) C m, is determined. It is found that the electron state lies above that of the hole, which is the same as that predicted by theoretical calculations for ideal pyramidal InAs QDs. (C) 2004 American Institute of Physics.

Can nuclear power plants be built in Britain without public subsidies and guarantees?

This report examines the credibility of the claim by the UK government that nuclear power plants can be built in the UK without public subsidies and guarantees

Changes in test scores distribution for students of the fourth grade in Brazil: a relative distribution analysis for the years 1997 to 2005

To assess the quality of school education, much of educational research is concerned with comparisons of test scores means or medians. In this paper, we shift this focus and explore test scores data by addressing some often neglected questions. In the case of Brazil, the mean of test scores in Math for students of the fourth grade has declined approximately 0,2 standard deviation in the late 1990s. But what about changes in the distribution of scores? It is unclear whether the decline was caused by deterioration in student performance in upper and/or lower tails of the distribution. To answer this question, we propose the use of the relative distribution method developed by Handcock and Morris (1999). The advantage of this methodology is that it compares two distributions of test scores data through a single distribution and synthesizes all the differences between them. Moreover, it is possible to decompose the total difference between two distributions in a level effect (changes in median) and shape effect (changes in shape of the distribution). We find that the decline of average-test scores is mainly caused by a worsening in the position of all students throughout the distribution of scores and is not only specific to any quantile of distribution.

A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication

An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor, in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2 x 2-memory array was prototyped according to a standard 0.8 mum n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 muA less than or equal to I-SAMPLE less than or equal to 0.75 muA. Standby consumption is 6.75 muW per cell @I-SAMPLE = 0.75 muA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x(max) = 320 mV(pp) and 2y(max). = 448 mV(pp), yielding a maximum output swing of 0.9 muA(pp). 4QM worst-case nonlinearity is 7.9%.

An accurate low-voltage analog memory-cell with built-in multiplication

A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced output-resistance improves accuracy on reading out the sampled currents. Additionally, a four-quadrant multiplication between the input to regulation-amplifier of the transconductor and the stored voltage is provided. Designing complies with a low-voltage 1.2μm N-well CMOS fabrication process. For a 1.3V-supply, CCELL=3.6pF and sampling interval is 0.25μA≤ ISAMPLE ≤ 0.75μA. The specified retention time is 1.28ms and corresponds to a charge-variation of 1% due to junction leakage @75°C. A range of MR simulations confirm circuit performance. Absolute read-out error is below O.40% while the four-quadrant multiplier nonlinearity, at full-scale is 8.2%. Maximum stand-by consumption is 3.6μW/cell.

Progress made by Caribbean countries in the WTO built-in agenda on services and intellectual property rights

Includes bibliography

The role of self-control strength in the development of state anxiety in test situations

Self-control strength may affect state anxiety because emotion regulation is impaired in individuals whose self-control strength has been temporarily depleted. Increases in state anxiety were expected to be larger for participants with depleted compared to nondepleted self-control strength, and trait test anxiety should predict increases in state anxiety more strongly if self-control strength is depleted. In a sample of 76 university students, trait test anxiety was assessed, self-control strength experimentally manipulated, and state anxiety measured before and after the announcement of a test. State anxiety increased after the announcement. Trait test anxiety predicted increases in state anxiety only in students with depleted self-control strength, suggesting that increased self-control strength may be useful for coping with anxiety.

A methodology to measure the interface shear strength by means of the fiber push-in test

A methodology is presented to measure the fiber/matrix interface shear strength in composites. The strategy is based on performing a fiber push-in test at the central fiber of highly-packed fiber clusters with hexagonal symmetry which are often found in unidirectional composites with a high volume fraction of fibers. The mechanics of this test was analyzed in detail by means of three-dimensional finite element simulations. In particular, the influence of different parameters (interface shear strength, toughness and friction as well as fiber longitudinal elastic modulus and curing stresses) on the critical load at the onset of debonding was established. From the results of the numerical simulations, a simple relationship between the critical load and the interface shear strength is proposed. The methodology was validated in an unidirectional C/epoxy composite and the advantages and limitations of the proposed methodology are indicated.

A built-in CMOS Total Ionization Dose smart sensor

Total Ionization Dose (TID) is traditionally measured by radiation sensitive FETs (RADFETs) that require a radiation hardened Analog-to-Digital Converter (ADC) stage. This work introduces a TID sensor based on a delay path whose propagation time is sensitive to the absorbed radiation. It presents the following advantages: it is a digital sensor able to be integrated in CMOS circuits and programmable systems such as FPGAs; it has a configurable sensitivity that allows to use this device for radiation doses ranging from very low to relatively high levels; its interface helps to integrate this sensor in a multidisciplinary sensor network; it is self-timed, hence it does not need a clock signal that can degrade its accuracy. The sensor has been prototyped in a 0.35μm technology, has an area of 0.047mm2, of which 22% is dedicated to measuring radiation, and an energy per conversion of 463pJ. Experimental irradiation tests have validated the correct response of the proposed TID sensor.

Insertion of impairments in test video sequences for quality assessment based on psychovisual characteristics

Assessing video quality is a complex task. While most pixel-based metrics do not present enough correlation between objective and subjective results, algorithms need to correspond to human perception when analyzing quality in a video sequence. For analyzing the perceived quality derived from concrete video artifacts in determined region of interest we present a novel methodology for generating test sequences which allow the analysis of impact of each individual distortion. Through results obtained after subjective assessment it is possible to create psychovisual models based on weighting pixels belonging to different regions of interest distributed by color, position, motion or content. Interesting results are obtained in subjective assessment which demonstrates the necessity of new metrics adapted to human visual system.