Analog VLSI-based, neuromorphic sensorimotor systems: modeling the primate oculomotor system

Using neuromorphic analog VLSI techniques for modeling large neural systems has several advantages over software techniques. By designing massively-parallel analog circuit arrays which are ubiquitous in neural systems, analog VLSI models are extremely fast, particularly when local interactions are important in the computation. While analog VLSI circuits are not as flexible as software methods, the constraints posed by this approach are often very similar to the constraints faced by biological systems. As a result, these constraints can offer many insights into the solutions found by evolution. This dissertation describes a hardware modeling effort to mimic the primate oculomotor system which requires both fast sensory processing and fast motor control. A one-dimensional hardware model of the primate eye has been built which simulates the physical dynamics of the biological system. It is driven by analog VLSI circuits mimicking brainstem and cortical circuits that control eye movements. In this framework, a visually-triggered saccadic system is demonstrated which generates averaging saccades. In addition, an auditory localization system, based on the neural circuits of the barn owl, is used to trigger saccades to acoustic targets in parallel with visual targets. Two different types of learning are also demonstrated on the saccadic system using floating-gate technology allowing the non-volatile storage of analog parameters directly on the chip. Finally, a model of visual attention is used to select and track moving targets against textured backgrounds, driving both saccadic and smooth pursuit eye movements to maintain the image of the target in the center of the field of view. This system represents one of the few efforts in this field to integrate both neuromorphic sensory processing and motor control in a closed-loop fashion.

Influence of 60-MeV Proton-Irradiation on Standard and Strained n- and p-Channel MuGFETs

In this work the proton irradiation influence on Multiple Gate MOSFETs (MuGFETs) performance is investigated. This analysis was performed through basic and analog parameters considering four different splits (unstrained, uniaxial, biaxial, uniaxial+biaxial). Although the influence of radiation is more pronounced for p-channel devices, in pMuGFETs devices, the radiation promotes a higher immunity to the back interface conduction resulting in the analog performance improvement. On the other hand, the proton irradiation results in a degradation of the post-irradiated n-channel transistors behavior. The unit gain frequency showed to be strongly dependent on stress efficiency and the radiation results in an increase of the unit gain frequency for splits with high stress effectiveness for both cases p- and nMuGFETs.

Estudo de transistores de tunelamento induzido por efeito de campo (TFET) construídos em nanofio.

Esse trabalho de mestrado teve como estudo o transistor Túnel-FET (TFET) fabricado em estrutura de nanofio de silício. Este estudo foi feito de forma teórica (simulação numérica) e experimental. Foram estudadas as principais características digitais e analógicas do dispositivo e seu potencial para uso em circuitos integrados avançados para a próxima década. A análise foi feita através da extração experimental e estudo dos principais parâmetros do dispositivo, tais como inclinação de sublimiar, transcondutância (gm), condutância de saída (gd), ganho intrínseco de tensão (AV) e eficiência do transistor. As medidas experimentais foram comparadas com os resultados obtidos pela simulação. Através do uso de diferentes parâmetros de ajuste e modelos de simulação, justificou-se o comportamento do dispositivo observado experimentalmente. Durante a execução deste trabalho estudou-se a influência da escolha do material de fonte no desempenho do dispositivo, bem como o impacto do diâmetro do nanofio nos principais parâmetros analógicos do transistor. Os dispositivos compostos por fonte de SiGe apresentaram valores maiores de gm e gd do que aqueles compostos por fonte de silício. A diferença percentual entre os valores de transcondutância para os diferentes materiais de fonte variou de 43% a 96%, sendo dependente do método utilizado para comparação, e a diferença percentual entre os valores de condutância de saída variou de 38% a 91%. Observou-se também uma degradação no valor de AV com a redução do diâmetro do nanofio. O ganho calculado a partir das medidas experimentais para o dispositivo com diâmetro de 50 nm é aproximadamente 45% menor do que o correspondente ao diâmetro de 110 nm. Adicionalmente estudou-se o impacto do diâmetro considerando diferentes polarizações de porta (VG) e concluiu-se que os TFETs apresentam melhor desempenho para baixos valores de VG (houve uma redução de aproximadamente 88% no valor de AV com o aumento da tensão de porta de 1,25 V para 1,9 V). A sobreposição entre porta e fonte e o perfil de dopantes na junção de tunelamento também foram analisados a fim de compreender qual combinação dessas características resultariam em um melhor desempenho do dispositivo. Observou-se que os melhores resultados estavam associados a um alinhamento entre o eletrodo de porta e a junção entre fonte e canal e a um perfil abrupto de dopantes na junção. Por fim comparou-se a tecnologia MOS com o TFET, obtendo-se como resultado um maior valor de AV (maior do que 40 dB) para o TFET.

Caracterização elétrica de túnel-FET em estrutura de nanofio com fontes de SiGe e Ge em função da temperatura.

Este trabalho teve como objetivo estudar os transistores de tunelamento por efeito de campo em estruturas de nanofio (NW-TFET), sendo realizado através de analises com base em explicações teóricas, simulações numéricas e medidas experimentais. A fim de avaliar melhorar o desempenho do NW-TFET, este trabalho utilizou dispositivos com diferentes materiais de fonte, sendo eles: Si, liga SiGe e Ge, além da variação da espessura de HfO2 no material do dielétrico de porta. Com o auxílio de simulações numéricas foram obtidos os diagramas de bandas de energia dos dispositivos NW-TFET com fonte de Si0,73Ge0,27 e foi analisada a influência de cada um dos mecanismos de transporte de portadores para diversas condições de polarização, sendo observado a predominância da influência da recombinação e geração Shockley-Read-Hall (SRH) na corrente de desligamento, do tunelamento induzido por armadilhas (TAT) para baixos valores de tensões de porta (0,5V > VGS > 1,5V) e do tunelamento direto de banda para banda (BTBT) para maiores valores tensões de porta (VGS > 1,5V). A predominância de cada um desses mecanismos de transporte foi posteriormente comprovada com a utilização do método de Arrhenius, sendo este método adotado em todas as análises do trabalho. O comportamento relativamente constante da corrente dos NW-TFETs com a temperatura na região de BTBT tem chamado a atenção e por isso foi realizado o estudo dos parâmetros analógicos em função da temperatura. Este estudo foi realizado comparando a influência dos diferentes materiais de fonte. O uso de Ge na fonte, permitiu a melhora na corrente de tunelamento, devido à sua menor banda proibida, aumentando a corrente de funcionamento (ION) e a transcondutância do dispositivo. Porém, devido à forte dependência de BTBT com o campo elétrico, o uso de Ge na fonte resulta em uma maior degradação da condutância de saída. Entretanto, a redução da espessura de HfO2 no dielétrico de porta resultou no melhor acoplamento eletrostático, também aumentando a corrente de tunelamento, fazendo com que o dispositivo com fonte Ge e menor HfO2 apresentasse melhores resultados analógicos quando comparado ao puramente de Si. O uso de diferentes materiais durante o processo de fabricação induz ao aumento de defeitos nas interfaces do dispositivo. Ao longo deste trabalho foi realizado o estudo da influência da densidade de armadilhas de interface na corrente do dispositivo, demonstrando uma relação direta com o TAT e a formação de uma região de platô nas curvas de IDS x VGS, além de uma forte dependência com a temperatura, aumentando a degradação da corrente para temperaturas mais altas. Além disso, o uso de Ge introduziu maior número de impurezas no óxido, e através do estudo de ruído foi observado que o aumento na densidade de armadilhas no óxido resultou no aumento do ruído flicker em baixa frequência, que para o TFET, ocorre devido ao armadilhamento e desarmadilhamento de elétrons na região do óxido. E mais uma vez, o melhor acoplamento eletrostático devido a redução da espessura de HfO2, resultou na redução desse ruído tornando-se melhor quando comparado à um TFET puramente de Si. Neste trabalho foi proposto um modelo de ruído em baixa frequência para o NW-TFET baseado no modelo para MOSFET. Foram realizadas apenas algumas modificações, e assim, obtendo uma boa concordância com os resultados experimentais na região onde o BTBT é o mecanismo de condução predominante.

Conformation of a 16-residue zervamicin IIA analog peptide containing three different structural features: 310-helix, alpha helix and ß-bend ribbon

Boc-Trp-Ile-Ala-Aib-Ile-Val-Aib-Leu-Aib- Pro-Ala-Aib-Pro-Aib-Pro-Phe-OM(we here Boc is t-butoxycarbonyla nd Aib is a-aminoisobutyriac cid), a synthetica polar analog of the membrane-activefu ngal peptide antibioticz ervamtycinII A, crystallizesi n spaceg roupP 1 withZ =1 and cell parameters a = 9.086 ?0.002 A, b = 10.410 ?+ 0.002 A, c = 28.188 ? 0.004 A, a = 86.13 ? 0.01?, 13 = 87.90 ? 0.01?, and y = 89.27 ? 0.01?;o veralla greementf actorR = 7.3% for 7180 data (Fo > 3cr) and 0.91-A resolution. The peptide backbone makes a continuous spiral that begins as a 310-helix at the N-terminus, changes to an a-helix for two turns, and ends in a spiral of three fl-bends in a ribbon. Each of the fl-bends contains a proline residue at one of the corners. The torsion angles 4i range from -51? to -91? (average value -64o), and the torsion angles ai range from -1? to -46? (average value -31?). There are 10 intramolecularN H...OCh ydrogenb onds in the helix and two directh ead-to-taihl ydrogenb ondsb etween successive molecules. Two H20 and two CH30H solvent molecules fill additional space with appropriate hydrogen bonding in the head-to-tail region, and two additional H20 molecules form hydrogen bonds with carbonyl oxygens near the curve in the helix at Pro-10. Since there is only one peptide molecule per cell in space group P1, the molecules repeat only by translation, and consequently the helices pack parallel to each other.

Impedance parameters and the state-of-charge. II. Lead-acid battery

The determination of the state-of-charge of the lead-acid battery has been examined from the viewpoint of internal impedance. It is shown that the impedance is controlled by charge transfer and to a smaller extent by diffusion processes in the frequency range 15–100 Hz. The equivalent series/parallel capacitance as well as the a.c. phase-shift show a parabolic dependence upon the state-of-charge, with a maximum or minimum at 50% charge. These results are explained on the basis of a uniform transmission-line analog equivalent circuit for the battery electrodes.

Impedance parameters and the state-of charge. I. Nickel-cadmium battery

The problem of nondestructive determination of the state-of-charge of nickel-cadmium batteries has been examined experimentally as well as theoretically from the viewpoint of internal impedance. It is shown that the modulus of the impedance is mainly controlled by diffusion at all states of charge. Even so, a prediction of the state of charge is possible if the equivalent series/parallel capacitance or the alternating current phase shift is measured at a sufficiently low a.c. test frequency (5–30 Hz) which also avoids inductive effects. These results are explained on the basis of a uniform transmission-line analog equivalent circuit for the battery electrodes.

Polynomial Coefficient Based Multi-Tone Testing of Analog Circuits

Abstract—A method of testing for parametric faults of analog circuits based on a polynomial representaion of fault-free function of the circuit is presented. The response of the circuit under test (CUT) is estimated as a polynomial in the applied input voltage at relevant frequencies apart from DC. Classification of CUT is based on a comparison of the estimated polynomial coefficients with those of the fault free circuit. The method needs very little augmentation of circuit to make it testable as only output parameters are used for classification. This procedure is shown to uncover several parametric faults causing smaller than 5 % deviations the nominal values. Fault diagnosis based upon sensitivity of polynomial coefficients at relevant frequencies is also proposed.

V-Transform: “An Enhanced Polynomial Coefficient Based DC Test for Non-linear Analog Circuits

Abstract—DC testing of parametric faults in non-linear analog circuits based on a new transformation, entitled, V-Transform acting on polynomial coefficient expansion of the circuit function is presented. V-Transform serves the dual purpose of monotonizing polynomial coefficients of circuit function expansion and increasing the sensitivity of these coefficients to circuit parameters. The sensitivity of V-Transform Coefficients (VTC) to circuit parameters is up to 3x-5x more than sensitivity of polynomial coefficients. As a case study, we consider a benchmark elliptic filter to validate our method. The technique is shown to uncover hitherto untestable parametric faults whose sizes are smaller than 10 % of the nominal values. I.

Device oriented statistical modeling method for process variability in 45nm analog CMOS technology

With the rapid scaling down of the semiconductor process technology, the process variation aware circuit design has become essential today. Several statistical models have been proposed to deal with the process variation. We propose an accurate BSIM model for handling variability in 45nm CMOS technology. The MOSFET is designed to meet the specification of low standby power technology of International Technology Roadmap for Semiconductors (ITRS).The process parameters variation of annealing temperature, oxide thickness, halo dose and title angle of halo implant are considered for the model development. One parameter variation at a time is considered for developing the model. The model validation is done by performance matching with device simulation results and reported error is less than 10%.© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

An Analog VLSI Chip for Estimating the Focus of Expansion

For applications involving the control of moving vehicles, the recovery of relative motion between a camera and its environment is of high utility. This thesis describes the design and testing of a real-time analog VLSI chip which estimates the focus of expansion (FOE) from measured time-varying images. Our approach assumes a camera moving through a fixed world with translational velocity; the FOE is the projection of the translation vector onto the image plane. This location is the point towards which the camera is moving, and other points appear to be expanding outward from. By way of the camera imaging parameters, the location of the FOE gives the direction of 3-D translation. The algorithm we use for estimating the FOE minimizes the sum of squares of the differences at every pixel between the observed time variation of brightness and the predicted variation given the assumed position of the FOE. This minimization is not straightforward, because the relationship between the brightness derivatives depends on the unknown distance to the surface being imaged. However, image points where brightness is instantaneously constant play a critical role. Ideally, the FOE would be at the intersection of the tangents to the iso-brightness contours at these "stationary" points. In practice, brightness derivatives are hard to estimate accurately given that the image is quite noisy. Reliable results can nevertheless be obtained if the image contains many stationary points and the point is found that minimizes the sum of squares of the perpendicular distances from the tangents at the stationary points. The FOE chip calculates the gradient of this least-squares minimization sum, and the estimation is performed by closing a feedback loop around it. The chip has been implemented using an embedded CCD imager for image acquisition and a row-parallel processing scheme. A 64 x 64 version was fabricated in a 2um CCD/ BiCMOS process through MOSIS with a design goal of 200 mW of on-chip power, a top frame rate of 1000 frames/second, and a basic accuracy of 5%. A complete experimental system which estimates the FOE in real time using real motion and image scenes is demonstrated.

Design and optimization of FinFETs for ultra-low-voltage analog applications

In this paper, we analyze the enormous potential of engineering source/drain extension (SDE) regions in FinFETs for ultra-low-voltage (ULV) analog applications. SDE region design can simultaneously improve two key analog figures of merit (FOM)-intrinsic de gain (A(vo)) and cutoff frequency (f(T)) for 60 and 30 nm FinFETs operated at low drive current (J(ds) = 5 mu A/mu m). The improved Avo and fT are nearly twice compared to those of devices with abrupt SDE regions. The influence of the SDE region profile and its impact on analog FOM is extensively analyzed. Results show that SDE region optimization provides an additional degree of freedom apart from device parameters (fin width and aspect ratio) to design future nanoscale analog devices. The results are analyzed in terms of spacer-to-straggle ratio a new design parameter for SDE engineered devices. This paper provides new opportunities for realizing future ULV/low-power analog design with FinFETs.

Analog performance of double gate SOI transistors

Double gate fully depleted silicon-on-insulator (DGSOI) is recognized as a possible solution when the physical gate length L-G reduces to 25nm for the 65nm node on the ITRS CMOS roadmap. In this paper, scaling guidelines are introduced to optimally design a nanoscale DGSOI. For this reason, the sensitivity of gain, f(T) and f(max) to each of the key geometric and technological parameters of the DGSOI are assessed and quantified using MixedMode simulation. The impact of the parasitic resistance and capacitance on analog device performance is systematically analysed. By comparing analog performance with a single gate (SG), it has been found that intrinsic gain in DGSOI is 4 times higher but its fT was found to be comparable to that of SGSOI at different regions of transistor operation. However, the extracted fmax in SG SOI was higher (similar to 40%) compared to DGSOI due to its lower capacitance.

On Passive Intermodulation Test of Analog and Digital Systems

This paper presents initial results of evaluating suitability of the conventional two-tone CW passive intermodulation (PIM) test for characterization of modulated signal distortion by passive nonlinearities in base station antennas and RF front-end. A comprehensive analysis of analog and digitally modulated waveforms in the transmission lines with weak distributed nonlinearity has been performed using the harmonic balance analysis and X-parameters in Advanced Design System (ADS) simulator. The nonlinear distortion metrics used in the conventional two-tone CW PIM test have been compared with the respective spectral metrics applied to the modulated waveforms, such as adjacent channel power ratio (ACPR) and error vector magnitude (EVM). It is shown that the results of two-tone CW PIM tests are consistent with the metrics used for assessment of signal integrity of both analog and digitally modulated waveforms.

Rheology of magmas with bimodal crystal size and shape distributions: insights from analog experiments

Magmas in volcanic conduits commonly contain microlites in association with preexisting phenocrysts, as often indicated by volcanic rock textures. In this study, we present two different experiments that inves- tigate the flow behavior of these bidisperse systems. In the first experiments, rotational rheometric methods are used to determine the rheology of monodisperse and polydisperse suspensions consisting of smaller, prolate particles (microlites) and larger, equant particles (phenocrysts) in a bubble‐free Newtonian liquid (silicate melt). Our data show that increasing the relative proportion of prolate microlites to equant pheno- crysts in a magma at constant total particle content can increase the relative viscosity by up to three orders of magnitude. Consequently, the rheological effect of particles in magmas cannot be modeled by assuming a monodisperse population of particles. We propose a new model that uses interpolated parameters based on the relative proportions of small and large particles and produces a considerably improved fit to the data than earlier models. In a second series of experiments we investigate the textures produced by shearing bimodal suspensions in gradually solidifying epoxy resin in a concentric cylinder setup. The resulting textures show the prolate particles are aligned with the flow lines and spherical particles are found in well‐organized strings, with sphere‐depleted shear bands in high‐shear regions. These observations may explain the measured variation in the shear thinning and yield stress behavior with increasing solid fraction and particle aspect ratio. The implications for magma flow are discussed, and rheological results and tex- tural observations are compared with observations on natural samples.