The comparative analysis of the energies of conjugated triple base triplets and their applications

We built 64 sets of 3D models of DNA triplex base triplets (TBT) and minimized their energies. The TBTs were divided into 32 pairs of conjugated ones on the basis of their sequence characteristic, and the energies of each pair of them were compared and analyzed, the results showed: (i) The duplex DNA of which any strand contains at least a couple of A or T, has a preference for selecting the oligodeoxyribonucleic acid (ODN) strand containing abundant T to form TBT. (ii) The duplex DNA of which any strand contains at least a couple of G or C has a preference for selecting ODN containing abundant G to form symmetric antiparallel TBT, but selecting ODN containing abundant C to form asymmetric parallel TBT. (iii) The duplex DNA of which any strand contains only one of A, T, G or C has a preference for selecting ODN containing abundant pyrimidines (T or C) to form antiparallel TBT. Additionally, two examples of TBTs applications, in designing ODN to form triplex with duplex were presented. The energy calculation result revealed that 15-TCG is the best ligand of the HIV PPT duplex. The comparative analysis of energies of the conjugated TBTs provides directive significance for designing ODN strand that is easy to form triplex in theory. (C) 2002 Elsevier Science B.V. All rights reserved.

Superconducting fault current limiter design using parallel-connected YBCO thin films

Superconducting Fault Current Limiters (SFCLs) are able to reduce fault currents to an acceptable value, reducing potential mechanical and thermal damage to power system apparatus and allowing more flexibility in power system design and operation. The device can also help avoid replacing circuit breakers whose capacity has been exceeded. Due to limitations in current YBCO thin film manufacturing processes, it is not easy to obtain one large thin film that satisfies the specifications for high voltage and large current applications. The combination of standardized thin films has merit to reduce costs and maintain device quality, and it is necessary to connect these thin films in different series and parallel configurations in order to meet these specifications. In this paper, the design of a resistive type SFCL using parallel-connected YBCO thin films is discussed, including the role of a parallel resistor and the influence of individual thin film characteristics, based on both theory and experimental results. © 2009 IEEE.

Experimental investigation of quench phenomena in YBCO thin films for SFCL applications

Superconducting Fault Current Limiters (SFCLs) are regarded as key components for modern power systems. The progress in the development of YBCO thin films opens new perspectives in the design of these devices. In this paper, the quenching phenomenon in YBCO thin films is investigated experimentally, in order to gain the proper technical know-how suitable for the design of resistive type SFCLs. In particular, the origin of the quenching, as well as the propagation dynamics within a YBCO tape, is investigated for different input current waveforms. The role of a parallel-connected protective resistance on the quench dynamic is also studied. © 2009 IEEE.

Carbon nanotubes for field emission applications

This paper will cover several applications of a particular type of field emitter- the carbon nanotube (CNT). The growth of CNTs and their optimization for use in various applications including, parallel e-beam lithography, field emission displays and microwave sources, is considered. © 2012 IEEE.

A programmable SIMD vision chip for real-time vision applications

A programmable vision chip for real-time vision applications is presented. The chip architecture is a combination of a SIMD processing element array and row-parallel processors, which can perform pixel-parallel and row-parallel operations at high speed. It implements the mathematical morphology method to carry out low-level and mid-level image processing and sends out image features for high-level image processing without I/O bottleneck. The chip can perform many algorithms through software control. The simulated maximum frequency of the vision chip is 300 MHz with 16 x 16 pixels resolution. It achieves the rate of 1000 frames per second in real-time vision. A prototype chip with a 16 x 16 PE array is fabricated by the 0.18 mu m standard CMOS process. It has a pixel size of 30 mu m x 40 mu m and 8.72 mW power consumption with a 1.8 V power supply. Experiments including the mathematical morphology method and target tracking application demonstrated that the chip is fully functional and can be applied in real-time vision applications.

Effect of Anode Floating Voltage and its Applications in Characterizing Silicon Drift Detectors

Anode floating voltage is predicted and investigated for silicon drift detectors (SDDs) with an active area of 5 mm(2) fabricated by a double-side parallel technology. It is demonstrated that the anode floating voltage increases with the increasing inner ring voltage, and is almost unchanged with the external ring voltage. The anode floating voltage will not be affected by the back electrode biased voltage until it reaches the full-depleted voltage (-50 V) of the SDD. Theoretical analysis and experimental results show that the anode floating voltage is equal to the sum of the inner ring voltage and the built-in potential between the p(+) inner ring and the n(+) anode. A fast checking method before detector encapsulation is proposed by employing the anode floating voltage along with checking the leakage current, potential distribution and drift properties.

A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors

A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is presented. The chip consists of a CMOS sensor array, with row-parallel 6-bit Algorithmic ADCs, row-parallel gray-scale image processors, pixel-parallel SIMD Processing Element (PE) array, and instruction controller. The resolution of the image in the chip is variable: high resolution for a focused area and low resolution for general view. It implements gray-scale and binary mathematical morphology algorithms in series to carry out low-level and mid-level image processing and sends out features of the image for various applications. It can perform image processing at over 1,000 frames/s (fps). A prototype chip with 64 x 64 pixels resolution and 6-bit gray-scale image is fabricated in 0.18 mu m Standard CMOS process. The area size of chip is 1.5 mm x 3.5 mm. Each pixel size is 9.5 mu m x 9.5 mu m and each processing element size is 23 mu m x 29 mu m. The experiment results demonstrate that the chip can perform low-level and mid-level image processing and it can be applied in the real-time vision applications, such as high speed target tracking.

Pipeline Architecture and Parallel Computation-Based Real-Time Stereovision Tracking System for Surgical Navigation

This paper studies the development of a real-time stereovision system to track multiple infrared markers attached to a surgical instrument. Multiple stages of pipeline in field-programmable gate array (FPGA) are developed to recognize the targets in both left and right image planes and to give each target a unique label. The pipeline architecture includes a smoothing filter, an adaptive threshold module, a connected component labeling operation, and a centroid extraction process. A parallel distortion correction method is proposed and implemented in a dual-core DSP. A suitable kinematic model is established for the moving targets, and a novel set of parallel and interactive computation mechanisms is proposed to position and track the targets, which are carried out by a cross-computation method in a dual-core DSP. The proposed tracking system can track the 3-D coordinate, velocity, and acceleration of four infrared markers with a delay of 9.18 ms. Furthermore, it is capable of tracking a maximum of 110 infrared markers without frame dropping at a frame rate of 60 f/s. The accuracy of the proposed system can reach the scale of 0.37 mm RMS along the x- and y-directions and 0.45 mm RMS along the depth direction (the depth is from 0.8 to 0.45 m). The performance of the proposed system can meet the requirements of applications such as surgical navigation, which needs high real time and accuracy capability.

Pipeline Architecture and Parallel Computation-Based Real-Time Stereovision Tracking System for Surgical Navigation

This paper studies the development of a real-time stereovision system to track multiple infrared markers attached to a surgical instrument. Multiple stages of pipeline in field-programmable gate array (FPGA) are developed to recognize the targets in both left and right image planes and to give each target a unique label. The pipeline architecture includes a smoothing filter, an adaptive threshold module, a connected component labeling operation, and a centroid extraction process. A parallel distortion correction method is proposed and implemented in a dual-core DSP. A suitable kinematic model is established for the moving targets, and a novel set of parallel and interactive computation mechanisms is proposed to position and track the targets, which are carried out by a cross-computation method in a dual-core DSP. The proposed tracking system can track the 3-D coordinate, velocity, and acceleration of four infrared markers with a delay of 9.18 ms. Furthermore, it is capable of tracking a maximum of 110 infrared markers without frame dropping at a frame rate of 60 f/s. The accuracy of the proposed system can reach the scale of 0.37 mm RMS along the x- and y-directions and 0.45 mm RMS along the depth direction (the depth is from 0.8 to 0.45 m). The performance of the proposed system can meet the requirements of applications such as surgical navigation, which needs high real time and accuracy capability.

Surface pigments,algal biomass profiles,and potential production of the euphotic layer:Relationships reinvestigated in view of remote-sensing applications

Maps of surface chlorophyllous pigment (Chl a + Pheo a) are currently produced from ocean color sensors. Transforming such maps into maps of primary production can be reliably done only by using light-production models in conjuction with additional information about the column-integrated pigment content and its vertical distribution. As a preliminary effort in this direction. $\ticksim 4,000$ vertical profiles pigment (Chl a + Pheo a) determined only in oceanic Case 1 waters have been statistically analyzed. They were scaled according to dimensionless depths (actual depth divided by the depth of the euphotic layer, $Z_e$) and expressed as dimensionless concentrations (actual concentration divided by the mean concentration within the euphotic layer). The depth $Z_e$ generally unknown, was computed with a previously develop bio-optical model. Highly sifnificant relationships were found allowing $\langle C \rangle_tot$, the pigment content of the euphotic layer, to be inferred from the surface concentration, $\bar C_pd$, observed within the layer of one penetration depth. According to their $\bar C_pd$ values (ranging from $0.01 to > 10 mg m^-3$), we categorized the profiles into seven trophic situations and computed a mean vertical profile for each. Between a quasi-uniform profile in eutrophic waters and a profile with a strong deep maximum in oligotrophic waters, the shape evolves rather regularly. The wellmixed cold waters, essentially in the Antarctic zone, have been separately examined. On average, their profiles are featureless, without deep maxima, whatever their trophic state. Averaged values their profiles are featureless, without deep maxima, whatever their trophic state. Averaged values their profiles are featureless, without deep maxima, whatever their trophic state. Averaged values of $ρ$, the ratio of Chl a tp (Chl a + Pheo a), have also been obtained for each trophic category. The energy stored by photosynthesizing algae, once normalized with respect to the integrated chlorophyll biomass $\langle C \rangle _tot $ is proportional to the available photosythetic energy at the surface via a parameter $ψ∗$ which is the cross-section for photosynthesis per unit of areal chlorophyll. By tanking advantage of the relative stability of $ψ∗.$ we can compute primary production from ocean color data acquired from space. For such a computation, inputs are the irradiance field at the ocean surface, the "surface" pigment from which $\langle C \rangle _tot$ can be derived, the mean $ρ value pertinent to the trophic situation as depicted by the $\bar C_pd or $\langle C \rangle _tot$ values, and the cross-section $ψ∗$. Instead of a contant $ψ∗.$ value, the mean profiles can be used; they allow the climatological field of the $ψ∗.$ parameter to be adjusted through the parallel use of a spectral light-production model.

A Coupled Multi-ALU Processing Node for a Highly Parallel Computer

This report describes Processor Coupling, a mechanism for controlling multiple ALUs on a single integrated circuit to exploit both instruction-level and inter-thread parallelism. A compiler statically schedules individual threads to discover available intra-thread instruction-level parallelism. The runtime scheduling mechanism interleaves threads, exploiting inter-thread parallelism to maintain high ALU utilization. ALUs are assigned to threads on a cycle byscycle basis, and several threads can be active concurrently. Simulation results show that Processor Coupling performs well both on single threaded and multi-threaded applications. The experiments address the effects of memory latencies, function unit latencies, and communication bandwidth between function units.

Sparsely Faceted Arrays: A Mechanism Supporting Parallel Allocation, Communication, and Garbage Collection

Conventional parallel computer architectures do not provide support for non-uniformly distributed objects. In this thesis, I introduce sparsely faceted arrays (SFAs), a new low-level mechanism for naming regions of memory, or facets, on different processors in a distributed, shared memory parallel processing system. Sparsely faceted arrays address the disconnect between the global distributed arrays provided by conventional architectures (e.g. the Cray T3 series), and the requirements of high-level parallel programming methods that wish to use objects that are distributed over only a subset of processing elements. A sparsely faceted array names a virtual globally-distributed array, but actual facets are lazily allocated. By providing simple semantics and making efficient use of memory, SFAs enable efficient implementation of a variety of non-uniformly distributed data structures and related algorithms. I present example applications which use SFAs, and describe and evaluate simple hardware mechanisms for implementing SFAs. Keeping track of which nodes have allocated facets for a particular SFA is an important task that suggests the need for automatic memory management, including garbage collection. To address this need, I first argue that conventional tracing techniques such as mark/sweep and copying GC are inherently unscalable in parallel systems. I then present a parallel memory-management strategy, based on reference-counting, that is capable of garbage collecting sparsely faceted arrays. I also discuss opportunities for hardware support of this garbage collection strategy. I have implemented a high-level hardware/OS simulator featuring hardware support for sparsely faceted arrays and automatic garbage collection. I describe the simulator and outline a few of the numerous details associated with a "real" implementation of SFAs and SFA-aware garbage collection. Simulation results are used throughout this thesis in the evaluation of hardware support mechanisms.

Qualitative Modelling of Linear Networks in ECAD Applications

Lee M.H., Qualitative Modelling of Linear Networks in ECAD Applications, Expert Update, Vol. 3, Num. 2, pp23-32, BCS SGES, Summer 2000. Qualitative modeling of linear networks in ecad applications (1999) by M Lee Venue: Pages 146?152 of: Proceedings 13th international workshop on qualitative reasoning, QR ?99

Cellular automata and non-static image processing for embodied robot systems on a massively parallel processor array

Huelse, M, Barr, D R W, Dudek, P: Cellular Automata and non-static image processing for embodied robot systems on a massively parallel processor array. In: Adamatzky, A et al. (eds) AUTOMATA 2008, Theory and Applications of Cellular Automata. Luniver Press, 2008, pp. 504-510. Sponsorship: EPSRC

Mermera: Non-Coherent Distributed Shared Memory for Parallel Computing

The proliferation of inexpensive workstations and networks has prompted several researchers to use such distributed systems for parallel computing. Attempts have been made to offer a shared-memory programming model on such distributed memory computers. Most systems provide a shared-memory that is coherent in that all processes that use it agree on the order of all memory events. This dissertation explores the possibility of a significant improvement in the performance of some applications when they use non-coherent memory. First, a new formal model to describe existing non-coherent memories is developed. I use this model to prove that certain problems can be solved using asynchronous iterative algorithms on shared-memory in which the coherence constraints are substantially relaxed. In the course of the development of the model I discovered a new type of non-coherent behavior called Local Consistency. Second, a programming model, Mermera, is proposed. It provides programmers with a choice of hierarchically related non-coherent behaviors along with one coherent behavior. Thus, one can trade-off the ease of programming with coherent memory for improved performance with non-coherent memory. As an example, I present a program to solve a linear system of equations using an asynchronous iterative algorithm. This program uses all the behaviors offered by Mermera. Third, I describe the implementation of Mermera on a BBN Butterfly TC2000 and on a network of workstations. The performance of a version of the equation solving program that uses all the behaviors of Mermera is compared with that of a version that uses coherent behavior only. For a system of 1000 equations the former exhibits at least a 5-fold improvement in convergence time over the latter. The version using coherent behavior only does not benefit from employing more than one workstation to solve the problem while the program using non-coherent behavior continues to achieve improved performance as the number of workstations is increased from 1 to 6. This measurement corroborates our belief that non-coherent shared memory can be a performance boon for some applications.