993 resultados para Electronic analog computers
Resumo:
Double gate fully depleted silicon-on-insulator (DGSOI) is recognized as a possible solution when the physical gate length L-G reduces to 25nm for the 65nm node on the ITRS CMOS roadmap. In this paper, scaling guidelines are introduced to optimally design a nanoscale DGSOI. For this reason, the sensitivity of gain, f(T) and f(max) to each of the key geometric and technological parameters of the DGSOI are assessed and quantified using MixedMode simulation. The impact of the parasitic resistance and capacitance on analog device performance is systematically analysed. By comparing analog performance with a single gate (SG), it has been found that intrinsic gain in DGSOI is 4 times higher but its fT was found to be comparable to that of SGSOI at different regions of transistor operation. However, the extracted fmax in SG SOI was higher (similar to 40%) compared to DGSOI due to its lower capacitance.
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In the present work, by investigating the influence of source/drain (S/D) extension region engineering (also known as gate-underlap architecture) in planar Double Gate (DG) SOI MOSFETs, we offer new design insights to achieve high tolerance to gate misalignment/oversize in nanoscale devices for ultra-low-voltage (ULV) analog/rf applications. Our results show that (i) misaligned gate-underlap devices perform significantly better than DC devices with abrupt source/drain junctions with identical misalignment, (ii) misaligned gate underlap performance (with S/D optimization) exceeds perfectly aligned DG devices with abrupt S/D regions and (iii) 25% back gate misalignment can be tolerated without any significant degradation in cut-off frequency (f(T)) and intrinsic voltage gain (A(VO)). Gate-underlap DG devices designed with spacer-to-straggle ratio lying within the range 2.5 to 3.0 show best tolerance to misaligned/oversize back gate and indeed are better than self-aligned DG MOSFETs with non-underlap (abrupt) S/D regions. Impact of gate length and silicon film thickness scaling is also discussed. These results are very significant as the tolerable limit of misaligned/oversized back gate is considerably extended and the stringent process control requirements to achieve self-alignment can be relaxed for nanoscale planar ULV DG MOSFETs operating in weak-inversion region. The present work provides new opportunities for realizing future ULV analog/rf design with nanoscale gate-underlap DG MOSFETs. (C) 2008 Elsevier Ltd. All rights reserved.
Resumo:
Quantum coherence between electron and ion dynamics, observed in organic semiconductors by means of ultrafast spectroscopy, is the object of recent theoretical and computational studies. To simulate this kind of quantum coherent dynamics, we have introduced in a previous article [L. Stella, M. Meister, A. J. Fisher, and A. P. Horsfield, J. Chem. Phys. 127, 214104 (2007)] an improved computational scheme based on Correlated Electron-Ion Dynamics (CEID). In this article, we provide a generalization of that scheme to model several ionic degrees of freedom and many-body electronic states. To illustrate the capability of this extended CEID, we study a model system which displays the electron-ion analog of the Rabi oscillations. Finally, we discuss convergence and scaling properties of the extended CEID along with its applicability to more realistic problems. (C) 2011 American Institute of Physics. [doi: 10.1063/1.3589165]
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This paper presents initial results of evaluating suitability of the conventional two-tone CW passive intermodulation (PIM) test for characterization of modulated signal distortion by passive nonlinearities in base station antennas and RF front-end. A comprehensive analysis of analog and digitally modulated waveforms in the transmission lines with weak distributed nonlinearity has been performed using the harmonic balance analysis and X-parameters in Advanced Design System (ADS) simulator. The nonlinear distortion metrics used in the conventional two-tone CW PIM test have been compared with the respective spectral metrics applied to the modulated waveforms, such as adjacent channel power ratio (ACPR) and error vector magnitude (EVM). It is shown that the results of two-tone CW PIM tests are consistent with the metrics used for assessment of signal integrity of both analog and digitally modulated waveforms.
Resumo:
Passive intermodulation (PIM) often limits the performance of communication systems with analog and digitally-modulated signals and especially of systems supporting multiple carriers. Since the origins of the apparently multiple physical sources of nonlinearity causing PIM are not fully understood, the behavioral models are frequently used to describe the process of PIM generation. In this paper a polynomial model of memoryless nonlinearity is deduced from PIM measurements of a microstrip line with distributed nonlinearity with two-tone CW signals. The analytical model of nonlinearity is incorporated in Keysight Technology’s ADS simulator to evaluate the metrics of signal fidelity in the receive band for analog and digitally-modulated signals. PIM-induced distortion and cross-band interference with modulated signals are compared to those with two-tone CW signals. It is shown that conventional metrics can be applied to quantify the effect of distributed nonlinearities on signal fidelity. It is found that the two-tone CW test provides a worst-case estimate of cross-band interference for two-carrier modulated signals whereas with a three-carrier signal PIM interference in the receive band is noticeably overestimated. The simulated constellation diagrams for QPSK signals demonstrate that PIM interference exhibits the distinctive signatures of correlated distortion and this indicates that there are opportunities for mitigating PIM interference and that PIM interference cannot be treated as noise. One of the interesting results is that PIM distortion on a transmission line results in asymmetrical regrowth of output PIM interference for modulated signals.
Resumo:
Esta tese insere-se na área da simulação de circuitos de RF e microondas, e visa o estudo de ferramentas computacionais inovadoras que consigam simular, de forma eficiente, circuitos não lineares e muito heterogéneos, contendo uma estrutura combinada de blocos analógicos de RF e de banda base e blocos digitais, a operar em múltiplas escalas de tempo. Os métodos numéricos propostos nesta tese baseiam-se em estratégias multi-dimensionais, as quais usam múltiplas variáveis temporais definidas em domínios de tempo deformados e não deformados, para lidar, de forma eficaz, com as disparidades existentes entre as diversas escalas de tempo. De modo a poder tirar proveito dos diferentes ritmos de evolução temporal existentes entre correntes e tensões com variação muito rápida (variáveis de estado activas) e correntes e tensões com variação lenta (variáveis de estado latentes), são utilizadas algumas técnicas numéricas avançadas para operar dentro dos espaços multi-dimensionais, como, por exemplo, os algoritmos multi-ritmo de Runge-Kutta, ou o método das linhas. São também apresentadas algumas estratégias de partição dos circuitos, as quais permitem dividir um circuito em sub-circuitos de uma forma completamente automática, em função dos ritmos de evolução das suas variáveis de estado. Para problemas acentuadamente não lineares, são propostos vários métodos inovadores de simulação a operar estritamente no domínio do tempo. Para problemas com não linearidades moderadas é proposto um novo método híbrido frequência-tempo, baseado numa combinação entre a integração passo a passo unidimensional e o método seguidor de envolvente com balanço harmónico. O desempenho dos métodos é testado na simulação de alguns exemplos ilustrativos, com resultados bastante promissores. Uma análise comparativa entre os métodos agora propostos e os métodos actualmente existentes para simulação RF, revela ganhos consideráveis em termos de rapidez de computação.
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The effectiveness of various kinds of computer programs is of concern to nurse-educators. Using a 3x3 experimental design, ninety second year diploma student nurses were randomly selected from a total population at three community colleges in Ontario. Data were collected via a 20-item valid and reliable Likert-type questionnaire developed by the nursing profession to measure perceptions of nurses about computers in the nursing role. The groups were pretested and posttested at the beginning and end of one semester. Subjects attending College A group received a computer literacy course which comprised word processing with technology awareness. College B students were exposed to computer-aided instruction primarily in nursing simulations intermittently throughout the semester. College C subjects maintained their regular curriculum with no computer involvement. The student's t-test (two-tailed) was employed to assess the attitude scores data and a one-way analysis of variance was performed on the attitude scores. Posttest analysis revealed that there was a significant difference (p<.05) between attitude scores on the use of computers in the nursing role between College A and C. No significant differences (p>.05) were seen between College B and A in posttesting. Suggestions for continued computer education of diploma student nurses are provided.
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This study examined nurses' attitudes toward computers before training and 2 months after training. A quantitative approach and a nonexperimental survey design were used in this study. Stronge and Brodt's (1985) instrument, Nurses' Attitudes Toward Computerization Questionnaire, was used to assess 27 nurses' attitudes prior to and 2 months after computer training. Demographic variables also were collected on the questionnaires. The results of this study showed that, overall, nurses had positive attitudes towards computers in both questionnaires. The results of the first questionnaire were consistent with other studies. There were no studies that involved a follow-up questionnaire using Stronge and Brodt's (1985) instrument. Attitude scores of Questionnaire 2 were higher than attitude scores of Questionnaire 1. More time for nursing tasks, less time for quality patient care, and threat to job security questions were found to be statistically significant. This study found no statistical significance between attitudes and demographic variables. Younger nurses a~d nurses with fewer years of computer experience were most likely to exhibit positive attitudes. Implications for practice and future research were discussed. Some limitations were identified and discussed.
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A PGE1 analog, namely (±)-trans-2-(6'-carbomethoxyhexyl)-3- (E-3"-thia-1 "-octene)-4-hydroxycyclopentanone 71, has been prepared for the first time. Towards the synthesis of this compound, several synthetic approaches aimed at the preparation of the required acetylenic and E-halovinylic sulfides as building blocks were investigated. Among all the methods examined, it appeared evident that the best route to ethynyl n.pentyl sulfide 81 is via a double dehydrohalogenation of the corresponding 1,2-dibromoethyl sulfide with sodium amide in liquid ammonia. In addition, the isomerically pure E-2-iodoethenyl n.pentyl sulfide 85 is conveniently prepared in high yield and stereoselectivity by hydrozirconation-iodination of the terminal ethynyl sulfide 81. The classical hydroalumination and hydroboration reactions for the preparation of vinyl halides from alkynes gave only small yields when applied as methods towards the synthesis of 85 . The building block 2-(6'-carbomethoxyhexyl)-4-hydroxy-2- cyclopentenone (±)-1 carrying the upper side-chain of prostaglandin E 1 was prepared by a step-wise synthesis involving transformations of compounds possessing the required carbocyclic framework (see scheme 27). The synthesis proved to be convenient and gave a good overall yield of (±)-1 which was protected as the TH P-derivative 37 or the siloxy derivative 38. With the required building blocks 81 and 37 in hand, the target 1S-thia-PGE1 analog (±)-71 was prepared via the in situ higher cuprate formation-conjugate addition reaction. This method proved to be convenient and stereospecific. The standard cuprate method, involving an organocuprate reagent generated from an isolated vinyl iodide, did not work well in our case and gave a complicated mixture of products. The target compound will be submitted for assessment of bio log ical activity.
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The present work will explain a method to achieve a remote controlled (via IR LED) alphanumeric Liquid Crystal Display. In modern times, the remote access of different devices has become quite popular, therefore, the aim of this project is to provide a useful tool that will integrate common and easy to access devices. The system includes a C language based user interface, an assembly language code for the AT89C51ED2 microcontroller instructions and some digital electronic circuits needed for the driving and control of both the LCD and the infrared communication, as well as the PC with a parallel port. The interaction of all the devices provides a whole system that can be helpful in different applications, or it can be separated into each one of its different stages to take the best advantage as possible.
Resumo:
With the ever increasing demands for high complexity consumer electronic products, market pressures demand faster product development and lower cost. SoCbased design can provide the required design flexibility and speed by allowing the use of IP cores. However, testing costs in the SoC environment can reach a substantial percent of the total production cost. Analog testing costs may dominate the total test cost, as testing of analog circuits usually require functional verification of the circuit and special testing procedures. For RF analog circuits commonly used in wireless applications, testing is further complicated because of the high frequencies involved. In summary, reducing analog test cost is of major importance in the electronic industry today. BIST techniques for analog circuits, though potentially able to solve the analog test cost problem, have some limitations. Some techniques are circuit dependent, requiring reconfiguration of the circuit being tested, and are generally not usable in RF circuits. In the SoC environment, as processing and memory resources are available, they could be used in the test. However, the overhead for adding additional AD and DA converters may be too costly for most systems, and analog routing of signals may not be feasible and may introduce signal distortion. In this work a simple and low cost digitizer is used instead of an ADC in order to enable analog testing strategies to be implemented in a SoC environment. Thanks to the low analog area overhead of the converter, multiple analog test points can be observed and specific analog test strategies can be enabled. As the digitizer is always connected to the analog test point, it is not necessary to include muxes and switches that would degrade the signal path. For RF analog circuits, this is specially useful, as the circuit impedance is fixed and the influence of the digitizer can be accounted for in the design phase. Thanks to the simplicity of the converter, it is able to reach higher frequencies, and enables the implementation of low cost RF test strategies. The digitizer has been applied successfully in the testing of both low frequency and RF analog circuits. Also, as testing is based on frequency-domain characteristics, nonlinear characteristics like intermodulation products can also be evaluated. Specifically, practical results were obtained for prototyped base band filters and a 100MHz mixer. The application of the converter for noise figure evaluation was also addressed, and experimental results for low frequency amplifiers using conventional opamps were obtained. The proposed method is able to enhance the testability of current mixed-signal designs, being suitable for the SoC environment used in many industrial products nowadays.
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The aim of this study was to develop a laboratory method for time response evaluation on electronically controlled spray equipment using Programmable Logic Controllers (PLCs). For that purpose, a PLC controlled digital drive inverter was set up to drive an asynchronous electric motor linked to a centrifugal pump on a experimental sprayer equipped with electronic flow control. The PLC was operated via RS232 serial communication from a PC computer. A user program was written to control de motor by adjusting the following system variables, all related to the motor speed: time stopped; ramp up and ramp down times, time running at a given constant speed and ramp down time to stop the motor. This set up was used in conjunction with a data acquisition system to perform laboratory tests with an electronically controlled sprayer. Time response for pressure stabilization was measured while changing the pump speed by +/-20%. The results showed that for a 0.2 s ramp time increasing the motor speed, as an example, an AgLogix Flow Control system (Midwest Technologies Inc.) took 22 s in average to readjust the pressure. When decreasing the motor speed, this time response was down to 8 s. General results also showed that this kind of methodology could make easier the definition of standards for tests on electronically controlled application equipment.
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Analog neural systems that can automatically find the minimum value of the outputs of unknown analog systems, described by convex functions, are studied. When information about derivative or gradient are not used, these systems are called analog nonderivative optimizers. An electronic circuit for the analog neural nonderivative optimizer proposed by Teixeira and Zak, and its simulation with software PSPICE, is presented. With the simulation results and hardware implementation of the system, the validity of the proposed optimizer can be verified. These results are original, from the best of the authors knowledge.
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This paper considers the importance of using a top-down methodology and suitable CAD tools in the development of electronic circuits. The paper presents an evaluation of the methodology used in a computational tool created to support the synthesis of digital to analog converter models by translating between different tools used in a wide variety of applications. This tool is named MS 2SV and works directly with the following two commercial tools: MATLAB/Simulink and SystemVision. Model translation of an electronic circuit is achieved by translating a mixed-signal block diagram developed in Simulink into a lower level of abstraction in VHDL-AMS and the simulation project support structure in SystemVision. The method validation was performed by analyzing the power spectral of the signal obtained by the discrete Fourier transform of a digital to analog converter simulation model. © 2011 IEEE.
Resumo:
This work presents the analog performance of n-type triple-gate MuGFETs with high-k dielectrics and TiN gate material fabricated in 45 degrees rotated SOI substrates comparing their performance with standard MuGFETs fabricated without substrate rotation. Different fin widths are studied for temperatures ranging from 250 K up to 400 K. The results of transconductance, output conductance, transconductance over drain current ratio, intrinsic voltage gain and unit-gain frequency are studied. It is observed that the substrate rotation improves the carrier mobility of narrow MuGFETs at any temperature because of the changing in the conduction plane at the sidewalls from (1 1 0) to (1 0 0). For lower temperatures, the improvement of the carrier mobility of rotated MuGFETs is more noticeable as well as the rate of mobility improvement with the temperature decrease is larger. The output conductance is weakly affected by the substrate rotation. Although this improvement in the transconductance of rotated MuGFETs is negligibly transferred to the intrinsic voltage gain, the unity-gain frequency of rotated device is improved due to the larger carrier mobility in the entire range of temperatures studied. (C) 2011 Elsevier Ltd. All rights reserved.