Non Classical Design in MOSFETs for Improving OTA gain-bandwidth trade off

In this paper, gain-bandwidth (GB) trade-off associated with analog device/circuit design due to conflicting requirements for enhancing gain and cutoff frequency is examined. It is demonstrated that the use of a nonclassical source/drain (S/D) profile (also known as underlap channel) can alleviate the GB trade-off associated with analog design. Operational transconductance amplifier (OTA) with 60 nm underlap S/D MOSFETs achieve 15 dB higher open loop voltage gain along with three times higher cutoff frequency as compared to OTA with classical nonunderlap S/D regions. Underlap design provides a methodology for scaling analog devices into the sub-100 nm regime and is advantageous for high temperature applications with OTA, preserving functionality up to 540 K. Advantages of underlap architecture over graded channel (GC) or laterally asymmetric channel (LAC) design in terms of GB behavior are demonstrated. Impact of transistor structural parameters on the performance of OTA is also analyzed. Results show that underlap OTAs designed with spacer-to-straggle ratio of 3.2 and operated below a bias current of 80 microamps demonstrate optimum performance. The present work provides new opportunities for realizing future ultra wide band OTA design with underlap DG MOSFETs in silicon-on-insulator (SOI) technology. Index Terms—Analog/RF, double gate, gain-bandwidth product, .

Design of interlock-free combined allocators for Networks-on-Chip

This paper presents a thorough investigation of the combined allocator design for Networks-on-Chip (NoC). Particularly, we discuss the interlock of the combined NoC allocator, which is caused by the lock mechanism of priority updating between the local and global arbiters. Architectures and implementations of three interlock-free combined allocators are presented in detail. Their cost, critical path, as well as network level performance are demonstrated based on 65-nm standard cell technology.

Case based reasoning as an extension of fault dictionary methods for linear electronic analog circuits diagnosis

El test de circuits és una fase del procés de producció que cada vegada pren més importància quan es desenvolupa un nou producte. Les tècniques de test i diagnosi per a circuits digitals han estat desenvolupades i automatitzades amb èxit, mentre que aquest no és encara el cas dels circuits analògics. D'entre tots els mètodes proposats per diagnosticar circuits analògics els més utilitzats són els diccionaris de falles. En aquesta tesi se'n descriuen alguns, tot analitzant-ne els seus avantatges i inconvenients. Durant aquests últims anys, les tècniques d'Intel·ligència Artificial han esdevingut un dels camps de recerca més importants per a la diagnosi de falles. Aquesta tesi desenvolupa dues d'aquestes tècniques per tal de cobrir algunes de les mancances que presenten els diccionaris de falles. La primera proposta es basa en construir un sistema fuzzy com a eina per identificar. Els resultats obtinguts son força bons, ja que s'aconsegueix localitzar la falla en un elevat tant percent dels casos. Per altra banda, el percentatge d'encerts no és prou bo quan a més a més s'intenta esbrinar la desviació. Com que els diccionaris de falles es poden veure com una aproximació simplificada al Raonament Basat en Casos (CBR), la segona proposta fa una extensió dels diccionaris de falles cap a un sistema CBR. El propòsit no és donar una solució general del problema sinó contribuir amb una nova metodologia. Aquesta consisteix en millorar la diagnosis dels diccionaris de falles mitjançant l'addició i l'adaptació dels nous casos per tal d'esdevenir un sistema de Raonament Basat en Casos. Es descriu l'estructura de la base de casos així com les tasques d'extracció, de reutilització, de revisió i de retenció, fent èmfasi al procés d'aprenentatge. En el transcurs del text s'utilitzen diversos circuits per mostrar exemples dels mètodes de test descrits, però en particular el filtre biquadràtic és l'utilitzat per provar les metodologies plantejades, ja que és un dels benchmarks proposats en el context dels circuits analògics. Les falles considerades son paramètriques, permanents, independents i simples, encara que la metodologia pot ser fàcilment extrapolable per a la diagnosi de falles múltiples i catastròfiques. El mètode es centra en el test dels components passius, encara que també es podria extendre per a falles en els actius.

Applying semiotic analysis to the design and modeling of distributed multimedia systems

Semiotics is the study of signs. Application of semiotics in information systems design is based on the notion that information systems are organizations within which agents deploy signs in the form of actions according to a set of norms. An analysis of the relationships among the agents, their actions and the norms would give a better specification of the system. Distributed multimedia systems (DMMS) could be viewed as a system consisted of many dynamic, self-controlled normative agents engaging in complex interaction and processing of multimedia information. This paper reports the work of applying the semiotic approach to the design and modeling of DMMS, with emphasis on using semantic analysis under the semiotic framework. A semantic model of DMMS describing various components and their ontological dependencies is presented, which then serves as a design model and implemented in a semantic database. Benefits of using the semantic database are discussed with reference to various design scenarios.

Design of a unified data with business rules storage model for OLTP and OLAP systems

This paper reviews the literature concerning the practice of using Online Analytical Processing (OLAP) systems to recall information stored by Online Transactional Processing (OLTP) systems. Such a review provides a basis for discussion on the need for the information that are recalled through OLAP systems to maintain the contexts of transactions with the data captured by the respective OLTP system. The paper observes an industry trend involving the use of OLTP systems to process information into data, which are then stored in databases without the business rules that were used to process information and data stored in OLTP databases without associated business rules. This includes the necessitation of a practice, whereby, sets of business rules are used to extract, cleanse, transform and load data from disparate OLTP systems into OLAP databases to support the requirements for complex reporting and analytics. These sets of business rules are usually not the same as business rules used to capture data in particular OLTP systems. The paper argues that, differences between the business rules used to interpret these same data sets, risk gaps in semantics between information captured by OLTP systems and information recalled through OLAP systems. Literature concerning the modeling of business transaction information as facts with context as part of the modelling of information systems were reviewed to identify design trends that are contributing to the design quality of OLTP and OLAP systems. The paper then argues that; the quality of OLTP and OLAP systems design has a critical dependency on the capture of facts with associated context, encoding facts with contexts into data with business rules, storage and sourcing of data with business rules, decoding data with business rules into the facts with the context and recall of facts with associated contexts. The paper proposes UBIRQ, a design model to aid the co-design of data with business rules storage for OLTP and OLAP purposes. The proposed design model provides the opportunity for the implementation and use of multi-purpose databases, and business rules stores for OLTP and OLAP systems. Such implementations would enable the use of OLTP systems to record and store data with executions of business rules, which will allow for the use of OLTP and OLAP systems to query data with business rules used to capture the data. Thereby ensuring information recalled via OLAP systems preserves the contexts of transactions as per the data captured by the respective OLTP system.

Design method for solar heating systems in combination with pellet boilers/stoves

In this study an optimization method for the design of combined solar and pellet heating systems is presented and evaluated. The paper describes the steps of the method by applying it for an example of system. The objective of the optimization was to find the design parameters that give the lowest auxiliary energy (pellet fuel + auxiliary electricity) and carbon monoxide (CO) emissions for a system with a typical load, a single family house in Sweden. Weighting factors have been used for the auxiliary energy use and CO emissions to give a combined target function. Different weighting factors were tested. The results show that extreme weighting factors lead to their own minima. However, it was possible to find factors that ensure low values for both auxiliary energy and CO emissions.

Hardware implementation of an analog neural nonderivative optimizer

Analog neural systems that can automatically find the minimum value of the outputs of unknown analog systems, described by convex functions, are studied. When information about derivative or gradient are not used, these systems are called analog nonderivative optimizers. An electronic circuit for the analog neural nonderivative optimizer proposed by Teixeira and Zak, and its simulation with software PSPICE, is presented. With the simulation results and hardware implementation of the system, the validity of the proposed optimizer can be verified. These results are original, from the best of the authors knowledge.

Design of SPR systems with dynamic compensators and output variable structure control

This paper presents necessary and sufficient conditions for the following problem: given a linear time invariant plant G(s) = N(s)D(s)-1 = C(sI - A]-1B, with m inputs, p outputs, p > m, rank(C) = p, rank(B) = rank(CB) = m, £nd a tandem dynamic controller Gc(s) = D c(s)-1Nc(s) = Cc(sI - A c)-1Bc + Dc, with p inputs and m outputs and a constant output feedback matrix Ko ε ℝm×p such that the feedback system is Strictly Positive Real (SPR). It is shown that this problem has solution if and only if all transmission zeros of the plant have negative real parts. When there exists solution, the proposed method firstly obtains Gc(s) in order to all transmission zeros of Gc(s)G(s) present negative real parts and then Ko is found as the solution of some Linear Matrix Inequalities (LMIs). Then, taking into account this result, a new LMI based design for output Variable Structure Control (VSC) of uncertain dynamic plants is presented. The method can consider the following design specifications: matched disturbances or nonlinearities of the plant, output constraints, decay rate and matched and nonmatched plant uncertainties. © 2006 IEEE.

Design of microprogrammed controllers with address converter implemented on programmable systems with embedded memories

In the paper the improvement of a traditional structure of a microprogrammed controller with sharing codes is discussed. The idea is based on the modification of internal modules and connections of the device. Such a solution permits to reduce the number of embedded memories needed for implementation of the microprogrammed controller on programmable structures, especially FPGAs. © 2011 IEEE.

Design and implementation of a dc-dc converter based on variable structure control of switched systems

This paper presents a control method for a class of continuous-time switched systems, using state feedback variable structure controllers. The method is applied to the control of a non-trivial dc-dc power converter and a simple and inexpensive control circuit design, that was simulated using the software PSpice, is proposed. The design is based on Lyapunov-Metzler-SPR systems and the performance of the resulting control system is superior to that afforded by a recently proposed alternative sliding-mode control technique. © 2011 IFAC.

Design instrucional: uma abordagem do design gráfico para o desenvolvimento de ferramentas de suporte à Educação a Distância

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Technologies applied to the transport sector: electronic fare collection systems

Electronic transactions are becoming increasingly commonplace in the countries of Latin America and the Caribbean, despite the collapse of many dotcom firms and the failure of e-commerce to make inroads in the region. In the transport sphere, the gradual incorporation of technology in support of processes and the exchange of money flows between players has brought greater versatility, security and flexibility. In public transport, such initiatives take the form of automatic ticket machines and prepaid card dispensing machines. In urban transit, electronic purses used for the supervision and payment of parking time, and in road pricing, electronic toll systems streamline the process of collecting money; this is especially the case with motorways and urban concessions. And in shipping, electronic transfers are increasingly being used for the payment of customs dues and port charges.In view of the importance of the topic and the interest expressed in it, the Transport Unit has begun a study of these issues, and recently published a paper entitled Sistemas de cobro electrónico de pasajes en el transporte público, ("Electronic systems for payment of tickets in public transport") LC/L.1752-P/E, July 2002, on which this issue of the Bulletin is based.

Modelling and Design of Advanced Reliable Circuits and Devices for Energy Efficiency

Reliable electronic systems, namely a set of reliable electronic devices connected to each other and working correctly together for the same functionality, represent an essential ingredient for the large-scale commercial implementation of any technological advancement. Microelectronics technologies and new powerful integrated circuits provide noticeable improvements in performance and cost-effectiveness, and allow introducing electronic systems in increasingly diversified contexts. On the other hand, opening of new fields of application leads to new, unexplored reliability issues. The development of semiconductor device and electrical models (such as the well known SPICE models) able to describe the electrical behavior of devices and circuits, is a useful means to simulate and analyze the functionality of new electronic architectures and new technologies. Moreover, it represents an effective way to point out the reliability issues due to the employment of advanced electronic systems in new application contexts. In this thesis modeling and design of both advanced reliable circuits for general-purpose applications and devices for energy efficiency are considered. More in details, the following activities have been carried out: first, reliability issues in terms of security of standard communication protocols in wireless sensor networks are discussed. A new communication protocol is introduced, allows increasing the network security. Second, a novel scheme for the on-die measurement of either clock jitter or process parameter variations is proposed. The developed scheme can be used for an evaluation of both jitter and process parameter variations at low costs. Then, reliability issues in the field of “energy scavenging systems” have been analyzed. An accurate analysis and modeling of the effects of faults affecting circuit for energy harvesting from mechanical vibrations is performed. Finally, the problem of modeling the electrical and thermal behavior of photovoltaic (PV) cells under hot-spot condition is addressed with the development of an electrical and thermal model.

Design and Simulation of Deep Nanometer SRAM Cells under Energy, Mismatch, and Radiation Constraints

La fiabilidad está pasando a ser el principal problema de los circuitos integrados según la tecnología desciende por debajo de los 22nm. Pequeñas imperfecciones en la fabricación de los dispositivos dan lugar ahora a importantes diferencias aleatorias en sus características eléctricas, que han de ser tenidas en cuenta durante la fase de diseño. Los nuevos procesos y materiales requeridos para la fabricación de dispositivos de dimensiones tan reducidas están dando lugar a diferentes efectos que resultan finalmente en un incremento del consumo estático, o una mayor vulnerabilidad frente a radiación. Las memorias SRAM son ya la parte más vulnerable de un sistema electrónico, no solo por representar más de la mitad del área de los SoCs y microprocesadores actuales, sino también porque las variaciones de proceso les afectan de forma crítica, donde el fallo de una única célula afecta a la memoria entera. Esta tesis aborda los diferentes retos que presenta el diseño de memorias SRAM en las tecnologías más pequeñas. En un escenario de aumento de la variabilidad, se consideran problemas como el consumo de energía, el diseño teniendo en cuenta efectos de la tecnología a bajo nivel o el endurecimiento frente a radiación. En primer lugar, dado el aumento de la variabilidad de los dispositivos pertenecientes a los nodos tecnológicos más pequeños, así como a la aparición de nuevas fuentes de variabilidad por la inclusión de nuevos dispositivos y la reducción de sus dimensiones, la precisión del modelado de dicha variabilidad es crucial. Se propone en la tesis extender el método de inyectores, que modela la variabilidad a nivel de circuito, abstrayendo sus causas físicas, añadiendo dos nuevas fuentes para modelar la pendiente sub-umbral y el DIBL, de creciente importancia en la tecnología FinFET. Los dos nuevos inyectores propuestos incrementan la exactitud de figuras de mérito a diferentes niveles de abstracción del diseño electrónico: a nivel de transistor, de puerta y de circuito. El error cuadrático medio al simular métricas de estabilidad y prestaciones de células SRAM se reduce un mínimo de 1,5 veces y hasta un máximo de 7,5 a la vez que la estimación de la probabilidad de fallo se mejora en varios ordenes de magnitud. El diseño para bajo consumo es una de las principales aplicaciones actuales dada la creciente importancia de los dispositivos móviles dependientes de baterías. Es igualmente necesario debido a las importantes densidades de potencia en los sistemas actuales, con el fin de reducir su disipación térmica y sus consecuencias en cuanto al envejecimiento. El método tradicional de reducir la tensión de alimentación para reducir el consumo es problemático en el caso de las memorias SRAM dado el creciente impacto de la variabilidad a bajas tensiones. Se propone el diseño de una célula que usa valores negativos en la bit-line para reducir los fallos de escritura según se reduce la tensión de alimentación principal. A pesar de usar una segunda fuente de alimentación para la tensión negativa en la bit-line, el diseño propuesto consigue reducir el consumo hasta en un 20 % comparado con una célula convencional. Una nueva métrica, el hold trip point se ha propuesto para prevenir nuevos tipos de fallo debidos al uso de tensiones negativas, así como un método alternativo para estimar la velocidad de lectura, reduciendo el número de simulaciones necesarias. Según continúa la reducción del tamaño de los dispositivos electrónicos, se incluyen nuevos mecanismos que permiten facilitar el proceso de fabricación, o alcanzar las prestaciones requeridas para cada nueva generación tecnológica. Se puede citar como ejemplo el estrés compresivo o extensivo aplicado a los fins en tecnologías FinFET, que altera la movilidad de los transistores fabricados a partir de dichos fins. Los efectos de estos mecanismos dependen mucho del layout, la posición de unos transistores afecta a los transistores colindantes y pudiendo ser el efecto diferente en diferentes tipos de transistores. Se propone el uso de una célula SRAM complementaria que utiliza dispositivos pMOS en los transistores de paso, así reduciendo la longitud de los fins de los transistores nMOS y alargando los de los pMOS, extendiéndolos a las células vecinas y hasta los límites de la matriz de células. Considerando los efectos del STI y estresores de SiGe, el diseño propuesto mejora los dos tipos de transistores, mejorando las prestaciones de la célula SRAM complementaria en más de un 10% para una misma probabilidad de fallo y un mismo consumo estático, sin que se requiera aumentar el área. Finalmente, la radiación ha sido un problema recurrente en la electrónica para aplicaciones espaciales, pero la reducción de las corrientes y tensiones de los dispositivos actuales los está volviendo vulnerables al ruido generado por radiación, incluso a nivel de suelo. Pese a que tecnologías como SOI o FinFET reducen la cantidad de energía colectada por el circuito durante el impacto de una partícula, las importantes variaciones de proceso en los nodos más pequeños va a afectar su inmunidad frente a la radiación. Se demuestra que los errores inducidos por radiación pueden aumentar hasta en un 40 % en el nodo de 7nm cuando se consideran las variaciones de proceso, comparado con el caso nominal. Este incremento es de una magnitud mayor que la mejora obtenida mediante el diseño de células de memoria específicamente endurecidas frente a radiación, sugiriendo que la reducción de la variabilidad representaría una mayor mejora. ABSTRACT Reliability is becoming the main concern on integrated circuit as the technology goes beyond 22nm. Small imperfections in the device manufacturing result now in important random differences of the devices at electrical level which must be dealt with during the design. New processes and materials, required to allow the fabrication of the extremely short devices, are making new effects appear resulting ultimately on increased static power consumption, or higher vulnerability to radiation SRAMs have become the most vulnerable part of electronic systems, not only they account for more than half of the chip area of nowadays SoCs and microprocessors, but they are critical as soon as different variation sources are regarded, with failures in a single cell making the whole memory fail. This thesis addresses the different challenges that SRAM design has in the smallest technologies. In a common scenario of increasing variability, issues like energy consumption, design aware of the technology and radiation hardening are considered. First, given the increasing magnitude of device variability in the smallest nodes, as well as new sources of variability appearing as a consequence of new devices and shortened lengths, an accurate modeling of the variability is crucial. We propose to extend the injectors method that models variability at circuit level, abstracting its physical sources, to better model sub-threshold slope and drain induced barrier lowering that are gaining importance in FinFET technology. The two new proposed injectors bring an increased accuracy of figures of merit at different abstraction levels of electronic design, at transistor, gate and circuit levels. The mean square error estimating performance and stability metrics of SRAM cells is reduced by at least 1.5 and up to 7.5 while the yield estimation is improved by orders of magnitude. Low power design is a major constraint given the high-growing market of mobile devices that run on battery. It is also relevant because of the increased power densities of nowadays systems, in order to reduce the thermal dissipation and its impact on aging. The traditional approach of reducing the voltage to lower the energy consumption if challenging in the case of SRAMs given the increased impact of process variations at low voltage supplies. We propose a cell design that makes use of negative bit-line write-assist to overcome write failures as the main supply voltage is lowered. Despite using a second power source for the negative bit-line, the design achieves an energy reduction up to 20% compared to a conventional cell. A new metric, the hold trip point has been introduced to deal with new sources of failures to cells using a negative bit-line voltage, as well as an alternative method to estimate cell speed, requiring less simulations. With the continuous reduction of device sizes, new mechanisms need to be included to ease the fabrication process and to meet the performance targets of the successive nodes. As example we can consider the compressive or tensile strains included in FinFET technology, that alter the mobility of the transistors made out of the concerned fins. The effects of these mechanisms are very dependent on the layout, with transistor being affected by their neighbors, and different types of transistors being affected in a different way. We propose to use complementary SRAM cells with pMOS pass-gates in order to reduce the fin length of nMOS devices and achieve long uncut fins for the pMOS devices when the cell is included in its corresponding array. Once Shallow Trench isolation and SiGe stressors are considered the proposed design improves both kinds of transistor, boosting the performance of complementary SRAM cells by more than 10% for a same failure probability and static power consumption, with no area overhead. While radiation has been a traditional concern in space electronics, the small currents and voltages used in the latest nodes are making them more vulnerable to radiation-induced transient noise, even at ground level. Even if SOI or FinFET technologies reduce the amount of energy transferred from the striking particle to the circuit, the important process variation that the smallest nodes will present will affect their radiation hardening capabilities. We demonstrate that process variations can increase the radiation-induced error rate by up to 40% in the 7nm node compared to the nominal case. This increase is higher than the improvement achieved by radiation-hardened cells suggesting that the reduction of process variations would bring a higher improvement.

Plataformas experimentales para la formación en el área de la electrónica en entornos de e-learning

El campo de estudio relacionado con los laboratorios remotos en el ámbito educativo de las ciencias y la ingeniería está sufriendo una notable expansión ante la necesidad de adaptar los procesos de aprendizaje en dichas áreas a las características y posibilidades de la formación online. Muchos de los recursos educativos basados en esta tecnología, existentes en la actualidad, presentan ciertas limitaciones que impiden alcanzar las competencias que se deben adquirir en los laboratorios de ingeniería. Estas limitaciones están relacionadas con diferentes aspectos de carácter técnico y formativo. A nivel técnico las limitaciones principales se centran en el grado de versatilidad que son capaces de proporcionar comparado con el que se dispone en un laboratorio tradicional y en el modo de interacción del usuario, que provoca que el estudiante no distinga claramente si está realizando acciones sobre sistemas reales o simulaciones. A nivel formativo las limitaciones detectadas son relevantes para poder alcanzar un aprendizaje significativo. En concreto están relacionadas principalmente con un escaso sentimiento de inmersión, una reducida sensación de realismo respecto a las operaciones que se realizan o la limitada posibilidad de realizar actividades de forma colaborativa. La aparición de nuevas tecnologías basadas en entornos inmersivos, unida a los avances producidos relacionados con el aumento de la capacidad gráfica de los ordenadores y del ancho de banda de acceso a Internet, han hecho factible que las limitaciones comentadas anteriormente puedan ser superadas gracias al desarrollo de nuevos recursos de aprendizaje surgidos de la fusión de laboratorios remotos y mundos virtuales 3D. Esta tesis doctoral aborda un trabajo de investigación centrado en proponer un modelo de plataformas experimentales, basado en la fusión de las dos tecnologías mencionadas, que permita generar recursos educativos online que faciliten la adquisición de competencias prácticas similares a las que se consiguen en un laboratorio tradicional vinculado a la enseñanza de la electrónica. El campo de aplicación en el que se ha focalizado el trabajo realizado se ha centrado en el área de la electrónica aunque los resultados de la investigación realizada se podrían adaptar fácilmente a otras disciplinas de la ingeniería. Fruto del trabajo realizado en esta tesis es el desarrollo de la plataforma eLab3D, basada en el modelo de plataformas experimentales propuesto, y la realización de dos estudios empíricos llevados a cabo con estudiantes de grado en ingeniería, muy demandados por la comunidad investigadora. Por un lado, la plataforma eLab3D, que permite llevar a cabo de forma remota actividades prácticas relacionadas con el diseño, montaje y prueba de circuitos electrónicos analógicos, aporta como novedad un dispositivo hardware basado en un sistema de conmutación distribuido. Dicho sistema proporciona un nivel de versatilidad muy elevado, a nivel de configuración de circuitos y selección de puntos de medida, que hace posible la realización de acciones similares a las que se llevan a cabo en los laboratorios presenciales. Por otra parte, los estudios empíricos realizados, que comparaban la eficacia educativa de una metodología de aprendizaje online, basada en el uso de la plataforma eLab3D, con la conseguida siguiendo una metodología clásica en los laboratorios tradicionales, mostraron que no se detectaron diferencias significativas en el grado de adquisición de los resultados de aprendizaje entre los estudiantes que utilizaron la plataforma eLab3D y los que asistieron a los laboratorios presenciales. Por último, hay que destacar dos aspectos relevantes relacionados directamente con esta tesis. En primer lugar, los resultados obtenidos en las experiencias educativas llevadas a cabo junto a valoraciones obtenidas por el profesorado que ha colaborado en las mismas han sido decisivos para que la plataforma eLab3D se haya integrado como recurso complementario de aprendizaje en titulaciones de grado de ingeniería de la Universidad Politécnica de Madrid. En segundo lugar, el modelo de plataformas experimentales que se ha propuesto en esta tesis, analizado por investigadores vinculados a proyectos en el ámbito de la fusión nuclear, ha sido tomado como referencia para generar nuevas herramientas de formación en dicho campo. ABSTRACT The field of study of remote laboratories in sciences and engineering educational disciplines is undergoing a remarkable expansion given the need to adapt the learning processes in the aforementioned areas to the characteristics and possibilities of online education. Several of the current educational resources based on this technology have certain limitations that prevent from reaching the required competencies in engineering laboratories. These limitations are related to different aspects of technical and educational nature. At the technical level, they are centered on the degree of versatility they are able to provide compared to a traditional laboratory and in the way the user interacts with them, which causes the student to not clearly distinguish if actions are being performed over real systems or over simulations. At the educational level, the detected limitations are relevant in order to reach a meaningful learning. In particular, they are mainly related to a scarce immersion feeling, a reduced realism sense regarding the operations performed or the limited possibility to carry out activities in a collaborative way. The appearance of new technologies based on immersive environments, together with the advances in graphical computer capabilities and Internet bandwidth access, have made the previous limitations feasible to be overcome thanks to the development of new learning resources that arise from merging remote laboratories and 3D virtual worlds. This PhD thesis tackles a research work focused on the proposal of an experimental platform model, based on the fusion of both mentioned technologies, which allows for generating online educational resources that facilitate the acquisition of practical competencies similar to those obtained in a traditional electronics laboratory. The application field, in which this work is focused, is electronics, although the research results could be easily adapted to other engineering disciplines. A result of this work is the development of eLab3D platform, based on the experimental platform model proposed, and the realization of two empirical studies with undergraduate students, highly demanded by research community. On one side, eLab3D platform, which allows to accomplish remote practical activities related to the design, assembling and test of analog electronic circuits, provides, as an original contribution, a hardware device based on a distributed switching system. This system offers a high level of versatility, both at the circuit configuration level and at the selection of measurement points, which allows for doing similar actions to those conducted in hands-on laboratories. On the other side, the empirical studies carried out, which compare the educational efficiency of an online learning methodology based on the use of eLab3D platform with that obtained following a classical methodology in traditional laboratories, shows that no significant differences in the acquired degree of learning outcomes among the students that used eLab3D platform and those that attended hands-on laboratories were detected. Finally, it is important to highlight two relevant aspects directly related with this thesis work. First of all, the results obtained in the educational experiences conducted, along with the assessment from the faculty that has collaborated in them, have been decisive to integrate eLab3D platform as a supplementary learning resource in engineering degrees at Universidad Politecnica de Madrid. Secondly, the experimental platform model originally proposed in this thesis, which has been analysed by nuclear fusion researchers, has been taken as a reference to generate new educational tools in that field.