938 resultados para Low power devices


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Flow pumps act as important devices in areas such as Bioengineering, Medicine, and Pharmacy, among other areas of Engineering, mainly for delivering liquids or gases at small-scale and precision flow rate quantities. Principles for pumping fluids based on piezoelectric actuators have been widely studied, since they allow the construction of pump systems for displacement of small fluid volumes with low power consumption. This work studies valveless piezoelectric diaphragm pumps for flow generation, which uses a piezoelectric ceramic (PZT) as actuator to move a membrane (diaphragm) up and down as a piston. The direction of the flow is guaranteed by valveless configuration based on a nozzle-diffuser system that privileges the flow in just one pumping direction. Most research efforts on development of valveless flow pump deal either with computational simulations based on simplified models or with simplified physical approaches based on analytical models. The main objective of this work is the study of a methodology to develop a low-cost valveless piezoelectric diaphragm flow pump using computational simulations, parametric study, prototype manufacturing, and experimental characterization. The parametric study has shown that the eccentricity of PZT layer and metal layer plays a key role in the performance of the pump.

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Several activities were conducted during my PhD activity. For the NEMO experiment a collaboration between the INFN/University groups of Catania and Bologna led to the development and production of a mixed signal acquisition board for the Nemo Km3 telescope. The research concerned the feasibility study for a different acquisition technique quite far from that adopted in the NEMO Phase 1 telescope. The DAQ board that we realized exploits the LIRA06 front-end chip for the analog acquisition of anodic an dynodic sources of a PMT (Photo-Multiplier Tube). The low-power analog acquisition allows to sample contemporaneously multiple channels of the PMT at different gain factors in order to increase the signal response linearity over a wider dynamic range. Also the auto triggering and self-event-classification features help to improve the acquisition performance and the knowledge on the neutrino event. A fully functional interface towards the first level data concentrator, the Floor Control Module, has been integrated as well on the board, and a specific firmware has been realized to comply with the present communication protocols. This stage of the project foresees the use of an FPGA, a high speed configurable device, to provide the board with a flexible digital logic control core. After the validation of the whole front-end architecture this feature would be probably integrated in a common mixed-signal ASIC (Application Specific Integrated Circuit). The volatile nature of the configuration memory of the FPGA implied the integration of a flash ISP (In System Programming) memory and a smart architecture for a safe remote reconfiguration of it. All the integrated features of the board have been tested. At the Catania laboratory the behavior of the LIRA chip has been investigated in the digital environment of the DAQ board and we succeeded in driving the acquisition with the FPGA. The PMT pulses generated with an arbitrary waveform generator were correctly triggered and acquired by the analog chip, and successively they were digitized by the on board ADC under the supervision of the FPGA. For the communication towards the data concentrator a test bench has been realized in Bologna where, thanks to a lending of the Roma University and INFN, a full readout chain equivalent to that present in the NEMO phase-1 was installed. These tests showed a good behavior of the digital electronic that was able to receive and to execute command imparted by the PC console and to answer back with a reply. The remotely configurable logic behaved well too and demonstrated, at least in principle, the validity of this technique. A new prototype board is now under development at the Catania laboratory as an evolution of the one described above. This board is going to be deployed within the NEMO Phase-2 tower in one of its floors dedicated to new front-end proposals. This board will integrate a new analog acquisition chip called SAS (Smart Auto-triggering Sampler) introducing thus a new analog front-end but inheriting most of the digital logic present in the current DAQ board discussed in this thesis. For what concern the activity on high-resolution vertex detectors, I worked within the SLIM5 collaboration for the characterization of a MAPS (Monolithic Active Pixel Sensor) device called APSEL-4D. The mentioned chip is a matrix of 4096 active pixel sensors with deep N-well implantations meant for charge collection and to shield the analog electronics from digital noise. The chip integrates the full-custom sensors matrix and the sparsifification/readout logic realized with standard-cells in STM CMOS technology 130 nm. For the chip characterization a test-beam has been set up on the 12 GeV PS (Proton Synchrotron) line facility at CERN of Geneva (CH). The collaboration prepared a silicon strip telescope and a DAQ system (hardware and software) for data acquisition and control of the telescope that allowed to store about 90 million events in 7 equivalent days of live-time of the beam. My activities concerned basically the realization of a firmware interface towards and from the MAPS chip in order to integrate it on the general DAQ system. Thereafter I worked on the DAQ software to implement on it a proper Slow Control interface of the APSEL4D. Several APSEL4D chips with different thinning have been tested during the test beam. Those with 100 and 300 um presented an overall efficiency of about 90% imparting a threshold of 450 electrons. The test-beam allowed to estimate also the resolution of the pixel sensor providing good results consistent with the pitch/sqrt(12) formula. The MAPS intrinsic resolution has been extracted from the width of the residual plot taking into account the multiple scattering effect.

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The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. To resolve this issue the industry is improving existing technologies such as Flash and exploring new ones. Among those new technologies is the Phase Change Memory (PCM), which overcomes some of the shortcomings of the Flash such as durability and scalability. This alternative non-volatile memory technology, which uses resistance contrast in phase-change materials, offers more density relative to DRAM, and can help to increase main memory capacity of future systems while remaining within the cost and power constraints. Chalcogenide materials can suitably be exploited for manufacturing phase-change memory devices. Charge transport in amorphous chalcogenide-GST used for memory devices is modeled using two contributions: hopping of trapped electrons and motion of band electrons in extended states. Crystalline GST exhibits an almost Ohmic I(V) curve. In contrast amorphous GST shows a high resistance at low biases while, above a threshold voltage, a transition takes place from a highly resistive to a conductive state, characterized by a negative differential-resistance behavior. A clear and complete understanding of the threshold behavior of the amorphous phase is fundamental for exploiting such materials in the fabrication of innovative nonvolatile memories. The type of feedback that produces the snapback phenomenon is described as a filamentation in energy that is controlled by electron–electron interactions between trapped electrons and band electrons. The model thus derived is implemented within a state-of-the-art simulator. An analytical version of the model is also derived and is useful for discussing the snapback behavior and the scaling properties of the device.

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urface treatments have been recently shown to play an active role in electrical characteristics in AlGaN/GaN HEMTs, in particular during the passivation processing [1-4]. However, the responsible mechanisms are partially unknown and further studies are demanding. The effects of power and time N2 plasma pre-treatment prior to SiN deposition using PE-CVD (plasma enhanced chemical vapour deposition) on GaN and AlGaN/GaN HEMT have been investigated. The low power (60 W) plasma pre-treatment was found to improve the electronic characteristics in GaN based HEMT devices, independently of the time duration up to 20 min. In contrast, high power (150 and 210 W) plasma pretreatment showed detrimental effects in the electronic properties (Fig. 1), increasing the sheet resistance of the 2DEG, decreasing the 2DEG charge density in AlGaN/GaN HEMTs, transconductance reduction and decreasing the fT and fmax values up to 40% respect to the case using 60 W N2 plasma power. Although AFM (atomic force microscopy) results showed AlGaN and GaN surface roughness is not strongly affected by the N2-plasma, KFM (Kelvin force microscopy) surface analysis shows significant changes in the surface potential, trending to increase its values as the plasma power is higher. The whole results point at energetic ions inducing polarization-charge changes that affect dramatically to the 2-DEG charge density and the final characteristics of the HEMT devices. Therefore, we conclude that AlGaN surface is strongly sensitive to N2 plasma power conditions, which turn to be a key factor to achieve a good surface preparation prior to SiN passivation.

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The effects of power and time conditions of in situ N2 plasma treatment, prior to silicon nitride (SiN) passivation, were investigated on an AlGaN/GaN high-electron mobility transistor (HEMT). These studies reveal that N2 plasma power is a critical parameter to control the SiN/AlGaN interface quality, which directly affects the 2-D electron gas density. Significant enhancement in the HEMT characteristics was observed by using a low power N2 plasma pretreatment. In contrast, a marked gradual reduction in the maximum drain-source current density (IDS max) and maximum transconductance (gm max), as well as in fT and fmax, was observed as the N2 plasma power increases (up to 40% decrease for 210 W). Different mechanisms were proposed to be dominant as a function of the discharge power range. A good correlation was observed between the device electrical characteristics and the surface assessment by atomic force microscopy and Kelvin force microscopy techniques.

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Nowadays the interest in high power semiconductor devices is growing for applications such as telemetry, lidar system or free space communications. Indeed semiconductor devices can be an alternative to solid state lasers because they are more compact and less power consuming. These characteristics are very important for constrained and/or low power supply environment such as airplanes or satellites. Lots of work has been done in the 800-1200 nm range for integrated and free space Master Oscillator Power Amplifier (MOPA) [1]-[3]. At 1.5 ?m, the only commercially available MOPA is from QPC [4]: the fibred output power is about 700 mW and the optical linewidth is 500 kHz. In this paper, we first report on the simulations we have done to determine the appropriate vertical structure and architecture for a good MOPA at 1.58 ?m (section II). Then we describe the fabrication of the devices (section III). Finally we report on the optical and electrical measurements we have done for various devices (section IV).

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This work focuses on the design of high-efficient DC-DC converters based on WBG power devices. The first objective is the development of an isolated bidirectional converter for the distribution network of future electrical aircrafts. A SiC-based Dual Active Bridge converter is designed and fabricated. Control strategies for individual and parallel operations are investigated and implemented into a FPGA platform. Experimental results on 1.2kW 270V/28V prototype are presented to confirm the proper behavior of the proposed solution. The second project belongs to the field of photovoltaic systems and aims to develop a three-port converter with multiple power elements interfacing capability. A GaN-based Triple Active Bridge has been designed, regarding both the controller and the hardware realization.

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Carbon nanotubes (CNTs) have recently emerged as promising candidates for electron field emission (FE) cathodes in integrated FE devices. These nanostructured carbon materials possess exceptional properties and their synthesis can be thoroughly controlled. Their integration into advanced electronic devices, including not only FE cathodes, but sensors, energy storage devices, and circuit components, has seen rapid growth in recent years. The results of the studies presented here demonstrate that the CNT field emitter is an excellent candidate for next generation vacuum microelectronics and related electron emission devices in several advanced applications.

The work presented in this study addresses determining factors that currently confine the performance and application of CNT-FE devices. Characterization studies and improvements to the FE properties of CNTs, along with Micro-Electro-Mechanical Systems (MEMS) design and fabrication, were utilized in achieving these goals. Important performance limiting parameters, including emitter lifetime and failure from poor substrate adhesion, are examined. The compatibility and integration of CNT emitters with the governing MEMS substrate (i.e., polycrystalline silicon), and its impact on these performance limiting parameters, are reported. CNT growth mechanisms and kinetics were investigated and compared to silicon (100) to improve the design of CNT emitter integrated MEMS based electronic devices, specifically in vacuum microelectronic device (VMD) applications.

Improved growth allowed for design and development of novel cold-cathode FE devices utilizing CNT field emitters. A chemical ionization (CI) source based on a CNT-FE electron source was developed and evaluated in a commercial desktop mass spectrometer for explosives trace detection. This work demonstrated the first reported use of a CNT-based ion source capable of collecting CI mass spectra. The CNT-FE source demonstrated low power requirements, pulsing capabilities, and average lifetimes of over 320 hours when operated in constant emission mode under elevated pressures, without sacrificing performance. Additionally, a novel packaged ion source for miniature mass spectrometer applications using CNT emitters, a MEMS based Nier-type geometry, and a Low Temperature Cofired Ceramic (LTCC) 3D scaffold with integrated ion optics were developed and characterized. While previous research has shown other devices capable of collecting ion currents on chip, this LTCC packaged MEMS micro-ion source demonstrated improvements in energy and angular dispersion as well as the ability to direct the ions out of the packaged source and towards a mass analyzer. Simulations and experimental design, fabrication, and characterization were used to make these improvements.

Finally, novel CNT-FE devices were developed to investigate their potential to perform as active circuit elements in VMD circuits. Difficulty integrating devices at micron-scales has hindered the use of vacuum electronic devices in integrated circuits, despite the unique advantages they offer in select applications. Using a combination of particle trajectory simulation and experimental characterization, device performance in an integrated platform was investigated. Solutions to the difficulties in operating multiple devices in close proximity and enhancing electron transmission (i.e., reducing grid loss) are explored in detail. A systematic and iterative process was used to develop isolation structures that reduced crosstalk between neighboring devices from 15% on average, to nearly zero. Innovative geometries and a new operational mode reduced grid loss by nearly threefold, thereby improving transmission of the emitted cathode current to the anode from 25% in initial designs to 70% on average. These performance enhancements are important enablers for larger scale integration and for the realization of complex vacuum microelectronic circuits.

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The goal of this research is to produce a system for powering medical implants to increase the lifetime of the implanted devices and reduce the battery size. The system consists of a number of elements – the piezoelectric material for generating power, the device design, the circuit for rectification and energy storage. The piezoelectric material is analysed and a process for producing a repeatable high quality piezoelectric material is described. A full width half maximum (FWHM) of the rocking curve X-Ray diffraction (XRD) scan of between ~1.5° to ~1.7° for test wafers was achieved. This is state of the art for AlN on silicon and means devices with good piezoelectric constants can be fabricated. Finite element modelling FEM) was used to design the structures for energy harvesting. The models developed in this work were established to have an accuracy better than 5% in terms of the difference between measured and modelled results. Devices made from this material were analysed for power harvesting ability as well as the effect that they have on the flow of liquid which is an important consideration for implantable devices. The FEM results are compared to experimental results from laser Doppler vibrometry (LDV), magnetic shaker and perfusion machine tests. The rectifying circuitry for the energy harvester was also investigated. The final solution uses multiple devices to provide the power to augment the battery and so this was a key feature to be considered. Many circuits were examined and a solution based on a fully autonomous circuit was advanced. This circuit was analysed for use with multiple low power inputs similar to the results from previous investigations into the energy harvesting devices. Polymer materials were also studied for use as a substitute for the piezoelectric material as well as the substrate because silicon is more brittle.

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Several studies in the past have revealed that network end user devices are left powered up 24/7 even when idle just for the sake of maintaining Internet connectivity. Network devices normally support low power states but are kept inactive due to their inability to maintain network connectivity. The Network Connectivity Proxy (NCP) has recently been proposed as an effective mechanism to impersonate network connectivity on behalf of high power devices and enable them to sleep when idle without losing network presence. The NCP can efficiently proxy basic networking protocol, however, proxying of Internet based applications have no absolute solution due to dynamic and non-predictable nature of the packets they are sending and receiving periodically. This paper proposes an approach for proxying Internet based applications and presents the basic software architectures and capabilities. Further, this paper also practically evaluates the proposed framework and analyzes expected energy savings achievable under-different realistic conditions.

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Silicon-based discrete high-power devices need to be designed with optimal performance up to several thousand volts and amperes to reach power ratings ranging from few kWs to beyond the 1 GW mark. To this purpose, a key element is the improvement of the junction termination (JT) since it allows to drastically reduce surface electric field peaks which may lead to an earlier device failure. This thesis will be mostly focused on the negative bevel termination which from several years constitutes a standard processing step in bipolar production lines. A simple methodology to realize its counterpart, a planar JT with variation of the lateral doping concentration (VLD) will be also described. On the JT a thin layer of a semi insulating material is usually deposited, which acts as passivation layer reducing the interface defects and contributing to increase the device reliability. A thorough understanding of how the passivation layer properties affect the breakdown voltage and the leakage current of a fast-recovery diode is fundamental to preserve the ideal termination effect and provide a stable blocking capability. More recently, amorphous carbon, also called diamond-like carbon (DLC), has been used as a robust surface passivation material. By using a commercial TCAD tool, a detailed physical explanation of DLC electrostatic and transport properties has been provided. The proposed approach is able to predict the breakdown voltage and the leakage current of a negative beveled power diode passivated with DLC as confirmed by the successfully validation against the available experiments. In addition, the VLD JT proposed to overcome the limitation of the negative bevel architecture has been simulated showing a breakdown voltage very close to the ideal one with a much smaller area consumption. Finally, the effect of a low junction depth on the formation of current filaments has been analyzed by performing reverse-recovery simulations.

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In this thesis work a nonlinear model for Interdigitated Capacitors (IDCs) based on ferroelectric materials, is proposed. Through the properties of materials such as Hafnium-Zirconium Oxide (HfZrO2), it is possible to realize tunable radiofrequency (RF) circuits. In particular, the model proposed in this thesis describes the use of an IDC, realized on a High-Resistivity silicon substrate, as a phase shifter for beam-steering applications. The model is obtained starting from already present experimental measurements, through which it is possible to identify a circuit model. The model is tested for both low power values and other power values using Harmonic Balance simulations, which show an excellent convergence of the model up to 40 dBm of input power. Furthermore, an array composed by two patches operating both at 2.55 GHz, which exploits the tunable properties of the HfZrO-based IDC is proposed. At 0dBm the model shows a 47° phase shift with polarization -1 V and 1 V which leads to a 11° steering of the main lobe of the array.

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Brain injury is responsible for significant morbidity and mortality in trauma patients, but controversy still exists over therapeutic management for these patients. The objective of this study was to analyze the effect of phototherapy with low intensity lasers on local and systemic immunomodulation following cryogenic brain injury. Laser phototherapy was applied (or not-controls) immediately after cryogenic brain injury performed in 51 adult male Wistar rats. The animals were irradiated twice (3 h interval), with continuous diode laser (gallium-aluminum-arsenide (GaAlAs), 780 nm, or indium-gallium-aluminum-phosphide (InGaAlP), 660 nm) in two points and contact mode, 40 mW, spot size 0.042 cm(2), 3 J/cm(2) and 5 J/cm(2) (3 s and 5 s, respectively). The experimental groups were: Control (non-irradiated), RL3 (visible red laser/ 3 J/cm(2)), RL5 (visible red laser/5 J/cm(2)), IRL3 (infrared laser/ 3 J/cm(2)), IRL5 (infrared laser/5 J/cm(2)). The production of interleukin-1IL-1 beta (IL-1 beta), interleukin6 (IL-6), interleukin-10 (IL-10), and tumor necrosis factor-alpha (TNF-alpha) was analyzed by enzyme immunoassay technique (ELISA) test in brain and blood samples. The IL-1 beta concentration in brain of the control group ;was significantly reduced in 24 h (p < 0.01). This reduction was also observed in the RL5 and IRL3 groups. The TNF-alpha and IL-6 concentrations increased significantly (p < 0.01 and p < 0.05, respectively) in the blood of all groups, except by the IRL3 group. The IL-6 levels in RL3 group were significantly smaller than in control group in both experimental times. IL-10 concentration was maintained stable in all groups in brain and blood. Under the conditions of this study, it is possible to conclude that the laser phototherapy can affect TNF-alpha, IL-1 beta and IL-6 levels in the brain and in circulation in the first 24 h following cryogenic brain injury. (C) 2009 Elsevier B.V. All rights reserved.

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Amorphous glass/ZnO-Al/p(a-Si:H)/i(a-Si:H)/n(a-Si1-xCx:H)/Al imagers with different n-layer resistivities were produced by plasma enhanced chemical vapour deposition technique (PE-CVD). An image is projected onto the sensing element and leads to spatially confined depletion regions that can be readout by scanning the photodiode with a low-power modulated laser beam. The essence of the scheme is the analog readout, and the absence of semiconductor arrays or electrode potential manipulations to transfer the information coming from the transducer. The influence of the intensity of the optical image projected onto the sensor surface is correlated with the sensor output characteristics (sensitivity, linearity blooming, resolution and signal-to-noise ratio) are analysed for different material compositions (0.5 < x < 1). The results show that the responsivity and the spatial resolution are limited by the conductivity of the doped layers. An enhancement of one order of magnitude in the image intensity signal and on the spatial resolution are achieved at 0.2 mW cm(-2) light flux by decreasing the n-layer conductivity by the same amount. A physical model supported by electrical simulation gives insight into the image-sensing technique used.

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Os reguladores de tensão LDO são utilizados intensivamente na actual indústria de electrónica, são uma parte essencial de um bloco de gestão de potência para um SoC. O aumento de produtos portáteis alimentados por baterias levou ao crescimento de soluções totalmente integradas, o que degrada o rendimento dos blocos analógicos que o constituem face às perturbações introduzidas na alimentação. Desta forma, surge a necessidade de procurar soluções cada vez mais optimizadas, impondo assim novas soluções, e/ou melhoramentos dos circuitos de gestão de potência, tendo como objectivo final o aumento do desempenho e da autonomia dos dispositivos electrónicos. Normalmente este tipo de reguladores tem a corrente de saída limitada, devido a problemas de estabilidade associados. Numa tentativa de evitar a instabilidade para as correntes de carga definidas e aumentar o PSRR do mesmo, é apresentado um método de implementação que tem como objectivo melhorar estas características, em que se pretende aumentar o rendimento e melhorar a resposta à variação da carga. No entanto, a técnica apresentada utiliza polarização adaptativa do estágio de potência, o que implica um aumento da corrente de consumo. O regulador LDO foi implementado na tecnologia CMOS UMC 0.18μm e ocupa uma área inferior a 0,2mm2. Os resultados da simulação mostram que o mesmo suporta uma transição de corrente 10μA para 100mA, com uma queda de tensão entre a tensão de alimentação e a tensão de saída inferior a 200mV. A estabilidade é assegurada para todas as correntes de carga. O tempo de estabelecimento é inferior a 6μs e as variações da tensão de saída relativamente a seu valor nominal são inferiores a 5mV. A corrente de consumo varia entre os 140μA até 200μA, o que permite atingir as especificações proposta para um PSRR de 40dB@10kHz.