A III-V channel field effect transistor for non-classical CMOS: process optimisation for improved gate stack function

This thesis describes a collection of studies into the electrical response of a III-V MOS stack comprising metal/GaGdO/GaAs layers as a function of fabrication process variables and the findings of those studies. As a result of this work, areas of improvement in the gate process module of a III-V heterostructure MOSFET were identified. Compared to traditional bulk silicon MOSFET design, one featuring a III-V channel heterostructure with a high-dielectric-constant oxide as the gate insulator provides numerous benefits, for example: the insulator can be made thicker for the same capacitance, the operating voltage can be made lower for the same current output, and improved output characteristics can be achieved without reducing the channel length further. It is known that transistors composed of III-V materials are most susceptible to damage induced by radiation and plasma processing. These devices utilise sub-10 nm gate dielectric films, which are prone to contamination, degradation and damage. Therefore, throughout the course of this work, process damage and contamination issues, as well as various techniques to mitigate or prevent those have been investigated through comparative studies of III-V MOS capacitors and transistors comprising various forms of metal gates, various thicknesses of GaGdO dielectric, and a number of GaAs-based semiconductor layer structures. Transistors which were fabricated before this work commenced, showed problems with threshold voltage control. Specifically, MOSFETs designed for normally-off (VTH > 0) operation exhibited below-zero threshold voltages. With the results obtained during this work, it was possible to gain an understanding of why the transistor threshold voltage shifts as the gate length decreases and of what pulls the threshold voltage downwards preventing normally-off device operation. Two main culprits for the negative VTH shift were found. The first was radiation damage induced by the gate metal deposition process, which can be prevented by slowing down the deposition rate. The second was the layer of gold added on top of platinum in the gate metal stack which reduces the effective work function of the whole gate due to its electronegativity properties. Since the device was designed for a platinum-only gate, this could explain the below zero VTH. This could be prevented either by using a platinum-only gate, or by matching the layer structure design and the actual gate metal used for the future devices. Post-metallisation thermal anneal was shown to mitigate both these effects. However, if post-metallisation annealing is used, care should be taken to ensure it is performed before the ohmic contacts are formed as the thermal treatment was shown to degrade the source/drain contacts. In addition, the programme of studies this thesis describes, also found that if the gate contact is deposited before the source/drain contacts, it causes a shift in threshold voltage towards negative values as the gate length decreases, because the ohmic contact anneal process affects the properties of the underlying material differently depending on whether it is covered with the gate metal or not. In terms of surface contamination; this work found that it causes device-to-device parameter variation, and a plasma clean is therefore essential. This work also demonstrated that the parasitic capacitances in the system, namely the contact periphery dependent gate-ohmic capacitance, plays a significant role in the total gate capacitance. This is true to such an extent that reducing the distance between the gate and the source/drain ohmic contacts in the device would help with shifting the threshold voltages closely towards the designed values. The findings made available by the collection of experiments performed for this work have two major applications. Firstly, these findings provide useful data in the study of the possible phenomena taking place inside the metal/GaGdO/GaAs layers and interfaces as the result of chemical processes applied to it. In addition, these findings allow recommendations as to how to best approach fabrication of devices utilising these layers.

The development of planar high-K/III-V p-channel MOSFETs for post-silicon CMOS

Conventional Si complementary-metal-oxide-semiconductor (CMOS) scaling is fast approaching its limits. The extension of the logic device roadmap for future enhancements in transistor performance requires non-Si materials and new device architectures. III-V materials, due to their superior electron transport properties, are well poised to replace Si as the channel material beyond the 10nm technology node to mitigate the performance loss of Si transistors from further reductions in supply voltage to minimise power dissipation in logic circuits. However several key challenges, including a high quality dielectric/III-V gate stack, a low-resistance source/drain (S/D) technology, heterointegration onto a Si platform and a viable III-V p-metal-oxide-semiconductor field-effect-transistor (MOSFET), need to be addressed before III-Vs can be employed in CMOS. This Thesis specifically addressed the development and demonstration of planar III-V p-MOSFETs, to complement the n-MOSFET, thereby enabling an all III-V CMOS technology to be realised. This work explored the application of InGaAs and InGaSb material systems as the channel, in conjunction with Al2O3/metal gate stacks, for p-MOSFET development based on the buried-channel flatband device architecture. The body of work undertaken comprised material development, process module development and integration into a robust fabrication flow for the demonstration of p-channel devices. The parameter space in the design of the device layer structure, based around the III-V channel/barrier material options of In_x≥0.53Ga_1-xAs/In_0.52Al_0.48As and In_x≥0.1Ga_1-xSb/AlSb, was systematically examined to improve hole channel transport. A mobility of 433 cm²/Vs, the highest room temperature hole mobility of any InGaAs quantum-well channel reported to date, was obtained for the In_0.85Ga_0.15As (2.1% strain) structure. S/D ohmic contacts were developed based on thermally annealed Au/Zn/Au metallisation and validated using transmission line model test structures. The effects of metallisation thickness, diffusion barriers and de-oxidation conditions were examined. Contacts to InGaSb-channel structures were found to be sensitive to de-oxidation conditions. A fabrication process, based on a lithographically-aligned double ohmic patterning approach, was realised for deep submicron gate-to-source/drain gap (L_side) scaling to minimise the access resistance, thereby mitigating the effects of parasitic S/D series resistance on transistor performance. The developed process yielded gaps as small as 20nm. For high-k integration on GaSb, ex-situ ammonium sulphide ((NH₄)₂S) treatments, in the range 1%-22%, for 10min at 295K were systematically explored for improving the electrical properties of the Al₂O₃/GaSb interface. Electrical and physical characterisation indicated the 1% treatment to be most effective with interface trap densities in the range of 4 - 10×10¹²cm^-2eV^-1 in the lower half of the bandgap. An extended study, comprising additional immersion times at each sulphide concentration, was further undertaken to determine the surface roughness and the etching nature of the treatments on GaSb. A number of p-MOSFETs based on III-V-channels with the most promising hole transport and integration of the developed process modules were successfully demonstrated in this work. Although the non-inverted InGaAs-channel devices showed good current modulation and switch-off characteristics, several aspects of performance were non-ideal; depletion-mode operation, modest drive current (I_d,sat=1.14mA/mm), double peaked transconductance (g_m=1.06mS/mm), high subthreshold swing (SS=301mV/dec) and high on-resistance (R_on=845kΩ.μm). Despite demonstrating substantial improvement in the on-state metrics of I_d,sat (11×), g_m (5.5×) and R_on (5.6×), inverted devices did not switch-off. Scaling gate-to-source/drain gap (L_side) from 1μm down to 70nm improved I_d,sat (72.4mA/mm) by a factor of 3.6 and gm (25.8mS/mm) by a factor of 4.1 in inverted InGaAs-channel devices. Well-controlled current modulation and good saturation behaviour was observed for InGaSb-channel devices. In the on-state In_0.3Ga_0.7Sb-channel (I_d,sat=49.4mA/mm, g_m=12.3mS/mm, R_on=31.7kΩ.μm) and In_0.4Ga_0.6Sb-channel (I_d,sat=38mA/mm, g_m=11.9mS/mm, R_on=73.5kΩ.μm) devices outperformed the InGaAs-channel devices. However the devices could not be switched off. These findings indicate that III-V p-MOSFETs based on InGaSb as opposed to InGaAs channels are more suited as the p-channel option for post-Si CMOS.

Design of Nanophotonic Antireflection Coatings for III-V Thin-Film Photovoltaics

Thin-film photovoltaics have provided a critical design avenue to help decrease the overall cost of solar power. However, a major drawback of thin-film solar cell technology is decreased optical absorption, making compact, high-quality antireflection coatings of critical importance to ensure that all available light enters the cell. In this thesis, we describe high efficiency thin-film InP and GaAs solar cells that utilize a periodic array of nanocylinders as antireflection coatings. We use coupled optical and electrical simulations to find that these nanophotonic structures reduce the solar-weighted average reflectivity of InP and GaAs solar cells to around 1.3 %, outperforming the best double-layer antireflection coatings. The coupling between Mie scattering resonances and thin-film interference effects accurately describes the optical enhancement provided by the nanocylinders. The spectrally resolved reflectivity and J-V characteristics of the devices under AM1.5G solar illumination are determined via the coupled optical and electrical simulations, resulting in predicted power conversion efficiencies > 23 %. We conclude that the nanostructured coatings reduce reflection without negatively affecting the electronic properties of the InP and GaAs solar cells by separating the nanostructured optical components from the active layer of the device.

The path to stoichiometric composition of III–V binary quantum dots through plasma/ion-assisted self-assembly

Semiconductor III-V quantum dots (QDs) are particularly enticing components for the integration of optically promising III-V materials with the silicon technology prevalent in the microelectronics industry. However, defects due to deviations from a stoichiometric composition [group III: group V = 1] may lead to impaired device performance. This paper investigates the initial stages of formation of InSb and GaAs QDs on Si(1 0 0) through hybrid numerical simulations. Three situations are considered: a neutral gas environment (NG), and two ionized gas environments, namely a localized ion source (LIS) and a background plasma (BP) case. It is shown that when the growth is conducted in an ionized gas environment, a stoichiometric composition may be obtained earlier in the QD as compared to a NG. Moreover, the stoichiometrization time, tst, is shorter for the BP case compared to the LIS scenario. A discussion of the effect of ion/plasma-based tools as well as a range of process conditions on the final island size distribution is also included. Our results suggest a way to obtain a deterministic level of control over nanostructure properties (in particular, elemental composition and size) during the initial stages of growth which is a crucial step towards achieving highly tailored QDs suitable for implementation in advanced technological devices.

Carrier concentration profiling in magnetic GaMnSb/GaSb investigated by electrochemistry capacitance-voltage profiler

Depth profiles of carrier concentrations in GaMnSb/GaSb are investigated by electrochemistry capacitance-voltage profiler and electrolyte of Tiron. The carrier concentration in GaMnSb/GaSb measured by this method is coincident with the results of Hall and X-ray diffraction measurements. It is indicated that most of the Mn atoms in GaMnSb take the site of Ga, play a role of acceptors, and provide shallow acceptor level(s).

Transport Properties And Induced Voltage In The Structure Of Water-Filled Single-Walled Boron-Nitrogen Nanotubes

Density functional theory/molecular dynamics simulations were employed to give insights into the mechanism of voltage generation based on a water-filled single-walled boron-nitrogen nanotube (SWBNNT). Our calculations showed that (1) the transport properties of confined water in a SWBNNT are different from those of bulk water in view of configuration, the diffusion coefficient, the dipole orientation, and the density distribution, and (2) a voltage difference of several millivolts would generate between the two ends of a SWBNNT due to interactions between the water dipole chains and charge carriers in the tube. Therefore, this structure of a water-filled SWBNNT can be a promising candidate for a synthetic nanoscale power cell as well as a practical nanopower harvesting device.

Transport properties and induced voltage in the structure of water-filled single-walled boron-nitrogen nanotubes

Density functional theory/molecular dynamics simulations were employed to give insights into the mechanism of voltage generation based on a water-filled single-walled boron-nitrogen nanotube (SWBNNT). Our calculations showed that (1) the transport properties of confined water in a SWBNNT are different from those of bulk water in view of configuration the diffusion coefficient the dipole orientation and the density distribution and (2) a voltage difference of several millivolts would generate between the two ends of a SWBNNT due to interactions between the water dipole chains and charge carriers in the tube. Therefore this structure of a water-filled SWBNNT can be a promising candidate for a synthetic nanoscale power cell as well as a practical nanopower harvesting device.

Structural change of laser-irradiated Ge2Sb2Te5 films studied by electrical property measurement

Sheet resistance of laser-irradiated Ge2Sb2Te5 thin films prepared by magnetron sputtering was measured by the four-point probe method. With increasing laser power the sheet resistance undergoes an abrupt drop from 10(7) to 10(3) Omega/square at about 580 mW. The abrupt drop in resistance is due to the structural change from amorphous to crystalline state as revealed by X-ray diffraction (XRD) study of the samples around the abrupt change point. Crystallized dots were also formed in the amorphous Ge2Sb2Te5 films by focused short pulse laser-irradiated, the resistivities at the crystallized dots and the non-crystallized area are 3.375 x 10(-3) and 2.725 Omega m, sheet resistance is 3.37 x 10(4) and 2.725 x 10(7) Omega/square respectively, deduced from the I-V Curves that is obtained by conductive atomic force microscope (C-AFM). (C) 2008 Elsevier B.V. All rights reserved.

Multimode resonances in metallically confined square-resonator microlasers

Directional emission InP/AlGaInAs square-resonator microlasers with a side length of 20 mu m are fabricated by standard photolithography and inductively coupled-plasma etching technique. Multimode resonances with about seven distinct mode peaks in a free-spectral range are observed from 1460 to 1560 nm with the free-spectral range of 12.1 nm near the wavelength of 1510 nm, and the mode refractive index versus the photon energy E (eV) as 3.07152+0.18304E are obtained by fitting the laser spectra with an analytical mode wavelength formula derived by light ray method. In addition, mode field pattern is simulated for cold cavity by two dimensional finite-difference time-domain technique.

Optically controlled quantum dot gated transistors with high on/off ratio

We report the design and fabrication of InAs quantum dot gated transistors, which are normally-on, where the channel current can be switched off by laser illumination. Laser light at 650 nm with a power of 850 pW switches the channel current from 5 mu A to 2 pA, resulting in an on/off ratio of more than 60 dB. The switch-off mechanism and carrier dynamics are analyzed with simulated band structure.

Dislocation scattering in AlxGa1-xN/GaN heterostructures

The theoretical electron mobility limited by dislocation scattering of a two-dimensional electron gas confined near the interface of AlxGa1-xN/GaN heterostructures was calculated. Based on the model of treating dislocation as a charged line, an exponentially varied potential was adopted to calculate the mobility. The estimated mobility suggests that such a choice can simplify the calculation without introducing significant deviation from experimental data, and we obtained a good fitting between the calculated and experimental results. It was found that the measured mobility is dominated by interface roughness and dislocation scattering at low temperatures if dislocation density is relatively high (>10(9) cm(-2)), and accounts for the nearly flattening-out behavior with increasing temperature.

Scanning electron microscopy observation of in-device InAs/AlAs quantum dots by selective etching of capping layers

Self-assembled InAs/AlAs quantum dots embedded in a resonant tunneling diode device structure are grown by molecular beam epitaxy. Through the selective etching in a C6H8O7 center dot H2O-K3C6H5O7 center dot H2O-H2O2 buffer solution, 310 nm GaAs capping layers are removed and the InAs/AlAs quantum dots are observed by field-emission scanning electron microscopy. It is shown that as-fabricated quantum dots have a diameter of several tens of nanometers and a density of 10(10) cm(-2) order. The images taken by this means are comparable or slightly better than those of transmission electron microscopy. The undercut of the InAs/AlAs layer near the edges of mesas is detected and that verifies the reliability of the quantum dot images. The inhomogeneous oxidation of the upper AlAs barrier in H2O2 is also observed. By comparing the morphologies of the mesa edge adjacent regions and the rest areas of the sample, it is concluded that the physicochemical reaction introduced in this letter is diffusion limited.

Ultrafast dynamics of four-state magnetization reversal in (Ga,Mn)As

The ultrafast dynamics of in-plane four-state magnetization reversal from compressively strained (Ga,Mn)As film was investigated by magneto-optical Kerr rotation measurement. The magnetization reversal signal was dramatically suppressed upon pumping, and recovered slowly with time evolution. The low switching field H-c1 increased abruptly from 30 to 108 G on the first several picoseconds and recovered back to the value before optical pumping within about 500 ps, whereas the high switching field H-c2 did not change obviously upon pumping, implying a domain-wall nucleation/propagation at low fields and coherent magnetization rotation at high fields in the magnetization reversal process.

Role of edge dislocation and Si impurity in linking the blue luminescence and yellow luminescence in n-type GaN films

A close relationship is found between the blue and yellow luminescence bands in n-type GaN films, which are grown without intentional acceptor doping. The intensity ratio of blue luminescence to yellow luminescence (I-BL/I-YL) decreases with the increase in edge dislocation densities as demonstrated by the (102) full width at half maximum of x-ray diffraction. In addition, the I-BL/I-YL ratio decreases with the increase in Si doping. It is suggested that the edge dislocation and Si impurity play important roles in linking the blue and yellow luminescence.

Electron spin quantum beats and room temperature g factor in GaAsN

We report on the investigation of electron spin quantum beats at room temperature in GaAsN thin films by time-resolved Kerr rotation technique. The measurement of the quantum beats, which originate from the Larmor precession of electron spins in external transverse magnetic field, yields an accurate determination of the conduction electron g factor. We show that the g factor of GaAs1-xNx thin films is significantly changed by the introduction of a small nitrogen fraction.