Advanced scalable algorithms for advanced architectures

With the latest advances in the area of advanced computer architectures we are seeing already large scale machines at petascale level and we are discussing exascale computing. All these require efficient scalable algorithms in order to bridge the performance gap. In this paper examples of various approaches of designing scalable algorithms for such advanced architectures will be given and the corresponding properties of these algorithms will be outlined and discussed. Examples will outline such scalable algorithms applied to large scale problems in the area Computational Biology, Environmental Modelling etc. The key properties of such advanced and scalable algorithms will be outlined.

Double-gyroid morphology of a polystyrene-block-poly(ferrocenylethylmethylsilane) diblock copolymer: a route to ordered bicontinuous nanoscale architectures

A polystyrene-block-poly(ferrocenylethylmethylsilane) diblock copolymer, displaying a double-gyroid morphology when self-assembled in the solid state, has been prepared with a PFEMS volume fraction phi(PFMS)=0.39 and a total molecular weight of 64 000 Da by sequential living anionic polymerisation. A block copolymer with a metal-containing block with iron and silicon in the main chain was selected due to its plasma etch resistance compared to the organic block. Self-assembly of the diblock copolymer in the bulk showed a stable, double-gyroid morphology as characterised by TEM. SAXS confirmed that the structure belonged to the Ia3d space group.

Clinical potential and design of programmable mechanical impedances for orthotic applications

A person with a moderate or severe motor disability will often use specialised or adapted tools to assist their interaction with a general environment. Such tools can assist with the movement of a person's arms so as to facilitate manipulation, can provide postural supports, or interface to computers, wheelchairs or similar assistive technologies. Designing such devices with programmable stiffness and damping may offer a better means for the person to have effective control of their surroundings. This paper addresses the possibility of designing some assistive technologies using impedance elements that can adapt to the user and the circumstances. Two impedance elements are proposed. The first, based on magnetic particle brakes, allows control of the damping coefficient in a passive element. The second, based on detuning the P-D controller in a servo-motor mechanism, allows control of both stiffness and damping. Such a mechanical impedance can be modulated to the conditions imposed by the task in hand. The limits of linear theory are explored and possible uses of programmable impedance elements are proposed.

Parallel pipelined histogram architectures

Proposed is a unique cell histogram architecture which will process k data items in parallel to compute 2q histogram bins per time step. An array of m/2q cells computes an m-bin histogram with a speed-up factor of k; k ⩾ 2 makes it faster than current dual-ported memory implementations. Furthermore, simple mechanisms for conflict-free storing of the histogram bins into an external memory array are discussed.

Parallel pipelined array architectures for real-time histogram computation in consumer devices

The real-time parallel computation of histograms using an array of pipelined cells is proposed and prototyped in this paper with application to consumer imaging products. The array operates in two modes: histogram computation and histogram reading. The proposed parallel computation method does not use any memory blocks. The resulting histogram bins can be stored into an external memory block in a pipelined fashion for subsequent reading or streaming of the results. The array of cells can be tuned to accommodate the required data path width in a VLSI image processing engine as present in many imaging consumer devices. Synthesis of the architectures presented in this paper in FPGA are shown to compute the real-time histogram of images streamed at over 36 megapixels at 30 frames/s by processing in parallel 1, 2 or 4 pixels per clock cycle.

Parallel Architectures for High Speed Multipliers

The authors compare various array multiplier architectures based on (p,q) counter circuits. The tradeoff in multiplier design is always between adding complexity and increasing speed. It is shown that by using a (2,2,3) counter cell it is possible to gain a significant increase in speed over a conventional full-adder, carry-save array based approach. The increase in complexity should be easily accommodated using modern emitter-coupled-logic processes.

Programmable data acquisition system for research measurements from meteorological radiosondes

A programmable data acquisition system to allow novel use of meteorological radiosondes for atmospheric science measurements is described. In its basic form it supports four analogue inputs at 16 bit resolution, and up to two further inputs at lower resolution configurable instead for digital instruments. It also provides multiple instrument power supplies (+8V, +16V, +5V and -8V) from the 9V radiosonde battery. During a balloon flight encountering air temperatures from +17°C to -66°C, the worst case voltage drift in the 5V unipolar digitisation circuitry was 20mV. The system liberates a new range of low cost atmospheric research measurements, by utilising radiosondes routinely launched internationally for weather forecasting purposes. No additional receiving equipment is required. Comparisons between the specially instrumented and standard meteorological radiosondes show negligible effect of the additional instrumentation on the standard meteorological data.

C-slow retimed parallel histogram architectures for consumer imaging devices

A parallel pipelined array of cells suitable for real-time computation of histograms is proposed. The cell architecture builds on previous work obtained via C-slow retiming techniques and can be clocked at 65 percent faster frequency than previous arrays. The new arrays can be exploited for higher throughput particularly when dual data rate sampling techniques are used to operate on single streams of data from image sensors. In this way, the new cell operates on a p-bit data bus which is more convenient for interfacing to camera sensors or to microprocessors in consumer digital cameras.

On modeling and evaluating multicomputer transcoding architectures for live-video streams

The pervasive and ubiquitous computing has motivated researches on multimedia adaptation which aims at matching the video quality to the user needs and device restrictions. This technique has a high computational cost which needs to be studied and estimated when designing architectures and applications. This paper presents an analytical model to quantify these video transcoding costs in a hardware independent way. The model was used to analyze the impact of transcoding delays in end-to-end live-video transmissions over LANs, MANs and WANs. Experiments confirm that the proposed model helps to define the best transcoding architecture for different scenarios.

Enzyme immobilisation on electroactive nanostructured membranes (ENM): Optimised architectures for biosensing

Electroactive nanostructured membranes have been produced by the layer-by-layer (LbL) technique, and used to make electrochemical enzyme biosensors for glucose by modification with cobalt hexacyanoferrate redox mediator and immobilisation of glucose oxidase enzyme. Indium tin oxide (ITO) glass electrodes were modified with up to three bilayers of polyamidoamine (PAMAM) dendrimers containing gold nanoparticles and poly(vinylsulfonate) (PVS). The gold nanoparticles were covered with cobalt hexacyanoferrate that functioned as a redox mediator, allowing the modified electrode to be used to detect H(2)O(2), the product of the oxidase enzymatic reaction, at 0.0 V vs. SCE. Enzyme was then immobilised by cross-linking with glutaraldehyde. Several parameters for optimisation of the glucose biosensor were investigated, including the number of deposited bilayers, the enzyme immobilisation protocol and the concentrations of immobilised enzyme and of the protein that was crosslinked with PAMAM. The latter was used to provide glucose oxidase with a friendly environment, in order to preserve its bioactivity. The optimised biosensor, with three bilayers, has high sensitivity and operational stability, with a detection limit of 6.1 mu M and an apparent Michaelis-Menten constant of 0.20 mM. It showed good selectivity against interferents and is suitable for glucose measurements in natural samples. (C) 2008 Elsevier B.V. All rights reserved.

The CATH classification revisited-architectures reviewed and new ways to characterize structural divergence in superfamilies

The latest version of CATH (class, architecture, topology, homology) (version 3.2), released in July 2008 (http://www.cathdb.info), contains 1 14215 domains, 2178 Homologous superfamilies and 1110 fold groups. We have assigned 20 330 new domains, 87 new homologous superfamilies and 26 new folds since CATH release version 3.1. A total of 28 064 new domains have been assigned since our NAR 2007 database publication (CATH version 3.0). The CATH website has been completely redesigned and includes more comprehensive documentation. We have revisited the CATH architecture level as part of the development of a `Protein Chart` and present information on the population of each architecture. The CATHEDRAL structure comparison algorithm has been improved and used to characterize structural diversity in CATH superfamilies and structural overlaps between superfamilies. Although the majority of superfamilies in CATH are not structurally diverse and do not overlap significantly with other superfamilies, similar to 4% of superfamilies are very diverse and these are the superfamilies that are most highly populated in both the PDB and in the genomes. Information on the degree of structural diversity in each superfamily and structural overlaps between superfamilies can now be downloaded from the CATH website.