Simulation of multigate SOI transistors with silicon, germanium and III-V channels

In this work by employing numerical three-dimensional simulations we study the electrical performance and short channel behavior of several multi-gate transistors based on advanced SOI technology. These include FinFETs, triple-gate and gate-all-around nanowire FETs with different channel material, namely Si, Ge, and III-V compound semiconductors, all most promising candidates for future nanoscale CMOS technologies. Also, a new type of transistor called “junctionless nanowire transistor” is presented and extensive simulations are carried out to study its electrical characteristics and compare with the conventional inversion- and accumulation-mode transistors. We study the influence of device properties such as different channel material and orientation, dimensions, and doping concentration as well as quantum effects on the performance of multi-gate SOI transistors. For the modeled n-channel nanowire devices we found that at very small cross sections the nanowires with silicon channel are more immune to short channel effects. Interestingly, the mobility of the channel material is not as significant in determining the device performance in ultrashort channels as other material properties such as the dielectric constant and the effective mass. Better electrostatic control is achieved in materials with smaller dielectric constant and smaller source-to-drain tunneling currents are observed in channels with higher transport effective mass. This explains our results on Si-based devices. In addition to using the commercial TCAD software (Silvaco and Synopsys TCAD), we have developed a three-dimensional Schrödinger-Poisson solver based on the non-equilibrium Green’s functions formalism and in the framework of effective mass approximation. This allows studying the influence of quantum effects on electrical performance of ultra-scaled devices. We have implemented different mode-space methodologies in our 3D quantum-mechanical simulator and moreover introduced a new method to deal with discontinuities in the device structures which is much faster than the coupled-mode-space approach.

Development of inversion-mode and junctionless Indium-Gallium-Arsenide MOSFETs

This PhD covers the development of planar inversion-mode and junctionless Al2O3/In0.53Ga0.47As metal-oxidesemiconductor field-effect transistors (MOSFETs). An implant activation anneal was developed for the formation of the source and drain (S/D) of the inversionmode MOSFET. Fabricated inversion-mode devices were used as test vehicles to investigate the impact of forming gas annealing (FGA) on device performance. Following FGA, the devices exhibited a subthreshold swing (SS) of 150mV/dec., an ION/IOFF of 104 and the transconductance, drive current and peak effective mobility increased by 29%, 25% and 15%, respectively. An alternative technique, based on the fitting of the measured full-gate capacitance vs gate voltage using a selfconsistent Poisson-Schrödinger solver, was developed to extract the trap energy profile across the full In0.53Ga0.47As bandgap and beyond. A multi-frequency inversion-charge pumping approach was proposed to (1) study the traps located at energy levels aligned with the In0.53Ga0.47As conduction band and (2) separate the trapped charge and mobile charge contributions. The analysis revealed an effective mobility (μeff) peaking at ~2850cm2/V.s for an inversion-charge density (Ninv) = 7*1011cm2 and rapidly decreasing to ~600cm2/V.s for Ninv = 1*1013 cm2, consistent with a μeff limited by surface roughness scattering. Atomic force microscopy measurements confirmed a large surface roughness of 1.95±0.28nm on the In0.53Ga0.47As channel caused by the S/D activation anneal. In order to circumvent the issue relative to S/D formation, a junctionless In0.53Ga0.47As device was developed. A digital etch was used to thin the In0.53Ga0.47As channel and investigate the impact of channel thickness (tInGaAs) on device performance. Scaling of the SS with tInGaAs was observed for tInGaAs going from 24 to 16nm, yielding a SS of 115mV/dec. for tInGaAs = 16nm. Flat-band μeff values of 2130 and 1975cm2/V.s were extracted on devices with tInGaAs of 24 and 20nm, respectively

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

First principles simulation of amorphous silicon bulk, interfaces, and nanowires for photovoltaics

Amorphous silicon has become the material of choice for many technologies, with major applications in large area electronics: displays, image sensing and thin film photovoltaic cells. This technology development has occurred because amorphous silicon is a thin film semiconductor that can be deposited on large, low cost substrates using low temperature. In this thesis, classical molecular dynamics and first principles DFT calculations have been performed to generate structural models of amorphous and hydrogenated amorphous silicon and interfaces of amorphous and crystalline silicon, with the ultimate aim of understanding the photovoltaic properties of core-shell crystalline amorphous Si nanowire structures. We have shown, unexpectedly, from the simulations, that our understanding of hydrogenated bulk a-Si needs to be revisited, with our robust finding that when fully saturated with hydrogen, bulk a-Si exhibits a constant optical energy gap, irrespective of the hydrogen concentration in the sample. Unsaturated a-Si:H, with a lower than optimum hydrogen content, shows a smaller optical gap, that increases with hydrogen content until saturation is reached. The mobility gaps obtained from an analysis of the electronic states show similar behavior. We also obtained that the optical and mobility gaps show a volcano curve as the H content is varied from 7% (undersaturation) to 18% (mild oversaturation). In the case of mild over saturation, the mid-gap states arise exclusively from an increase in the density of strained Si-Si bonds. Analysis of our structures shows the extra H atoms in this case form a bridge between neighboring silicon atoms which increases the corresponding Si-Si distance and promotes bond length disorder in the sample. That has the potential to enhance the Staebler-Wronski effect. Planar interface models of amorphous-crystalline silicon have been generated in Si (100), (110) and (111) surfaces. The interface models are characterized by structure, RDF, electronic density of states and optical absorption spectrum. We find that the least stable (100) surface will result in the formation of the thickest amorphous silicon layer, while the most stable (110) surface forms the smallest amorphous region. We calculated for the first time band offsets of a-Si:H/c-Si heterojunctions from first principles and examined the influence of different surface orientations and amorphous layer thickness on the offsets and implications for device performance. The band offsets depend on the amorphous layer thickness and increase with thickness. By controlling the amorphous layer thickness we can potentially optimise the solar cell parameters. Finally, we have successfully generated different amorphous layer thickness of the a-Si/c-Si and a-Si:H/c-Si 5 nm nanowires from heat and quench. We perform structural analysis of the a-Si-/c-Si nanowires. The RDF, Si-Si bond length distributions, and the coordination number distributions of amorphous regions of the nanowires reproduce similar behaviour compared to bulk amorphous silicon. In the final part of this thesis we examine different surface terminating chemical groups, -H, - OH and –NH2 in (001) GeNW. Our work shows that the diameter of Ge nanowires and the nature of surface terminating groups both play a significant role in both the magnitude and the nature of the nanowire band gaps, allowing tuning of the band gap by up to 1.1 eV. We also show for the first time how the nanowire diameter and surface termination shifts the absorption edge in the Ge nanowires to longer wavelengths. Thus, the combination of nanowire diameter and surface chemistry can be effectively utilised to tune the band gaps and thus light absorption properties of small diameter Ge nanowires.

Implant healing in experimental animal models of diabetes.

Diabetes mellitus is becoming increasingly prevalent worldwide. Additionally, there is an increasing number of patients receiving implantable devices such as glucose sensors and orthopedic implants. Thus, it is likely that the number of diabetic patients receiving these devices will also increase. Even though implantable medical devices are considered biocompatible by the Food and Drug Administration, the adverse tissue healing that occurs adjacent to these foreign objects is a leading cause of their failure. This foreign body response leads to fibrosis, encapsulation of the device, and a reduction or cessation of device performance. A second adverse event is microbial infection of implanted devices, which can lead to persistent local and systemic infections and also exacerbates the fibrotic response. Nearly half of all nosocomial infections are associated with the presence of an indwelling medical device. Events associated with both the foreign body response and implant infection can necessitate device removal and may lead to amputation, which is associated with significant morbidity and cost. Diabetes mellitus is generally indicated as a risk factor for the infection of a variety of implants such as prosthetic joints, pacemakers, implantable cardioverter defibrillators, penile implants, and urinary catheters. Implant infection rates in diabetic patients vary depending upon the implant and the microorganism, however, for example, diabetes was found to be a significant variable associated with a nearly 7.2% infection rate for implantable cardioverter defibrillators by the microorganism Candida albicans. While research has elucidated many of the altered mechanisms of diabetic cutaneous wound healing, the internal healing adjacent to indwelling medical devices in a diabetic model has rarely been studied. Understanding this healing process is crucial to facilitating improved device design. The purpose of this article is to summarize the physiologic factors that influence wound healing and infection in diabetic patients, to review research concerning diabetes and biomedical implants and device infection, and to critically analyze which diabetic animal model might be advantageous for assessing internal healing adjacent to implanted devices.

Electrical Characterisation of SOI Substrates Incorporating WSix Ground Planes

Silicon-on-insulator (SOI) substrates incorporating tungsten silicide ground planes (GPs) have been shown to offer the lowest reported crosstalk figure of merit for application in mixed signal integrated circuits. The inclusion of the silicide layer in the structure may lead to stress or defects in the overlying SOI layers and resultant degradation of device performance. It is therefore essential to establish the quality of the silicon on the GPSOI substrate. MOS capacitor structures have been employed in this paper to characterize these GPSOI substrates for the first time. High quality MOS capacitor characteristics have been achieved with minority carrier lifetime of similar to 0.8 ms. These results show that the substrate is suitable for device manufacture with no degradation in the silicon due to stress or metallic contamination resulting from the inclusion of the underlying silicide layer.

SiGe HBTs on Bonded SOI Incorporating Buried Silicide Layers

The performance of silicon bipolar transistors has been significantly improved by the use of ultra narrow base layers of SiGe. To further improve device performance by minimising parasitic resistance and capacitance the authors produced an unique silicon-on-insulator (SOI) substrate incorporating a buried tungsten disilicide layer. This structure forms the basis of a recent submission by Zarlink Semiconductors ( Silvaco, DeMontfort & Queen�s) to DTI for high voltage devices for automotive applications. The Queen�s part of the original EPSRC project was rated as tending to outstanding.

A probabilistic modelling scheme for analysis of long-term failure of cemented femoral joint replacements

Reliable prediction of long-term medical device performance using computer simulation requires consideration of variability in surgical procedure, as well as patient-specific factors. However, even deterministic simulation of long-term failure processes for such devices is time and resource consuming so that including variability can lead to excessive time to achieve useful predictions. This study investigates the use of an accelerated probabilistic framework for predicting the likely performance envelope of a device and applies it to femoral prosthesis loosening in cemented hip arthroplasty.
A creep and fatigue damage failure model for bone cement, in conjunction with an interfacial fatigue model for the implant–cement interface, was used to simulate loosening of a prosthesis within a cement mantle. A deterministic set of trial simulations was used to account for variability of a set of surgical and patient factors, and a response surface method was used to perform and accelerate a Monte Carlo simulation to achieve an estimate of the likely range of prosthesis loosening. The proposed framework was used to conceptually investigate the influence of prosthesis selection and surgical placement on prosthesis migration.
Results demonstrate that the response surface method is capable of dramatically reducing the time to achieve convergence in mean and variance of predicted response variables. A critical requirement for realistic predictions is the size and quality of the initial training dataset used to generate the response surface and further work is required to determine the recommendations for a minimum number of initial trials. Results of this conceptual application predicted that loosening was sensitive to the implant size and femoral width. Furthermore, different rankings of implant performance were predicted when only individual simulations (e.g. an average condition) were used to rank implants, compared with when stochastic simulations were used. In conclusion, the proposed framework provides a viable approach to predicting realistic ranges of loosening behaviour for orthopaedic implants in reduced timeframes compared with conventional Monte Carlo simulations.

The hydrodynamics of small seabed mounted bottom hinged wave energy converters in shallow water:PhD thesis

This thesis investigates the hydrodynamics of a small, seabed mounted, bottom hinged, wave energy converter in shallow water. The Oscillating Wave Surge Converter is a pitching flap-type device which is located in 10-15m of water to take advantage of the amplification of horizontal water particle motion in shallow water. A conceptual model of the hydrodynamics of the device has been formulated and shows that, as the motion of the flap is highly constrained, the magnitude of the force applied to the flap by the wave is strongly linked to the power absorption.

An extensive set of experiments has been carried out in the wave tank at Queen’s University at both 40th and 20th scales. The experiments have included testing in realistic sea states to estimate device performance as well as fundamental tests using small amplitude monochromatic waves to determine the force applied to the flap by the waves. The results from the physical modelling programme have been used in conjunction with numerical data from WAMIT to validate the conceptual model.

The work finds that tuning the OWSC to the incident wave periods is problematic and only results in a marginal increase in power capture. It is also found that the addition of larger diameter rounds to the edges of the flap reduces viscous losses and has a greater effect on the performance of the device than tuning. As wave force is the primary driver of device performance it is shown that the flap should fill the water column and should pierce the water surface to reduce losses due to wave overtopping.

With the water depth fixed at approximately 10m it is shown that the width of the flap has the greatest impact on the magnitude of wave force, and thus device performance. An 18m wide flap is shown to have twice the absorption efficiency of a 6m wide flap and captures 6 times the power. However, the increase in power capture with device width is not limitless and a 24m wide flap is found to be affected by two-dimensional hydrodynamics which reduces its performance per unit width, especially in sea states with short periods. It is also shown that as the width increases the performance gains associated with the addition of the end effectors reduces. Furthermore, it is shown that as the flap width increases the natural pitching period of the flap increases, thus detuning the flap further from the wave periods of interest for wave energy conversion.

The effect of waves approaching the flap from an oblique angle is also investigated and the power capture is found to decrease with the cosine squared of the encounter angle. The characteristic of the damping applied by the power take off system is found to have a significant effect on the power capture of the device, with constant damping producing between 20% and 30% less power than quadratic damping. Furthermore, it is found that applying a higher level of damping, or a damping bias, to the flap as it pitches towards the beach increases the power capture by 10%.

A further set of experiments has been undertaken in a case study used to predict the power capture of a prototype of the OWSC concept. The device, called the Oyster Demonstrator, has been developed by Aquamarine Power Ltd. and is to be installed at the European Marine Energy Centre, Scotland, in 2009.

The work concludes that OWSC is a viable wave energy converter and absorption efficiencies of up 75% have been measured. It is found that to maximise power absorption the flap should be approximately 20m wide with large diameter rounded edges, having its pivot close to the seabed and its top edge piercing the water surface.

Wave Interaction with an Oscillating Wave Surge Converter, Part 1: Viscous Effects

Bottom hinged oscillating wave surge converters are known to be an efficient method of extracting power from ocean waves. The present work deals with experimental and numerical studies of wave interactions with an oscillating wave surge converter. It focuses on two aspects: (1) viscous effects on device performance under normal operating conditions; and (2) effects of slamming on device survivability under extreme conditions. Part I deals with the viscous effects while the extreme sea conditions will be presented in Part II. The numerical simulations are performed using the commercial CFD package ANSYS FLUENT. The comparison between numerical results and experimental measurements shows excellent agreement in terms of capturing local features of the flow as well as the dynamics of the device. A series of simulations is conducted with various wave conditions, flap configurations and model scales to investigate the viscous and scaling effects on the device. It is found that the diffraction/radiation effects dominate the device motion and that the viscous effects are negligible for wide flaps.

Radiation-induced defects in quantum-size structures of A3B5 semiconductors

As estruturas quânticas de semicondutores, nomeadamente baseadas em GaAs, têm tido nos últimos vinte anos um claro desenvolvimento. Este desenvolvimento deve-se principalmente ao potencial tecnológico que estas estruturas apresentam. As aplicações espaciais, em ambientes agressivos do ponto de vista do nível de radiação a que os dispositivos estão sujeitos, motivaram todo o desenrolar de estudos na área dos defeitos induzidos pela radiação. As propriedades dos semicondutores e dos dispositivos de semicondutores são altamente influenciadas pela presença de defeitos estruturais, em particular os induzidos pela radiação. As propriedades dos defeitos, os processos de criação e transformação de defeitos devem ser fortemente alterados quando se efectua a transição entre o semicondutor volúmico e as heteroestruturas de baixa dimensão. Este trabalho teve como principal objectivo o estudo de defeitos induzidos pela radiação em estruturas quânticas baseadas em GaAs e InAs. Foram avaliadas as alterações introduzidas pelos defeitos em estruturas de poços quânticos e de pontos quânticos irradiadas com electrões e com protões. A utilização de várias técnicas de espectroscopia óptica, fotoluminescência, excitação de fotoluminescência e fotoluminescência resolvida no tempo, permitiu caracterizar as diferentes estruturas antes e após a irradiação. Foi inequivocamente constatada uma maior resistência à radiação dos pontos quânticos quando comparados com os poços quânticos e os materiais volúmicos. Esta resistência deve-se principalmente a uma maior localização da função de onda dos portadores com o aumento do confinamento dos mesmos. Outra razão provável é a expulsão dos defeitos dos pontos quânticos para a matriz. No entanto, a existência de defeitos na vizinhança dos pontos quânticos promove a fuga dos portadores dos níveis excitados, cujas funções de onda são menos localizadas, provocando um aumento da recombinação nãoradiativa e, consequentemente, uma diminuição da intensidade de luminescência dos dispositivos. O desenvolvimento de um modelo bastante simples para a estatística de portadores fora de equilíbrio permitiu reproduzir os resultados de luminescência em função da temperatura. Os resultados demonstraram que a extinção da luminescência com o aumento da temperatura é determinada por dois factores: a redistribuição dos portadores minoritários entre os pontos quânticos, o poço quântico e as barreiras de GaAs e a diminuição na taxa de recombinação radiativa relacionada com a dependência, na temperatura, do nível de Fermi dos portadores maioritários.

Ferroelectric : CNTs structures fabrication for advanced functional nano devices

This work is about the combination of functional ferroelectric oxides with Multiwall Carbon Nanotubes for microelectronic applications, as for example potential 3 Dimensional (3D) Non Volatile Ferroelectric Random Access Memories (NVFeRAM). Miniaturized electronics are ubiquitous now. The drive to downsize electronics has been spurred by needs of more performance into smaller packages at lower costs. But the trend of electronics miniaturization challenges board assembly materials, processes, and reliability. Semiconductor device and integrated circuit technology, coupled with its associated electronic packaging, forms the backbone of high-performance miniaturized electronic systems. However, as size decreases and functionalization increases in the modern electronics further size reduction is getting difficult; below a size limit the signal reliability and device performance deteriorate. Hence miniaturization of siliconbased electronics has limitations. On this background the Road Map for Semiconductor Industry (ITRS) suggests since 2011 alternative technologies, designated as More than Moore; being one of them based on carbon (carbon nanotubes (CNTs) and graphene) [1]. CNTs with their unique performance and three dimensionality at the nano-scale have been regarded as promising elements for miniaturized electronics [2]. CNTs are tubular in geometry and possess a unique set of properties, including ballistic electron transportation and a huge current caring capacity, which make them of great interest for future microelectronics [2]. Indeed CNTs might have a key role in the miniaturization of Non Volatile Ferroelectric Random Access Memories (NVFeRAM). Moving from a traditional two dimensional (2D) design (as is the case of thin films) to a 3D structure (based on a tridimensional arrangement of unidimensional structures) will result in the high reliability and sensing of the signals due to the large contribution from the bottom electrode. One way to achieve this 3D design is by using CNTs. Ferroelectrics (FE) are spontaneously polarized and can have high dielectric constants and interesting pyroelectric, piezoelectric, and electrooptic properties, being a key application of FE electronic memories. However, combining CNTs with FE functional oxides is challenging. It starts with materials compatibility, since crystallization temperature of FE and oxidation temperature of CNTs may overlap. In this case low temperature processing of FE is fundamental. Within this context in this work a systematic study on the fabrication of CNTs - FE structures using low cost low temperature methods was carried out. The FE under study are comprised of lead zirconate titanate (Pb1-xZrxTiO3, PZT), barium titanate (BaTiO3, BT) and bismuth ferrite (BiFeO3, BFO). The various aspects related to the fabrication, such as effect on thermal stability of MWCNTs, FE phase formation in presence of MWCNTs and interfaces between the CNTs/FE are addressed in this work. The ferroelectric response locally measured by Piezoresponse Force Microscopy (PFM) clearly evidenced that even at low processing temperatures FE on CNTs retain its ferroelectric nature. The work started by verifying the thermal decomposition behavior under different conditions of the multiwall CNTs (MWCNTs) used in this work. It was verified that purified MWCNTs are stable up to 420 ºC in air, as no weight loss occurs under non isothermal conditions, but morphology changes were observed for isothermal conditions at 400 ºC by Raman spectroscopy and Transmission Electron Microscopy (TEM). In oxygen-rich atmosphere MWCNTs started to oxidized at 200 ºC. However in argon-rich one and under a high heating rate MWCNTs remain stable up to 1300 ºC with a minimum sublimation. The activation energy for the decomposition of MWCNTs in air was calculated to lie between 80 and 108 kJ/mol. These results are relevant for the fabrication of MWCNTs – FE structures. Indeed we demonstrate that PZT can be deposited by sol gel at low temperatures on MWCNTs. And particularly interesting we prove that MWCNTs decrease the temperature and time for formation of PZT by ~100 ºC commensurate with a decrease in activation energy from 68±15 kJ/mol to 27±2 kJ/mol. As a consequence, monophasic PZT was obtained at 575 ºC for MWCNTs - PZT whereas for pure PZT traces of pyrochlore were still present at 650 ºC, where PZT phase formed due to homogeneous nucleation. The piezoelectric nature of MWCNTs - PZT synthesised at 500 ºC for 1 h was proved by PFM. In the continuation of this work we developed a low cost methodology of coating MWCNTs using a hybrid sol-gel / hydrothermal method. In this case the FE used as a proof of concept was BT. BT is a well-known lead free perovskite used in many microelectronic applications. However, synthesis by solid state reaction is typically performed around 1100 to 1300 ºC what jeopardizes the combination with MWCNTs. We also illustrate the ineffectiveness of conventional hydrothermal synthesis in this process due the formation of carbonates, namely BaCO3. The grown MWCNTs - BT structures are ferroelectric and exhibit an electromechanical response (15 pm/V). These results have broad implications since this strategy can also be extended to other compounds of materials with high crystallization temperatures. In addition the coverage of MWCNTs with FE can be optimized, in this case with non covalent functionalization of the tubes, namely with sodium dodecyl sulfate (SDS). MWCNTs were used as templates to grow, in this case single phase multiferroic BFO nanorods. This work shows that the use of nitric solvent results in severe damages of the MWCNTs layers that results in the early oxidation of the tubes during the annealing treatment. It was also observed that the use of nitric solvent results in the partial filling of MWCNTs with BFO due to the low surface tension (<119 mN/m) of the nitric solution. The opening of the caps and filling of the tubes occurs simultaneously during the refluxing step. Furthermore we verified that MWCNTs have a critical role in the fabrication of monophasic BFO; i.e. the oxidation of CNTs during the annealing process causes an oxygen deficient atmosphere that restrains the formation of Bi2O3 and monophasic BFO can be obtained. The morphology of the obtained BFO nano structures indicates that MWCNTs act as template to grow 1D structure of BFO. Magnetic measurements on these BFO nanostructures revealed a week ferromagnetic hysteresis loop with a coercive field of 956 Oe at 5 K. We also exploited the possible use of vertically-aligned multiwall carbon nanotubes (VA-MWCNTs) as bottom electrodes for microelectronics, for example for memory applications. As a proof of concept BiFeO3 (BFO) films were in-situ deposited on the surface of VA-MWCNTs by RF (Radio Frequency) magnetron sputtering. For in situ deposition temperature of 400 ºC and deposition time up to 2 h, BFO films cover the VA-MWCNTs and no damage occurs either in the film or MWCNTs. In spite of the macroscopic lossy polarization behaviour, the ferroelectric nature, domain structure and switching of these conformal BFO films was verified by PFM. A week ferromagnetic ordering loop was proved for BFO films on VA-MWCNTs having a coercive field of 700 Oe. Our systematic work is a significant step forward in the development of 3D memory cells; it clearly demonstrates that CNTs can be combined with FE oxides and can be used, for example, as the next 3D generation of FERAMs, not excluding however other different applications in microelectronics.

Nanotech thin film photovoltaics

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e Telecomunicações

Síntese de um novo polímero conjugado e reticulável e sua aplicação em células fotovoltaicas

Trabalho Final de Mestrado para obtenção do Grau de Mestre em Engenharia Química e Biológica

Amorphous Oxide Transparent Thin Films: Growth, Characterisation and Application to Thin Film Transistors

This work mainly concentrate to understand the optical and electrical properties of amorphous zinc tin oxide and amorphous zinc indium tin oxide thin films for TFT applications. Amorphous materials are promising in achieving better device performance on temperature sensitive substrates compared to polycrystalline materials. Most of these amorphous oxides are multicomponent and as such there exists the need for an optimized chemical composition. For this we have to make individual targets with required chemical composition to use it in conventional thin film deposition techniques like PLD and sputtering. Instead, if we use separate targets for each of the cationic element and if separately control the power during the simultaneous sputtering process, then we can change the chemical composition by simply adjusting the sputtering power. This is what is done in co-sputtering technique. Eventhough there had some reports about thin film deposition using this technique, there was no reports about the use of this technique in TFT fabrication until very recent time. Hence in this work, co-sputtering has performed as a major technique for thin film deposition and TFT fabrication. PLD were also performed as it is a relatively new technique and allows the use high oxygen pressure during deposition. This helps to control the carrier density in the channel and also favours the smooth film surface. Both these properties are crucial in TFT.Zinc tin oxide material is interesting in the sense that it does not contain costly indium. Eventhough some works were already reported in ZTO based TFTs, there was no systematic study about ZTO thin film's various optoelectronic properties from a TFT manufacturing perspective. Attempts have made to analyse the ZTO films prepared by PLD and co-sputtering. As more type of cations present in the film, chances are high to form an amorphous phase. Zinc indium tin oxide is studied as a multicomponent oxide material suitable for TFT fabrication.