Electrical Characterisation of SOI Substrates Incorporating WSix Ground Planes


Autoria(s): Bain, Michael; Jin, M.; Loh, S.; Armstrong, Mervyn; Gamble, Harold; McNeill, David
Data(s)

01/02/2005

Resumo

Silicon-on-insulator (SOI) substrates incorporating tungsten silicide ground planes (GPs) have been shown to offer the lowest reported crosstalk figure of merit for application in mixed signal integrated circuits. The inclusion of the silicide layer in the structure may lead to stress or defects in the overlying SOI layers and resultant degradation of device performance. It is therefore essential to establish the quality of the silicon on the GPSOI substrate. MOS capacitor structures have been employed in this paper to characterize these GPSOI substrates for the first time. High quality MOS capacitor characteristics have been achieved with minority carrier lifetime of similar to 0.8 ms. These results show that the substrate is suitable for device manufacture with no degradation in the silicon due to stress or metallic contamination resulting from the inclusion of the underlying silicide layer.

Identificador

http://pure.qub.ac.uk/portal/en/publications/electrical-characterisation-of-soi-substrates-incorporating-wsix-ground-planes(d7483b79-5239-495c-a0fe-ac96e6442af8).html

http://dx.doi.org/10.1109/LED.2004.841185

http://www.scopus.com/inward/record.url?scp=13444279053&partnerID=8YFLogxK

Idioma(s)

eng

Direitos

info:eu-repo/semantics/restrictedAccess

Fonte

Bain , M , Jin , M , Loh , S , Armstrong , M , Gamble , H & McNeill , D 2005 , ' Electrical Characterisation of SOI Substrates Incorporating WSix Ground Planes ' IEEE Electron Device Letters , vol 26 , no. 2 , pp. 72-74 . DOI: 10.1109/LED.2004.841185

Palavras-Chave #/dk/atira/pure/subjectarea/asjc/2200/2208 #Electrical and Electronic Engineering
Tipo

article