996 resultados para COMMERCIAL DETECTOR ARRAYS


Relevância:

20.00% 20.00%

Publicador:

Resumo:

We investigate the collective optomechanics of an ensemble of scatterers inside a Fabry-Pérot resonator and identify an optimized configuration where the ensemble is transmissive, in contrast to the usual reflective optomechanics approach. In this configuration, the optomechanical coupling of a specific collective mechanical mode can be several orders of magnitude larger than the single-element case, and long-range interactions can be generated between the different elements since light permeates throughout the array. This new regime should realistically allow for achieving strong single-photon optomechanical coupling with massive resonators, realizing hybrid quantum interfaces, and exploiting collective long-range interactions in arrays of atoms or mechanical oscillators.

Relevância:

20.00% 20.00%

Publicador:

Resumo:

The use of systolic arrays of 1-bit cells to implement a range of important signal processing functions is demonstrated. Two examples, a pipelined multiplier and a pipelined bit-slice transform circuit, are given. This approach has many important implications for silicon technology, and these are outlined.

Relevância:

20.00% 20.00%

Publicador:

Resumo:

Bit level systolic array structures for computing sums of products are studied in detail. It is shown that these can be sub-divided into two classes and that, within each class, architectures can be described in terms of a set of constraint equations. It is further demonstrated that high performance system level functions with attractive VLSI properties can be constructed by matching data flow geometries in bit level and word level architectures.

Relevância:

20.00% 20.00%

Publicador:

Resumo:

Bit-level systolic-array structures for computing sums of products are studied in detail. It is shown that these can be subdivided into two classes and that within each class architectures can be described in terms of a set of constraint equations. It is further demonstrated that high-performance system-level functions with attractive VLSI properties can be constructed by matching data-flow geometries in bit-level and word-level architectures.

Relevância:

20.00% 20.00%

Publicador:

Resumo:

A systolic array is an array of individual processing cells each of which has some local memory and is connected only to its nearest neighbours in the form of a regular lattice. On each cycle of a simple clock every cell receives data from its neighbouring cells and performs a specific processing operation on it. The resulting data is stored within the cell and passed on to neighbouring cells on the next clock cycle. This paper gives an overview of work to date and illustrates the application of bit-level systolic arrays by means of two examples: (1) a pipelined bit-slice circuit for computing matrix x vector transforms; and (2) a bit serial structure for multi-bit convolution.

Relevância:

20.00% 20.00%

Publicador:

Resumo:

The mapping of matrix multiplied by matrix multiplication onto both word and bit level systolic arrays has been investigated. It has been found that well defined word and bit level data flow constraints must be satisfied within such circuits. An efficient and highly regular bit level array has been generated by exploiting the basic compatibilities in data flow symmetries at each level of the problem. A description of the circuit which emerges is given and some details relating to its practical implementation are discussed.